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USER MANUAL SuperStorage 2029P-E1CR48L Supermicro
natural_image
Front view of a rack-mounted server rack with multiple drive bays and indicator lights (no visible text or labels)USER'S MANUAL
Revision 1.0b
The information in this User's Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note: For the most up-to-date version of this manual, please see our website at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except as expressly permitted by the terms of said license.
IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the manufacturer's instruction manual, may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case you will be required to correct the interference at your own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. "Perchlorate Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate".

WARNING: This product can expose you to chemicals including lead, known to the State of California to cause cancer and birth defects or other reproductive harm. For more information, go to www.P65Warnings.ca.gov.
The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and proceedings of any kind arising out of or related to such ultra-hazardous use or sale.
Manual Revision 1.0b
Release Date: February 19, 2020
Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this document. Information in this document is subject to change without notice. Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders.
Copyright © 2020 by Super Micro Computer, Inc.
All rights reserved.
Printed in the United States of America
Preface
About this Manual
This manual is written for professional system integrators and PC technicians. It provides information for the installation and use of the SuperServer 2029P-E1CR48H/L. Installation and maintenance should be performed by experienced technicians only.
Please refer to the 2029P-E1CR48H/L server specifications page on our website for updates on supported memory, processors and operating systems (http://www.supermicro.com).
Notes
For your system to work properly, please follow the links below to download all necessary drivers/utilities and the user's manual for your server.
• Supermicro product manuals: http://www.supermicro.com/support/manuals/
• Product drivers and utilities: http://www.supermicro.com
- Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm
If you have any questions, please contact our support team at:
support@supermicro.com
This manual may be periodically updated without notice. Please check the Supermicro website for possible updates to the manual revision level.
Warnings
Special attention should be given to the following symbols used in this manual.

Warning! Indicates important information given to prevent equipment/property damage or personal injury.

Warning! Indicates high voltage may be encountered when performing a procedure.
Contents
Chapter 1 Introduction
1.1 Overview....8
1.2 Unpacking the System 8
1.3 System Features 9
1.4 Server Chassis Features....10
Control Panel 10
Front Features....11
Rear Features ....12
1.5 Motherboard Layout....13
Quick Reference Table....14
Chapter 2 Server Installation
2.1 Overview....17
2.2 Preparing for Setup....17
Choosing a Setup Location....17
Rack Precautions....17
Server Precautions....18
Rack Mounting Considerations....18
Ambient Operating Temperature....18
Airflow....18
Mechanical Loading....18
Circuit Overloading....19
Reliable Ground....19
2.3 Installing the Rails....20
Identifying the Rails....20
Releasing the Inner Rail....21
Installing the Inner Rails on the Chassis....22
Installing the Outer Rails onto the Rack....23
Sliding the Chassis onto the Rack Rails....24
Chapter 3 Maintenance and Component Installation
3.1 Removing Power....25
3.2 Removing the Top Covers....25
Mid-chassis Cover....25
Rear Cover....27
3.3 Processor and Heatsink Installation....28
Processor and Heatsink Installation....28
The Intel® Xeon® 81xx/61xx/51xx/41xx/31xx and 82xx/62xx/52xx/42xx/32xx series
Series Processors....28
Overview of the Processor Socket Assembly 29
Overview of the Processor Heatsink Module (PHM)....30
Assembling the Processor Package....31
Installing the Processor Heatsink Module (PHM) 32
Removing the Processor Heatsink Module from the Motherboard ....33
3.4 Memory Support and Installation ....34
ESD Precautions....34
Precautions....34
Introduction to Intel® Optane DC Persistent Memory ....34
Memory Support....34
Memory Installation Sequence 35
General Memory Population Requirements ....36
DIMM Population Guidelines for Optimal Performance ....36
DIMM Installation 40
DIMM Module Removal....40
3.5 Mezzanine Card Installation (Optional)....41
Motherboard Battery 43
3.6 Chassis Components 44
Removing Power from the System....44
Removing the Top Covers....44
Mid-chassis Cover 44
Rear Cover 45
Hard Drives 46
Drive Connections 46
Drive Carriers 47
Installing a Hard Disk Drive....48
Installing Rear Hard Drives 49
Drive Carrier LEDs ....50
PCI Expansion Card Installation....50
Installing a SIOM Card....51
Installing Front Optional NVMe Drives with Cable 52
System Cooling ....56
Installing the Air Shrouds....58
Power Supply 59
Chapter 4 Motherboard Connections
4.1 Power Connections....60
4.2 Connectors....61
4.3 Ports 62
Rear I/O Ports 62
4.4 Headers....64
4.5 Front Control Panel....69
4.6 Jumpers....72
Explanation of Jumpers....72
4.7 LED Indicators....74
Chapter 5 Software
5.1 Microsoft Windows OS Installation....76
5.2 Driver Installation....78
5.3 SuperDoctor® 5....79
5.4 IPMI 79
Chapter 6 UEFI BIOS
6.1 Introduction....80
Starting the Setup Utility 80
6.2 Main Menu....81
6.3 Advanced Settings Menu 82
6.4 Event Logs 116
6.5 IPMI 118
6.6 Security Settings ....121
6.7 Boot Settings....124
6.8 Save & Exit....127
Appendix A BIOS Error Codes
Appendix B Standardized Warning Statements for AC Systems
Appendix C System Specifications
Appendix D UEFI BIOS Recovery
Contacting Supermicro
Headquarters
Address: Super Micro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel: +1 (408) 503-8000
Fax: +1 (408) 503-8008
Email: marketing@supermicro.com (General Information)
support@supermicro.com (Technical Support)
Website: www.supermicro.com
Europe
Address: Super Micro Computer B.V.
's-Hertogenbosch, The Netherlands
Tel: +31 (0) 73-6400390
Fax: +31 (0) 73-6416525
Email: sales@supermicro.nl (General Information)
support@supermicro.nl (Technical Support)
rma@supermicro.nl (Customer Support)
Website: www.supermicro.nl
Asia-Pacific
Address: Super Micro Computer, Inc.
3F, No. 150, Jian 1st Rd.
Zhonghe Dist., New Taipei City 235
Taiwan (R.O.C)
Tel: +886-(2) 8226-3990
Fax: +886-(2) 8226-3992
Email: support@supermicro.com.tw
Website: www.supermicro.com.tw
Chapter 1
Introduction
1.1 Overview
This chapter provides a brief outline of the functions and features of the SuperStorage 2029P-E1CR48H/L. The 2029P-E1CR48H/L is a high-end solution comprised of two main subsystems: the SC226STS-R1K62P1 2U chassis and the X11DSC+ dual processor motherboard. It features 24 hot-swap SAS3 drives, and SIOM for networking flexibility. It is powered by dual redundant 1600 Watt high-efficiency, hot-swap power modules.
It is useful for IOPS-intensive storage applications, database applications such as MySQL or Casandra, virtual storage environments, single instance storage and data de-duplication. In addition to the motherboard and chassis, several important parts that are included with the system are listed below. The only difference between the two server models is the add-on card.
| Main Parts List | ||
| Description Part Number Quantity | ||
| 12G 2.5 x 2 drive kit with status LED MCP-220-82616-ON 1 | ||
| 2U 24-port expander backplane supporting 20 x 2.5" SAS3/SATA3 HDD/SSD and 4 x 2.5" SAS3/SATA3/NVMe storage drives | BPN-SAS3-226SEL1-N4 | 2 |
| 1U passive CPU heat sinks for X11 with Narrow Retention Mechanism | SNK-P0067PS | 2 |
| SAS3 ROC Mezzanine add-on card (2029P-E1CR48H only) | AOM-S3108M-H8L-P | 1 |
| Mezzanine card with LSI 3008 SAS3 controller (2029P-E1CR48L only) | AOM-S3008M-L8-P | 1 |
| Air shroud MCP-310-00077-0B 1 | ||
| Rail set | MCP-290-00142-0N | 1 |
| Black Gen. 3 hot-swap 2.5" HDD trays | MCP-220-00047-0B 48 | |
| 65-cm, 26AWG, 4-pin to 4-pin I2C cable | CBL-PWEX-0760 | 1 |
| 80 x 80 x 38-mm middle cooling fans | FAN-0168L4 | 5 |
1.2 Unpacking the System
Inspect the box the SuperStorage 2029P-E1CR48H/L was shipped in and note if it was damaged in any way. If any equipment appears damaged, please file a damage claim with the carrier who delivered it.
Decide on a suitable location for the rack unit that will hold the server. It should be situated in a clean, dust-free area that is well ventilated. Avoid areas where heat, electrical noise and electromagnetic fields are generated. It will also require a grounded AC power outlet nearby. Be sure to read the precautions and considerations noted in Appendix B.
1.3 System Features
The following table provides you with an overview of the main features of the 2029P-E1CR48H/L. Please refer to Appendix C for additional specifications.
| System Features |
| Motherboard |
| X11DSC+ |
| Chassis |
| SC226STS |
| CPU |
| The X11DSC+ serverboard supports dualIntel® Xeon® 81xx/61xx/51xx/41xx/31xx and 82xx/62xx/52xx/42xx/32xx series (Socket P) processors which offer three Intel® UltraPath Interconnect (UPI) of up to 10.4 GT/s.Note: Both CPUs need to be installed for full access to the PCI-E slots, DIMM slots, and onboard controllers.Refer to the block diagram on page 16 to determine which slots or devices may be affected. |
| Socket Type |
| Socket P |
| Memory |
| The integrated memory controller embedded in the processor supports up to 6 TB of 3DS Load Reduced DIMM(3DS LRDIMM), 3DS Registered DIMM (3DS RDIMM) DDR4 (288-pin) ECC of up to 2933/2666 MHz modules in 24 slots. |
| Chipset |
| Intel PCH C621 chipset |
| Expansion Slots |
| Supports the following expansion slots:One SIOM moduleTwo PCI-E 3.0 x16 slotsOne PCI-E 3.0 x8 slot |
| Hard Drives |
| Up to 24 2.5" hot-swap hard drives in front of the chassis and up to 24 2.5" drives in pop-up riser drive bays on the top of the chassis. |
| Power |
| Dual 1600 Watt, Titanium Level, redundant power supplies |
| Cooling |
| Up to five 8-cm fans |
| Dimensions |
| (WxHxD) 17.2 x 3.5 x 30.7-in (437 x 89 x 780-mm) |
1.4 Server Chassis Features
Control Panel
The switches and LEDs located on the control panel are described below. See Chapter 4 for details on the control panel connections.

text_image
1 2 RESET 3 4 5 6 7 i 8Figure 1-1. Control Panel View
| Control Panel Features | ||
| Item Feature Description | ||
| 1 Power Button | The main power button is used to apply or remove power from the power supply to the server. Turning off system power with this button removes the main power but maintains standby power. To perform many maintenance tasks, you must also unplug system before servicing | |
| 2 Reset Button | The reset button is used to reboot the system | |
| 3 Power LED | Indicates power is being supplied to the system power supply. This LED should normally be illuminated when the system is operating. | |
| 4 HDD LED Indicates activity on a hard drive when flashing. | ||
| 5 | NIC2 LED | Indicates network activity on LAN port 2 when flashing |
| 6 | NIC1 LED | Indicates network activity on LAN port 1 when flashing |
| 7 Power Fail LED Indicates a power supply module has failed. | ||
| 8 Universal Information LED See table below for details. | ||
| Information LED | |
| Status Description | |
| Continuously on and red | An overheat condition has occurred.(This may be caused by cable congestion.) |
| Blinking red (1Hz) Fan failure, check for an inoperative fan. | |
| Solid blue | Local UID has been activated. Use this function to locate the server in a rackmount environment. |
| Blinking blue (300 msec) | Remotely triggered UID has been activated. Use this function to locate the server from a remote location. |
Front Features
The SC226STS-R1K62P1 is a 2U chassis See the illustration below for the features included on the front of the chassis.

natural_image
Front view of a rack-mounted server rack with multiple drive bays and ventilation slots (no visible text or labels)Figure 1-2. Chassis Front View
| Front Chassis Features | ||
| Item Feature | Description | |
| 1 Control Panel | Control panel for the server. | See Section 1.4 for details. |
| 2 Hard Drive Carriers | Hot-swap hard drive carriers for 24 front mounted hot-swap HDD or NVMe drives | |
Rear Features
The illustration below shows the features included on the rear of the chassis.

text_image
Diagram of a server rack with labeled components including drive, ports, and connectorsFigure 1-3. Chassis Rear View
| Rear Chassis Features | ||
| Item Feature Description | ||
| 1 HDD Drives | Two hot-swap HDD drives are available from the chassis rear. | |
| 2 Power Supplies | Up to two power supplies are supported | |
| 3 | Expansion Slots | Up to 11 PCI-E expansion cards are supported (seven external, four internal) |
| 4 I/O Ports The | I/O port rear panel is located here. See Chapter 4 for details. | |
1.5 Motherboard Layout
Below is a layout of the X11DSC+ with jumper, connector and LED locations shown. See the table on the following page for descriptions. For detailed descriptions, pinout information and jumper settings, refer to Chapter 4.

text_image
LAN CTRL JSDCARD1 JUIDB1 (UID) UID-LED IPMI LAN COM1VGA LEDBMC BMC USB 0/1 (3.0) JII2C FP1 CPU2 SU77 PDE-3.16 JP18 JF1 EDFWR LED-LED1 USD2 I-SATA3 JSD1 SP1 ISATAO USB2 (3.0) ISATA1 JBAT1+ PCH JUN2 FAN3 FAN2 FAN1 CPU2 CPU1 SIOM PCI-E 3.0 x16 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1 CPU1Figure 1-4. Motherboard Layout
Notes:
- See Chapter 4 for detailed information on jumpers, I/O ports, and JF1 front panel connections.
• " " indicates the location of Pin 1. - Jumpers/components/LED indicators not indicated are used for internal testing only.
- Use only the correct type of onboard CMOS battery, as specified by the manufacturer. In order to avoid possible explosion, do not install the onboard battery upside down.
Quick Reference Table
Jumper Description Default Setting
| JBT1 CMOS Clear Open (Normal) |
| JPME2 Manufacturing Mode Select Pins 1-2 (Normal) |
| JVRM_SEL1 VRM SMBus Clock (to BMC or PCH) Pins 1-2 (BMC, Normal) |
| JWD1 Watch Dog Timer Enable Pins 1-2 (Enabled, Reset) |
Connector Description
| COM1 Back panel COM port | |
| FAN1-5 System cooling fan headers | |
| IPMI_LAN Dedicated IPMI LAN port | |
| I-SATA0-3 | SATA 3.0 connection header supported by the Intel® PCH |
| I-SATA2/I-SATA3 | I-SATA Ports with built-in power pins and with support of Supermicro SuperDOM (Disk On Module) devices |
| I-SGPIO1 | Serial Link General Purpose I/O Header |
| JBAT1 Onboard CMOS battery socket | |
| JF1 | Front Control Panel header |
| JI2C_EXP1/2 | System Management Bus (SMBus) I2C for SAS3 backplanes |
| JI2C_FP1 | System Management Bus (SMBus) I2C for LCD devices |
| JIPMB1 | 4-pin BMC External I^2C header (for an IPMI-supported card) |
| JL1 | Chassis Intrusion header |
| (CPU1) JMEZZ1/JMEZZ2PCI-E | PCI-Express 3.0 x8 Add-On-Module (AOM) slot from CPU1 for mezzanine card support (See the note below) |
| JNV ^2 C1/JNVI ^2 C2 | NVMe SMBus ( I^2C ) headers used for PCI-E hot-plug SMBus clock & data connections (an SMCI-proprietary NVMe add-on card and cable are required; available for a Supermicro complete system only) |
| JPI ^2 C1 | Power Supply SMBus I^2C header |
| JPWR2/JPWR3 | 8-pin Power Supply connectors |
| JPWR1 24-pin ATX main power supply connector | |
| JRK1 | Intel® RAID Key header for NVMe SSD |
| JSD1/JSD2 | SATA DOM Power Connectors 1/2 |
| JSDCARD1 | Micro SD Card Slot (reserved by manufacturer) |
| JSEN1 | Inlet Sensor Header |
| JSTBY1 | Standby power header |
| JTPM1 | Trusted Platform Module (TPM)/Port 80 connector |
| P1_NVMe0-3 | NVM Express PCI-E 3.0 x4 ports (ports 0-3) supported by CPU1 |
| (CPU1) SIOM PCI-E | PCI-Express 3.0 x16 slot from CPU1 for SMCI SIOM add-on module support |
| (CPU2) SLOT1 | PCI-Express 3.0 x8 Slots supported by CPU2 |
| (CPU2) SLOT2/SLOT3 | PCI-Express 3.0 x16 Slot supported by CPU2 |
| SP1 | Internal Speaker/Buzzer |
| UID | Unit Identifier (UID) Switch |
| USB0/1 | Back panel USB 3.0 Ports |
Connector Description
USB2 Type A USB 3.0 Header
VGA VGA Port
LED Description Status
HDD_LED1 HDD LED Green: On: HDD Normal
LEDBMC BMC Heartbeat LED Blinking Green: BMC normal
LEDPWR Onboard Power LED On: Onboard power on
UID-LED UID (Unit Identifier) LED Solid Blue: Unit identified
Memory LED Description
Status
| P1_LED_A1 | CPU1_Memory_Fault_LED for DIMMs A1 | Red On: Memory Failure |
| P1_LED_A2 | CPU1_Memory_Fault_LED for DIMMs A2 | Red On: Memory Failure |
| P1_LED_B1 | CPU1_Memory_Fault_LED for DIMMs B1 | Red On: Memory Failure |
| P1_LED_B2 | CPU1_Memory_Fault_LED for DIMMs B2 | Red On: Memory Failure |
| P1_LED_C1 | CPU1_Memory_Fault_LED for DIMMs C1 | Red On: Memory Failure |
| P1_LED_C2 | CPU1_Memory_Fault_LED for DIMMs C2 | Red On: Memory Failure |
| P1_LED_D1 | CPU1_Memory_Fault_LED for DIMMs D1 | Red On: Memory Failure |
| P1_LED_D2 | CPU1_Memory_Fault_LED for DIMMs D2 | Red On: Memory Failure |
| P1_LED_E1 | CPU1_Memory_Fault_LED for DIMMs E1 | Red On: Memory Failure |
| P1_LED_E2 | CPU1_Memory_Fault_LED for DIMMs E2 | Red On: Memory Failure |
| P1_LED_F1 | CPU1_Memory_Fault_LED for DIMMs F1 | Red On: Memory Failure |
| P1_LED_F2 | CPU1_Memory_Fault_LED for DIMMs F2 | Red On: Memory Failure |
| P2_LED_A1 | CPU2_Memory_Fault_LED for DIMMs A1 | Red On: Memory Failure |
| P2_LED_A2 | CPU2_Memory_Fault_LED for DIMMs A2 | Red On: Memory Failure |
| P2_LED_B1 | CPU2_Memory_Fault_LED for DIMMs B1 | Red On: Memory Failure |
| P2_LED_B2 | CPU2_Memory_Fault_LED for DIMMs B2 | Red On: Memory Failure |
| P2_LED_C1 | CPU2_Memory_Fault_LED for DIMMs C1 | Red On: Memory Failure |
| P2_LED_C2 | CPU2_Memory_Fault_LED for DIMMs C2 | Red On: Memory Failure |
| P2_LED_D1 | CPU2_Memory_Fault_LED for DIMMs D1 | Red On: Memory Failure |
| P2_LED_D2 | CPU2_Memory_Fault_LED for DIMMs D2 | Red On: Memory Failure |
| P2_LED_E1 | CPU2_Memory_Fault_LED for DIMMs E1 | Red On: Memory Failure |
| P2_LED_E2 | CPU2_Memory_Fault_LED for DIMMs E2 | Red On: Memory Failure |
| P2_LED_F1 | CPU2_Memory_Fault_LED for DIMMs F1 | Red On: Memory Failure |
| P2_LED_F2 | CPU2_Memory_Fault_LED for DIMMs F2 | Red On: Memory Failure |

flowchart
graph TD
subgraph_CPU_1["CPU 1"]
A["PE2 PE1 DMIPE3"] -->|x16 32GB/s| B["DDR4 DIMM"]
C["CPU 1"] -->|x16 32GB/s| D["DDR4 DIMM"]
E["DDR4 DIMM"] -->|x16 32GB/s| F["DDR4 DIMM"]
G["DDR4 DIMM"] -->|x16 32GB/s| H["DDR4 DIMM"]
I["DDR4 DIMM"] -->|x16 32GB/s| J["DDR4 DIMM"]
K["DDR4 DIMM"] -->|x16 32GB/s| L["DDR4 DIMM"]
M["DDR4 DIMM"] --> N["DDR4 DIMM"]
O["DDR4 DIMM"] --> P["DDR4 DIMM"]
Q["DDR4 DIMM"] --> R["DDR4 DIMM"]
S["DDR4 DIMM"] --> T["DDR4 DIMM"]
U["DDR4 DIMM"] --> V["DDR4 DIMM"]
W["DDR4 DIMM"] --> X["DDR4 DIMM"]
Y["DDR4 DIMM"] --> Z["DDR4 DIMM"]
AA["DDR4 DIMM"] --> AB["DDR4 DIMM"]
AC["DDR4 DIMM"] --> AD["DDR4 DIMM"]
AE["DDR4 DIMM"] --> AF["DDR4 DIMM"]
AG["DDR4 DIMM"] --> AH["DDR4 DIMM"]
AI["DDR4 DIMM"] --> AJ["DDR4 DIMM"]
AK["DDR4 DIMM"] --> AL["DDR4 DIMM"]
AM["DDR4 DIMM"] --> AN["DDR4 DIMM"]
AO["DDR4 DIMM"] --> AP["DDR4 DIMM"]
AQ["DDR4 DIMM"] --> AR["DDR4 DIMM"]
AS["DDR4 DIMM"] --> AT["DDR4 DIMM"]
AU["DDR4 DIMM"] --> AV["DDR4 DIMM"]
AW["DDR4 DIMM"] --> AX["DDR4 DIMM"]
AY["DDR4 DIMM"] --> AZ["DDR4 DIMM"]
BA["DDR4 DIMM"] --> BB["DDR4 DIMM"]
BC["DDR4 DIMM"] --> BD["DDR4 DIMM"]
BE["DDR4 DIMM"] --> BF["DDR4 DIMM"]
BG["DDR4 DIMM"] --> BH["DDR4 DIMM"]
BI["DDR4 DIMM"] --> BJ["DDR4 DIMM"]
BK["DDR4 DIMM"] --> BL["DDR4 DIMM"]
BM["DDR4 DIMM"] --> BN["DDR4 DIMM"]
BO["DDR4 DIMM"] --> BP["DDR4 DIMM"]
BQ["DDR4 DIMM"] --> BR["DDR4 DIMM"]
BS["DDR4 DIMM"] --> BT["DDR4 DIMM"]
BU["DDR4 DIMM"] --> BV["DDR4 DIMM"]
BW["DDR4 DIMM"] --> BX["DDR4 DIMM"]
BYD["DDR4 DIMM"] --> BZ["DDR4 DIMM"]
CAV["DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DWR3-DW"]
end
subgraph CPU_Pe1
P2["P2 P1 P0"]
end
subgraph CPU_Pe2
P2_P1_P0
end
subgraph CPU_Pe1_DMIPE3
P2_P0_P1_P0
end
subgraph CPU_Pe1
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_DMIPE3
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1_DMIPE3_DMIPE3_Pe1
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1_DMIPE3_DMIPE3_Pe1
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1_DMIPE3_DMIPE3_Pe1
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1_DMIPE3_DMIPE3_Pe1
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1_DMIPE3_DMIPE3_Pe1
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1_DMIPE3_DMIPE |
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1_DMIPE3_DMIPE |
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1_DMIPE3_DMIPE |
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1DMLP
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1DMLP_DMIPE |
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1DMLP_DMIPE |
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1DMLP_DMIPE |
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1DMLPI
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1DMLPI_DMIPE |
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1DMLPI_DMIPE |
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1DMLSPI
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1DMLSPI_DMIPI
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1DMLSPI_DMIPI
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1DMLSPI_BMCSPI
P2_P0_P1_P0
end
subgraph CPU_Pe1_DMIPE3_Pe1DMLSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMCSPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI_BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BMC SPI BVCAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAM UAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUAMUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMUUUMuuu u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U U A
end
subgraph CPU_Ac
A[MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX DMSI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISI SISLPTA USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USSPTA USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USB USBUSb RTL821IF RTL821IF RTL821IF RTL821IF RTL821IF RTL821IF RTL821IF RTL821IF RTL821IF RTL821IF RTL821IF RTL821IF RTL821IF RTL821IF RTL821IF RTL821IF RTL821IF RTL875TPTA USBSb RTL875TPTA USBSb RTL875TPTA USBSb RTL875TPTA USBSb RTL875TPTA USBSb RTL875TPTA USBSb RTL875TPTA USBSb RTL875TPTA USBSb RTL875TPTA USBSb RTL875TPTA USBSb LT L875TPTA USBSb LT L875TPTA USBSb LT L875TPTA USBSb LT L875TPTA USBSb LT L875TPTA USBSb LT L875TPTA USBSb LT L875TPTA USBSb LT L875TPTA USBSb LT L875TPTA USBSb LT L975TPTA USBSb LT L975TPTA USBSb LT L975TPTA USBSb LT L975TPTA USBSb LT L975TPTA USBSb LT L975TPTA USBSb LT L975TPTA USBSb LT L975TPTA USBSb LT L975TPTA USBSb LT L987TPTA USBSb LT L987TPTA USBSb LT L987TPTA USBSb LT L987TPTA USBSb LT L987TPTA USBSb LT L987TPTA USBSb LT L987TPTA USBSb LT L987TPTA USBSb LT L987TPTA USBSb LT L987tUT L987tUT L987tUT L987tUT L987tUT L987tUT L987tUT L987tUT L987tUT L987tUT L987tUT L987tUT L987tUT L987tUT L987tUT L987tUT L987tUT L986tUT L986tUT L986tUT L986tUT L986tUT L986tUT L986tUT L986tUT L986tUT L986tUT L986tUT L986tUT L986tUT L986tUT L986tUT L986tUT L986tUT L 986tUT L 986tUT L 986tUT L 986tUT L 986tUT L 986tUT L 986tUT L 986tUT L 986tUT L 986tUT L 986tUT L 986tUT L 986tUT L 986tUT L 975tUT L 975tUT L 975tUT L 975tUT L 975tUT L 975tUT L 975tUT L 975tUT L 975tUT L 975tUT L 975tUT L 975tUT L 975tUT L 975tUT L 975tOUT_L 975tOUT_L 975tOUT_L 975tOUT_L 975tOUT_L 975tOUT_L 975tOUT_L 975tOUT_L 975tOUT_L 975tOUT_L 975tOUT_L 975tOUT_L 975tOUT_L 975tOUT_L 975tOUT_L 6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.6.
subgraph CPU_Ac
A[MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX/MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MUX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIC_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_MIX_FOT_VCCP1&2_12V_VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VR/VF_RR_TYPE_A
end
Figure 1-5. Intel PCH C621 Chipset: System Block Diagram
Note: This is a general block diagram and may not exactly represent the features on your motherboard. See the System Specifications appendix for the actual specifications of your motherboard.
Chapter 2
Server Installation
2.1 Overview
This chapter provides advice and instructions for mounting your system in a server rack. If your system is not already fully integrated with processors, system memory etc., refer to Chapter 4 for details on installing those specific components.
Caution: Electrostatic Discharge (ESD) can damage electronic components. To prevent such damage to PCBs (printed circuit boards), it is important to use a grounded wrist strap, handle all PCBs by their edges and keep them in anti-static bags when not in use.
2.2 Preparing for Setup
The box in which the system was shipped should include the rackmount hardware needed to install it into the rack. Please read this section in its entirety before you begin the installation.
Choosing a Setup Location
- The system should be situated in a clean, dust-free area that is well ventilated. Avoid areas where heat, electrical noise and electromagnetic fields are generated.
- Leave enough clearance in front of the rack so that you can open the front door completely (\~25 inches) and approximately 30 inches of clearance in the back of the rack to allow sufficient space for airflow and access when servicing.
- This product should be installed only in a Restricted Access Location (dedicated equipment rooms, service closets, etc.).
- This product is not suitable for use with visual display workplace devices according to §2 of the German Ordinance for Work with Visual Display Units.
Rack Precautions
- Ensure that the leveling jacks on the bottom of the rack are extended to the floor so that the full weight of the rack rests on them.
-
In single rack installations, stabilizers should be attached to the rack. In multiple rack installations, the racks should be coupled together.
-
Always make sure the rack is stable before extending a server or other component from the rack.
- You should extend only one server or component at a time - extending two or more simultaneously may cause the rack to become unstable.
Server Precautions
- Review the electrical and general safety precautions in Appendix B.
- Determine the placement of each component in the rack before you install the rails.
- Install the heaviest server components at the bottom of the rack first and then work your way up.
- Use a regulating uninterruptible power supply (UPS) to protect the server from power surges and voltage spikes and to keep your system operating in case of a power failure.
- Allow any drives and power supply modules to cool before touching them.
- When not servicing, always keep the front door of the rack and all covers/panels on the servers closed to maintain proper cooling.
Rack Mounting Considerations
Ambient Operating Temperature
If installed in a closed or multi-unit rack assembly, the ambient operating temperature of the rack environment may be greater than the room's ambient temperature. Therefore, consideration should be given to installing the equipment in an environment compatible with the manufacturer's maximum rated ambient temperature (TMRA).
Airflow
Equipment should be mounted into a rack so that the amount of airflow required for safe operation is not compromised.
Mechanical Loading
Equipment should be mounted into a rack so that a hazardous condition does not arise due to uneven mechanical loading.
Circuit Overloading
Consideration should be given to the connection of the equipment to the power supply circuitry and the effect that any possible overloading of circuits might have on overcurrent protection and power supply wiring. Appropriate consideration of equipment nameplate ratings should be used when addressing this concern.
Reliable Ground
A reliable ground must be maintained at all times. To ensure this, the rack itself should be grounded. Particular attention should be given to power supply connections other than the direct connections to the branch circuit (i.e. the use of power strips, etc.).

To prevent bodily injury when mounting or servicing this unit in a rack, you must take special precautions to ensure that the system remains stable. The following guidelines are provided to ensure your safety:
- This unit should be mounted at the bottom of the rack if it is the only unit in the rack.
- When mounting this unit in a partially filled rack, load the rack from the bottom to the top with the heaviest component at the bottom of the rack.
- If the rack is provided with stabilizing devices, install the stabilizers before mounting or servicing the unit in the rack.
2.3 Installing the Rails
There are a variety of rack units on the market, which may require a slightly different assembly procedure.
The following is a basic guideline for installing the system into a rack with the rack mounting hardware provided. You should also refer to the installation instructions that came with the specific rack you are using.
Identifying the Rails
The chassis package includes two rail assemblies. Each assembly consists of three sections: An inner rail that secures directly to the chassis, an outer rail that secures to the rack, and a middle rail which extends from the outer rail. These assemblies are specifically designed for the left and right side of the chassis.

text_image
Rail Assembly (Shown with Rails Retracted) Outer Rail Middle Rail Locking Tab Inner Rail This Side Faces OutwardFigure 2-1. Identifying the Rail Sections

Slide rail mounted equipment is not to be used as a shelf or a work space.

Warning: do not pick up the server with the front handles. They are designed to pull the system from a rack only.
Releasing the Inner Rail
Each inner rail has a locking latch. This latch prevents the server from coming completely out of the rack when the chassis is pulled out for servicing.
To mount the rail onto the chassis, first release the inner rail from the outer rails.
Releasing Inner Rail from the Outer Rails
- Pull the inner rail out of the outer rail until it is fully extended as illustrated below.
- Press the locking tab down to release the inner rail.
- Pull the inner rail all the way out.
- Repeat for the other outer rail.

text_image
Diagram illustrating three-step assembly steps of a mechanical component, labeled 1, 2, and 3 with directional arrows.Figure 2-2. Extending and Releasing the Inner Rail
Installing the Inner Rails on the Chassis
Installing the Inner Rails
- Identify the left and right inner rails. They are labeled.
- Place the inner rail firmly against the side of the chassis, aligning the hooks on the side of the chassis with the holes in the inner rail.
- Slide the inner rail forward toward the front of the chassis until the quick release bracket snaps into place, securing the rail to the chassis.
- Optionally, you can further secure the inner rail to the chassis with a screw.
- Repeat for the other inner rail.

text_image
Inner Rails 2 3 4Figure 2-3. Installing the Inner Rails

natural_image
Line drawing of a server rack unit with multiple ports and mounting brackets (no text or symbols)Figure 2-4. Inner Rails Installed on the Chassis
Installing the Outer Rails onto the Rack
Installing the Outer Rails
-
Press upward on the locking tab at the rear end of the middle rail.
-
Push the middle rail back into the outer rail.
-
Hang the hooks on the front of the outer rail onto the square holes on the front of the rack. If desired, use screws to secure the outer rails to the rack.
-
Pull out the rear of the outer rail, adjusting the length until it just fits within the posts of the rack.
-
Hang the hooks of the rear section of the outer rail onto the square holes on the rear of the rack. Take care that the proper holes are used so the rails are level. If desired, use screws to secure the rear of the outer rail to the rear of the rack.
-
Repeat for the other outer rail.

text_image
Technical diagram illustrating four stages of a mechanical assembly or mounting mechanism with labeled components and directional arrows.Figure 2-5. Extending and Mounting the Outer Rails
Note: Both front chassis rails and the rack rails have a locking tab, which serves two functions. First, it locks the server into place when installed and pushed fully into the rack (its normal operating position. In addition, these tabs lock the server in place when fully extended from the rack. This prevents the server from coming completely out of the rack when pulled out for servicing.

Warning: Stability hazard. The rack stabilizing mechanism must be in place, or the rack must be bolted to the floor before you slide the unit out for servicing. Failure to stabilize the rack can cause the rack to tip over.
Sliding the Chassis onto the Rack Rails

Warning: Mounting the system into the rack requires at least two people to support the chassis during installation. Please follow safety recommendations printed on the rails.
Installing the Chassis into a Rack
-
Extend the outer rails as illustrated above.
-
Align the inner rails of the chassis with the outer rails on the rack.
-
Slide the inner rails into the outer rails, keeping the pressure even on both sides. When the chassis has been pushed completely into the rack, it should click into the locked position.
-
Optional screws may be used to hold the front of the chassis to the rack.

text_image
Ball-Bearing ShuttleFigure 2-6. Installing into a Rack

Caution: Do not pick up the server with the front handles. They are designed to pull the system from a rack only.
Note: Figure is for illustrative purposes only. Always install servers to the bottom of a rack first.
Chapter 3
Maintenance and Component Installation
This chapter provides instructions on installing and replacing main system components. To prevent compatibility issues, only use components that match the specifications and/or part numbers given.
Installation or replacement of most components require that power first be removed from the system. Please follow the procedures given in each section.
3.1 Removing Power
Use the following procedure to ensure that power has been removed from the system. This step is necessary when removing or installing non hot-swap components or when replacing a non-redundant power supply.
- Use the operating system to power down the system.
- After the system has completely shut-down, disconnect the AC power cord(s) from the power strip or outlet. (If your system has more than one power supply, remove the AC power cords from all power supply modules.)
- Disconnect the power cord(s) from the power supply module(s).
3.2 Removing the Top Covers
Mid-chassis Cover
The mid-chassis cover can be removed to access the mid-chassis drives or fans while the server continues to operate.
Warning: Except for short periods of time, do not operate the server without the cover in place. The chassis cover must be in place to allow for proper airflow and to prevent overheating.

text_image
Remove Screw Push Button Remove Screw Push ButtonFigure 3-1. Removing the Mid-chassis Cover
Removing the Mid-chassis Cover
Remove the two screws securing each side of the cover, push in the release buttons, then lift the cover.
Caution: Do not operate the for long periods of time without the covers. They are important for system cooling.
Rear Cover
Removing the Rear Cover
Remove the thumbscrew at the rear of the chassis, then slide the cover to the rear and off.

text_image
Remove ScrewFigure 3-2. Removing the Rear Cover
3.3 Processor and Heatsink Installation
Processor and Heatsink Installation
The processor (CPU) and heatsink should be assembled together first to form the processor heatsink module (PHM), and then install the PHM into the CPU socket.
Caution: Use ESD protection. Do not touch the underside of the CPU. Improper installation or socket misalignment can cause serious damage to the CPU or socket which may require manufacturer repairs.
Notes:
- All power should be off, as described in Section 3.1, before installing the processors.
- When handling the processor package, avoid placing direct pressure on the label area of the CPU or socket.
- Check that the plastic socket dust cover is in place and none of the socket pins are bent—otherwise, contact your retailer.
• Refer to the Supermicro website for updates on CPU support. - Graphics in this manual are for illustration. Your components may look slightly different.
The Intel® Xeon® 81xx/61xx/51xx/41xx/31xx and 82xx/62xx/52xx/42xx/32xx series Series Processors
Note: The Intel® Xeon® 81xx/61xx/51xx/41xx/31xx and 82xx/62xx/52xx/42xx/32xx series processors contain two models - the F model processors and the Non-F model processors. This motherboard supports the Non-F model processors only.

natural_image
Technical line drawing of a rectangular electronic component with mounting holes and internal channels (no text or symbols)Intel® Processor (Non-F Model)
Note: All graphics, drawings, and pictures shown in this manual are for illustration only. The components that came with your machine may or may not look exactly the same as those shown in this manual.
Overview of the Processor Socket Assembly
The processor socket assembly contains 1) the Intel® Xeon® 81xx/61xx/51xx/41xx/31xx and 82xx/62xx/52xx/42xx/32xx series processor, 2) the narrow processor clip, 3) the dust cover, and 4) the CPU socket.
- The Intel® Xeon® 81xx/61xx/51xx/41xx/31xx and 82xx/62xx/52xx/42xx/32xx series Processor

natural_image
Line drawing of a rectangular electronic device casing with mounting holes (no text or symbols)(The Intel® Xeon® 81xx/61xx/51xx/41xx/31xx and 82xx/62xx/52xx/42xx/32xx series Processor)
- Narrow processor clip (the plastic processor package carrier used for the CPU)

natural_image
Technical line drawing of a mechanical bracket or frame structure (no text or symbols)(for the non-F Model)
- Dust Cover

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Line drawing of a microchip component with mounting holes and a central display panel (no text or symbols)- CPU Socket

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Technical line drawing of a mechanical component with mounting holes and internal grid structure (no text or symbols)Note: Be sure to cover the CPU socket with the dust cover when the CPU is not installed.
Overview of the Processor Heatsink Module (PHM)
The Processor Heatsink Module (PHM) contains 1) a heatsink, 2) a narrow processor clip, and 3) the Intel® Xeon® 81xx/61xx/51xx/41xx/31xx and 82xx/62xx/52xx/42xx/32xx series processor.
-
Heatsink
-
Narrow processor clip
-
Intel® Processor
Processor Heatsink Module (PHM)

Assembling the Processor Package
Attach the processor to the thin processor clip to create the processor package.
- On the top corner of the CPU, locate pin 1 (A), marked by a triangle. Also, locate notch B and notch C (and notch D for F models) on the CPU as shown below.
- On the top of the processor clip, locate the corner marked by a hollow triangle as the position for pin 1. Also locate notch B and notch C (and D for F models) on the processor clip.
- Align pin 1 of the CPU with its proper position on the processor clip and carefully insert the CPU into the processor clip. Slide notch B of the CPU into tab B of the processor clip, and slide notch C of the CPU into tab C of the processor clip (and D for F models) until the processor clip tabs snap onto the CPU.
- Examine all corners to ensure that the CPU is properly seated and secure on the processor clip.
The processor package assembly is created.

text_image
CPU (Upside Down) w/CPU LGA Lands up C Align Notch C of the CPU and Notch C of the Processor Clip Pin 1 A Align Notch B of the CPU and Notch B of the Processor Clip B Align CPU Pin 1 CPU/Heatsink Package (Upside Down) C Allow Notch C to latch on to CPU C Allow Notch B to latch on to CPU AProcessor Package Assembly for the non-F Model Processors
Installing the Processor Heatsink Module (PHM)
- Locate the triangle (pin 1) on the CPU socket. Also locate the pin 1 corner of the PHM that is closest to "1" on the heatsink label. To confirm, look at the underside of the PHM and note the hollow triangle in the processor clip and printed triangle on the CPU located next to a screw at the corner.
- Align the pin 1 corner of the PHM over the pin 1 corner on the CPU socket.
- Align the two holes at diagonal corners of the PHM onto the two guide posts on the socket bracket and carefully lower the PHM onto the socket.
- Use a T30 Torx-bit screwdriver to install four screws into the mounting holes on the socket to securely attach the PHM onto the motherboard in the sequence of 1, 2, 3, and 4, as marked on the heatsink label. Gradually tighten each to assure even pressure.
Note: Use only 12 foot-pounds of torque when tightening the screws to avoid damaging the processor or the socket.

text_image
Oval C Oval D Large Guiding Post Small Guiding Post Printed Triangle Mounting the Processor Heatsink Module into the CPU socket (on the motherboard) Tighten the screws in the sequence of 1, 2, 3, 4 (top 3 quarter view) Use a torque of 12 lbf T30 Torx Driver #1 #2 #3Installing the Processor Heatsink Module
Removing the Processor Heatsink Module from the Motherboard
Before removing the processor heatsink module (PHM), power down as described in Section 3.1.
- Using a T30 Torx-bit screwdriver, loosen and remove the screws on the PHM from the socket, starting with the screw marked #4, in the sequence of 4, 3, 2, 1.
- Pull up the PHM while releasing the small snap tabs on two corners of the socket.

text_image
Removing the screws in the sequence of 4, 3, 2, 1 #1 #2 #3 Printed Triangle on Motherboard
text_image
CPU Socket After removing the screws, lift the Processor Heatsink Module off the CPU socket.Removing the Processor Heatsink Module
3.4 Memory Support and Installation
Important: Exercise extreme care when installing or removing DIMM modules to prevent any damage.
ESD Precautions
Electrostatic Discharge (ESD) can damage electronic components including memory modules. To avoid damaging your DIMM modules, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD.
Precautions
- Use a grounded wrist strap designed to prevent static discharge.
- Handle the memory module by its edges only.
- Put the memory modules into the antistatic bags when not in use.
- Check the Supermicro website for recommended memory modules
Introduction to Intel® Optane DC Persistent Memory
Intel® 82xx/62xx/52xx/4215 supports new DCPMM (Optane™ DC Persistent Memory Modules) technology. DCPMM offers data persistence with higher capacity at lower latencies than the existing memory modules and provides hyper-speed storage capability for high performance computing platforms with flexible configuration options.
Memory Support
The motherboard supports up to 6 TB of 3DS Load Reduced DIMM (3DS LRDIMM), 3DS Registered DIMM (3DS RDIMM) DDR4 (288-pin) ECC of up to 2933/2666 MHz memory modules in 24 slots. Populating the DIMM slots in a 2DPC (two DIMMs per channel) configuration with pairs of memory modules of the same type, speed and size will result in interleaved memory, which improves performance.
Note: 2933 MHz memory is supported by the 82xx/62xx series processors only.
| DDR4 Memory Support for 81xx/61xx/51xx/41xx/31xx Processors | ||||||
| Type | Ranks Per DIMM and Data Width | DIMM Capacity (GB) | Speed (MT/s) | |||
| One Slot per Channel | Two Slots per Channel | |||||
| DRAM Density | One DIMM per Channel | One DIMM per Channel | Two DIMMs per Channel | |||
| 4 Gb 8 Gb | 1.2 Volts 1.2 Volts 1.2 Volts | |||||
| RDIMM | SRx4 4 GB | 8 GB | 2666 2666 2666 | |||
| SRx8 8 GB | 16 GB | |||||
| DRx8 8 GB | 16 GB | |||||
| DRx4 16 GB | 32 GB | |||||
| RDIMM 3Ds | QRX4 N/A | 2H-64GB | ||||
| 8RX4 N/A | 4H-128GB | |||||
| LRDIMM QRx4 | 32 GB 64 GB | |||||
| LRDIMM 3Ds | QRx4 N/A | 2H-64GB | ||||
| 8Rx4 N/A | 4H-128 GB | |||||
| DDR4 Memory Support for 82xx/62xx/52xx/42xx/32xx Processors | |||||||
| Type | Ranks Per DIMM and Data Width | DIMM Capacity (GB) | Speed (MT/s) | ||||
| One Slot per Channel | Two Slots per Channel | ||||||
| DRAM Density | One DIMM per Channel | One DIMM per Channel | Two DIMMs per Channel | ||||
| 4 Gb 8 | Gb 16 Gb 1 | 2 Volts 1.2 Volts 1.2 Volts | |||||
| RDIMM | SRx4 | 4 GB | 8 GB | 16 GB | 2933 | 2933 | 2933 |
| SRx8 | 8 GB | 16 GB | 32 GB | ||||
| DRx8 | 8 GB | 16 GB | 32 GB | ||||
| DRx4 | 16 GB | 32 GB | 64 GB | ||||
| RDIMM 3Ds | QRX4 | N/A 2H-64GB | 2H-128GB | ||||
| 8RX4 | N/A 4H-128GB | 4H-256GB | |||||
| LRDIMM | QRx4 | 32 GB | 64 GB | 128 GB | |||
| LRDIMM 3Ds | QRx4 | N/A 2H-64GB | 2H-64GB | ||||
| 8Rx4 | N/A 4H-128 GB | 4H-256 GB | |||||
Memory Installation Sequence
Memory modules for the X11 UP/DP/MP motherboards are populated using the "Fill First" method. The blue memory slot of each channel is considered the "first DIMM module" of the channel, and the black slot, the second module of the channel. When installing memory modules, be sure to populate the blue memory slots first and then populate the black slots. To maximize memory capacity and performance, please populate all DIMM slots on the motherboard, including all blue slots and black slots.
General Memory Population Requirements
- Be sure to use the memory modules of the same type and speed on the motherboard. Mixing of memory modules of different types and speeds is not allowed.
- Using unbalanced memory topology such as populating two DIMMs in one channel while populating one DIMM in another channel on the same motherboard will result in reduced memory performance.
- Populating memory slots with a pair of DIMM modules of the same type and size will result in interleaved memory, which will improve memory performance.
DIMM Population Guidelines for Optimal Performance
For optimal memory performance, follow the instructions listed in the tables below when populating memory modules.
Key Parameters for DIMM Configuration
| Key Parameters for DIMM Configurations | |
| Parameters Possible Values | |
| Number of Channels 1, 2, | 3, 4, 5, or 6 |
| Number of DIMMs per Channel | 1DPC (1 DIMM Per Channel) or 2DPC (2 DIMMs Per Channel) |
| DIMM Type RDIMM (w/ECC), 3DS RDIMM, LRDIMM, 3DS LRDIMM | |
| DIMM Construction non-3 | DS RDIMM Raw Cards: A/B (2Rx4), C (1Rx4), D (1Rx8), E (2Rx8)3DS RDIMM Raw Cards: A/B (4Rx4)non-3DS LRDIMM Raw Cards: D/E (4Rx4)3DS LRDIMM Raw Cards: A/B (8Rx4) |
DIMM Mixing Guidelines
| General DIMM Mixing Guidelines |
| All DIMMs must be all DDR4 DIMMs.x4 and x8 DIMMs can be mixed in the same channel.Mixing of LRDIMMs and RDIMMs is not allowed in the same channel, across different channels, and across different sockets.Mixing of non-3DS and 3DS LRDIMM is not allowed in the same channel, across different channels, and across different sockets. |
| Mixing of DIMM Types within a Channel | |||
| DIMM Types RDIMM | LRDIMM 3DS LRDIMM | ||
| RDIMM Allowed Not Allowed | Not Allowed | Allowed | Not Allowed |
| LRDIMM | Not Allowed | Allowed | Not Allowed |
| 3DS LRDIMM | Not Allowed | Not Allowed | Allowed |
Note: Unbalanced memory configuration decreases memory performance and is not recommended for Supermicro motherboards.
| Memory Population Table for the X11DP Motherboard w/24 DIMM Slots Onboard | |
| CPUs/DIMMs Memory Population Sequence | |
| 1 CPU & 1 DIMM CPU1: P1-DIMMA1 | |
| 1 CPU & 2 DIMMs CPU1: P1-DIMMA1/P1-DIMMD1 | |
| 1 CPU & 3 DIMMs CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1 | |
| 1 CPU & 4 DIMMs CPU1: P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1 | |
| 1 CPU & 5 DIMMs* CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1 | |
| 1 CPU & 6 DIMM CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1 | |
| 1 CPU & 7 DIMMs* | CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD1/P1-DIMME1/P1-DIMMF1 |
| 1 CPU & 8 DIMMs | CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1 |
| 1 CPU & 9 DIMMs* | CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD1/P1-DIMME1/P1-DIMMF1 |
| 1 CPU & 10 DIMMs* | CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1 |
| 1 CPU & 11 DIMMs* | CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1 |
| 1 CPU & 12 DIMMs | CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1 |
| 2 CPUs & 2 DIMMs | CPU1: P1-DIMMA1CPU2: P2-DIMMA1 |
| 2 CPUs & 4 DIMMs | CPU1: P1-DIMMA1/P1-DIMMD1CPU2: P2-DIMMA1/P2-DIMMD1 |
| 2 CPUs & 6 DIMMs | CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1 |
| 2 CPUs & 8 DIMMs | CPU1: P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1CPU2: P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1 |
| 2 CPUs & 10 DIMMs | CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1CPU2: P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1 |
| 2 CPUs & 12 DIMMs | CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1 |
| 2 CPUs & 14 DIMMs | CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1 |
| 2 CPUs & 16 DIMMs | CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1CPU2: P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1 |
| 2 CPUs & 18 DIMMs | CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1 |
| 2 CPUs & 20 DIMMs | CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1CPU2: P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1 |
| 2 CPUs & 22 DIMMs* | CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1CPU2: P2-DIMMC1/P2-DIMMC2/P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1/P2-DIMMF1 |
| 2 CPUs & 24 DIMMs | CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1CPU2: P2-DIMMC1/P2-DIMMC2/P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1/P2-DIMMF2/P2-DIMMF1 |
*Unbalanced, not recommended.
Note: Please refer to the drawing on the next page for the locations of DIMM modules.
| Symmetric Population within 1 CPU Socket | |||||||||||||
| Modes | P1-DIMMF1 | P1-DIMMF2 | P1-DIMME1 | P1-DIMME2 | P1-DIMMD1 | P1-DIMMD2 | P1-DIMMA2 | P1-DIMMA1 | P1-DIMMB2 | P1-DIMMB1 | P1-DIMMC2 | P1-DIMMC1 | Channel Config. |
| AD DRAM1 | DCPMM | DRAM1 | DCPMM | DM1 | DCPMM | DCPMM | DRAM1 | DCPMM | DRAM1 | DCPMM | M1 2-2-2 | ||
| MM DRAM1 | DCPMM | DRAM1 | DCPMM | DM1 | DCPMM | DCPMM | DRAM1 | DCPMM | DRAM1 | DCPMM | DRAM1 2-2-2 | ||
| AD + MM | DRAM3 | DCPMM | DRAM3 | DCPMM | DM3 | DCPMM | DRAM3 | DCPMM | DRAM3 | DCPMM | DRAM3 2-2-2 | ||
| AD DRAM1 | - DRAM1 | - | DRAM1 | DCPMM | DM1 | - DRAM1 | - | DRAM1 | 2-1-1 | ||||
| MM DRAM2 | - DRAM2 | - | DRAM2 | DCPMM | DM2 | - DRAM2 | - | DRAM2 | 2-1-1 | ||||
| AD + MM | DRAM3 | - | DRAM3 | DCPMM | DCPMM | DRAM3 | - | DRAM3 | 2-1-1 | ||||
| AD DRAM1 | - DRAM1 | DCPMM | DRAM1 | DCPMM | DM1 | DCPMM | DRAM1 | DCPMM | DRAM1 | 2-1-1 | |||
| MM DRAM1 | - DRAM1 | DCPMM | DRAM1 | DCPMM | DM1 | DCPMM | DRAM1 | DCPMM | DRAM1 | 2-1-1 | |||
| AD + MM | DRAM3 | - | DRAM3 | DCPMM | DM3 | DCPMM | DRAM3 | DCPMM | DRAM3 | 2-2-1 | |||
| AD DCPMM | - DRAM1 | - | DRAM1 | - | DRAM1 | - | DRAM1 | - | DCPMM | 1-1-1 | |||
| MM DCPMM | - DRAM1 | - | DRAM1 | - | DRAM1 | - | DRAM1 | - | DCPMM | 1-1-1 | |||
| AD + MM | DCPMM | - | DRAM3 | - | DRAM3 | - | DRAM3 | - | DCPMM | 1-1-1 | |||
| AD DCPMM | - DRAM1 | - | DRAM1 | DRAM1 | DM1 | DRAM1 | DRAM1 | DRAM1 | DRAM1 | - DCPMM | 2-2-1 | ||
| Asymmetric Population within 1 CPU Socket | |||||||||||||
| Modes | P1-DIMMF1 | P1-DIMMF2 | P1-DIMME1 | P1-DIMME2 | P1-DIMMD1 | P1-DIMMD2 | P1-DIMMA2 | P1-DIMMA1 | P1-DIMMB2 | P1-DIMMB1 | P1-DIMMC2 | P1-DIMMC1 | Channel Config. |
| AD DRAM1 - DRAM1 - DRAM1 - DCPMM DRAM1 - DRAM1 - DRAM1 2/1-1-1 | |||||||||||||
| AD* DRAM1 - DRAM1 - DRAM1 - DCPMM DRAM1 - DRAM1 - DRAM1 2/1-1-1 | |||||||||||||
| Legend (for the two tables above) | |||||
| DDR4 Type Capacity | |||||
| DRAM1 RDIM | M 3DS RDIM | M LRDIMM 3DS | LRDIMM Any | Capacity | |
| DRAM2 RDIM | M | - | - | Refer to Validation Matrix (DDR4 DIMMs validated with DCPMM) below. | |
| DRAM3 RDIM | M 3DS RDIMM | LRDIMM | - | ||
Note: DDR4 single rank x8 is not available for DCPMM Memory Mode or App-Direct Mode.
| Legend (-for the two tables above) | |
| Capacity | |
| DCPMM | Any Capacity (Uniformly for all channels for a given configuration) |
• * 2nd socket has no DCPMM DIMM
- For MM, general NM/FM ratio is between 1:4 and 1:16. Excessive capacity for FM can be used for AD. (NM = Near Memory; FM = Far Memory)
- For each individual population, rearrangements between channels are allowed as long as the resulting population is compliant with the PDG rules for the 82xx/62xx/52xx/42xx platform.
- For each individual population, please use the same DDR4 DIMM in all slots.
- For each individual population, sockets are normally symmetric with exceptions for 1 DCPMM per socket and 1 DCPMM per node case. Currently, DCPMM modules operate at 2666 MHz.
- No mixing of DCPMM and NVMDIMMs within the same platform is allowed.
- This DCPMM population guide targets a balanced DCPMM-to-DRAM-cache ratio in MM and MM + AD modes.
| Validation Matrix (DDR4 DIMMs Validated w/DCPMM) | |||
| DIMM Type | Ranks Per DIMM & Data Width (Stack) | DIMM Capacity (GB) | |
| DRAM Density | |||
| 4Gb 8Gb | |||
| RDIMM | 1Rx4 8GB 16GB | ||
| 2Rx8 8GB 16GB | |||
| 2Rx4 16GB 32GB | |||
| LRDIMM 4Rx4 N/A 64GB | |||
| LRDIMM 3DS 8Rx4 (4H) N/A 128GB | |||
DIMM Installation
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Follow the instructions given in the memory population guidelines listed in the previous sections to install memory modules on your motherboard. For the system to work properly, please use memory modules of the same type and speed on the motherboard. (See the Note below.)
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Push the release tabs outwards on both ends of the DIMM slot to unlock it.
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Align the key of the DIMM module with the receptive point on the memory slot.
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Align the notches on both ends of the module against the receptive points on the ends of the slot.
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Use two thumbs together to press the DIMM module straight down into the slot until the module snaps into place.
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Press the release tabs to the lock positions to secure the DIMM module into the slot.

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Circuit board layout diagram with labeled components and highlighted green regions indicating specific areas or zones.
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NC Notches
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Release TabsInsert the DIMM module into the memory slot.

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Illustration of two hands holding a metal rod with blue arrows indicating direction (no text or symbols)DIMM Module Removal
Press the release tabs on both ends of the DIMM socket to release the DIMM module from the socket as shown in the drawing on the right.

Warning! 1. T to avoid damage to the DIMM module or the DIMM socket, do not use excessive force when pressing the release tabs on the ends of the DIMM socket. 2. Handle DIMM modules with care. Carefully follow all the instructions given in Section 1 of this user guide to avoid ESD-related damage to your components or system. 3. All graphics, including the layout drawing above, are for reference only. Your system components may or may not look the same as shown in this user guide.
3.5 Mezzanine Card Installation (Optional)
For SAS 3.0 support, be sure to follow the instructions below to install the mezzanine card on the CPU JMEZZ1/2-PCI-E 3.0 located on the motherboard.

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Green printed circuit board with various electronic components and labels (no readable text or symbols beyond product markings)Image of the Mezzanine Card
- After installing the motherboard in the chassis, align the mezzanine card(s) with the AOM PCI-E 3.0 slot(s) on the motherboard.

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CPU JMEZZ1/2 PCI-E 3.0 x8 Slots- With both hands, press the mezzanine card down into the slot.

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MOZZANING CARD MOZZ LRRUARD- With the mezzanine card securely placed in the slot, insert Pan Head #6 screws into the three standoff holes and tighten them with a Phillips screwdriver.

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Screw #1 Screw #2 Screw #3Motherboard Battery
The motherboard uses non-volatile memory to retain system information when system power is removed. This memory is powered by a lithium battery residing on the motherboard.
Replacing the Battery
Begin by removing power from the system as described in section 3.1.
- Push aside the small clamp that covers the edge of the battery. When the battery is released, lift it out of the holder.
- To insert a new battery, slide one edge under the lip of the holder with the positive (+) side facing up. Then push the other side down until the clamp snaps over it.
Note: Handle used batteries carefully. Do not damage the battery in any way; a damaged battery may release hazardous materials into the environment. Do not discard a used battery in the garbage or a public landfill. Please comply with the regulations set up by your local hazardous waste management agency to dispose of your used battery properly.

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LITHIUM BATTERY BATTERY HOLDERFigure 3-3. Installing the Onboard Battery
Warning: There is a danger of explosion if the onboard battery is installed upside down (which reverses its polarities). This battery must be replaced only with the same or an equivalent type recommended by the manufacturer (CR2032).
3.6 Chassis Components
Removing Power from the System
Before performing some setup or maintenance tasks, use the following procedure to ensure that power has been removed from the system.
Powering Down the System
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Use the operating system to power down the node, following the on-screen prompts.
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After the system has completely shut-down, carefully grasp the head of the power cord and gently pull it out of the back of the power supply. If your system has dual power supplies, remove the cords from both power supplies.
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Disconnect the cords from the power strip or wall outlet.
Removing the Top Covers
Mid-chassis Cover
The mid-chassis cover can be removed to access the mid-chassis drives or fans while the server continues to operate.
Removing the Mid-chassis Cover
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Remove the two screws securing each side of the cover
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Push in the release buttons, then lift the cover.
Caution: Do not operate the for long periods of time without the covers. They are important for system cooling.

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Remove Screw Push Button Push Button Remove ScrewFigure 3-4. Removing the Mid-chassis Cover
Rear Cover
Removing the Rear Cover
- Remove the thumbscrew at the rear of the chassis
- Slide the cover to the rear and off.

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Remove ScrewFigure 3-5. Removing the Rear Cover
Hard Drives
The SC226STS chassis supports forty-eight (48) 2.5" SAS3/SATA/NVMe (up to four) hard disk drives. They can be removed without powering down the system if your operating system supports RAID.
There are also two hot-swap 2.5" hard drive bays in the rear.
Note: Enterprise level hard disk drives are recommended for use in Supermicro chassis and servers. For information on recommended HDDs, visit the Supermicro website at http://www.supermicro.com/products/nfo/files/storage/SBB-HDDCompList.pdf
Drive Connections
Drive slot numbers 0-23 are attached through the front backplane which is connected to the Add-On-Module. Drive slots 24-47 are attached through the mid-backplane which uses a cascaded connection from the front backplane.

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Drives #24 #25 #26 ... #47Attached to Mid-Backplane Drives #0 #1 #2 ... Attached to Front Backplane #23Figure 3-6. Drive Numbers and Connections
Drive Carriers
The drives are mounted in drive carriers to simplify their installation and removal from the chassis. These carriers also help promote proper airflow through the drive bays. Each drive carrier has two LED indicators. These are described later in this section.
Removing Drive Carriers from the Chassis
- To access mid-chassis drives, open the mid-chassis cover and lift the drive rack.
- Press the release button on the drive carrier, which will extend the drive carrier handle.
- Use the drive carrier handle to pull the drive out of the chassis.

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Technical illustration of a server rack with a device and a green arrow indicating direction (no text or symbols)
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Diagram showing a server rack with labeled components and a magnified view of the internal structure, likely illustrating a device or hardware assembly.Figure 3-7. Removing a Drive Carrier
Installing a Hard Disk Drive
- Remove the screws securing the dummy drive to the carrier.

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DC-018-002-XX DC-018-002-XXFigure 3-8. Removing a Dummy Drive from the Drive Carrier
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Remove the dummy drive from the carrier.
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Insert the drive into the carrier with the printed circuit board side facing downward and so that the mounting holes in the drive align with those in the carrier.
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Secure the drive to the carrier with the four screws included with the drive.
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Insert the drive and carrier into its bay vertically, keeping the carrier oriented so that the release button is on the bottom. When the carrier reaches the rear of the bay, the release handle will retract.
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Using the thumb, push against the upper part of the drive carrier handle until it clicks into the locked position.

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Diagram of a hand operating a device with a green arrow indicating direction (no text or symbols present)Figure 3-9. Pushing the Drive Carrier into Place
Caution: Except for short periods of time, such as swapping hard drives, do not operate the server with the hard drive bays empty.
Installing Rear Hard Drives
The two 2.5" drives in the rear of the chassis are installed in the same way as the main storage drives.

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Cage for Rear HDDs RFigure 3-10. Rear HDDs
Drive Carrier LEDs
The chassis includes externally accessible SAS/SATA/NVMe drives. Each drive carrier displays two status LEDs on the front of the carrier.
| LED Color State Status | |||
| Activity LED | Blue Solid On SAS/NVMe drive installed | ||
| Blue Blinking I/O activity | |||
| Status LED | Red Solid On Failed drive for SAS/SATA/NVMe with RSTe support | ||
| Red Blinking at 1 Hz Rebuild drive for SAS/SATA/NVMe with RSTe support | |||
| Red Blinking with two blinks and one stop at 1 Hz | Hot spare for SAS/SATA/NVMe with RSTe support | ||
| Red | On for five seconds, then off | Power on for SAS/SATA/NVMe with RSTe support | |
| Red Blinking at 4 Hz Identify drive for SAS/SATA/NVMe with RSTe support | |||
| Green Solid On Safe to remove NVMe device | |||
| Amber Blinking at 1 Hz Attention state—do not remove NVMe device | |||
PCI Expansion Card Installation
The system provides three PCI slots for low profile, full-length expansion cards.
Installing an Expansion Cards
- Power down the system, and remove both covers, as described previously in this section.
- In the rear of the chassis, remove the screw securing the PCI slot shield in the PCI slot that you wish to use.
- Slide the expansion card bracket into the open PCI slot while plugging the expansion card into the motherboard.
- Secure the expansion card bracket into the PCI slot using the screw previously set aside.
- Replace the top covers and power up the system.

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Technical line drawing of a computer motherboard with a mounted component (no text or symbols)Figure 3-11. Removing the PCI Slot Shield
Installing a SIOM Card
The SIOM card provides options for network connection. It is inserted into a SIOM slot on the motherboard. This installation is usually performed by a system integrator or manufacturer.
Installing a SIOM Card
- Power down the system.

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R Cover Retaining ScrewFigure 3-12. SIOM Card Position on Chassis Rear

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SiOM card with the bracket installed Insert the SIOM card into this slotFigure 3-13. Inserting SIOM Card
- Remove the small section of the chassis rear to allow access to the motherboard SIOM slot. Unscrew the single retaining screw to remove the cover.
- Position the card with its cover bracket in front of the SIOM slot and gently push in both sides of the card until it slides into the slot.
- Secure the SIOM card cover bracket to the chassis with the screw.
Installing Front Optional NVMe Drives with Cable
Front mounted NVMe drives can be installed in the chassis with an optional kit. The NVMe kit set comes with:
• 4x CBL-SAST-0929 cables
• 4x MCP-220-00121-0B
Removing the server from the rack is required for this installation.
Installing the Optional Front NVMe Drives
- Follow the steps for shutting down power and removing the mid-chassis cover from the system from Sections 3.1 and 3.2.
- After removing the rear cover, remove the black plastic cable management shield by pulling on the two black knobs on each side shown below.

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Technical line drawing of an internal computer rack with labeled ports and connectors (no readable text or symbols)Figure 3-14. Knobs Securing the Cable Management Shield
- You will see the power distribution board with a metal platform supporting it as shown below. Remove the smaller metal piece securing it and remove this metal platform.

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Technical line drawing of an internal computer motherboard with visible ports, connectors, and a highlighted component (no text or labels)Figure 3-15. Removing the Metal Platform Supporting the Power Distribution Board
- Unplug the power cable (location shown below) from the motherboard. Be extremely careful while un-installing this cable when reaching underneath to the motherboard.

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Interior view of a computer drive bay showing internal components and connectors (no text or labels visible)Figure 3-16. Unplugging the Power Cable
- Disconnect the power supplies, then unscrew the two knobs shown below and carefully flip the metal platform up and off.

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Back panel of a server rack with ports, connectors, and ventilation grilles (no visible text or labels)Figure 3-17. Removing the Knobs Securing the Metal Platform
- Locate the four NVMe ports as shown in the motherboard below.

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SNK-C0016L SNK H-13mm keep out zone 3.5mmFigure 3-18. Locating the NVMe Ports on the Motherboard
- Connect the four CBL-SAST-0929 cables from the motherboard P1_NVMe0 - P1_NVMe3 ports to the second backplane's JSM4 – JSM7 ports respectively as shown below. Please notice that the arrangement of ports on the backplane is not in sequence due to design limitations.

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JSM7 JSM6 JSM5 JSM4Figure 3-19. NVMe Ports
- The four NVMe drives have to be installed in the last four slots of the second backplane, namely slots 44-47. In addition, it is recommended that you always install the NVMe drives in an ascending matter, for instance install drive slot 44 first.
- Please follow installation instruction from section "Installing a Hard Disk Drive" for drive tray installation.
System Cooling
Five heavy-duty fans provide cooling for the system. They can be replaced without powering down the system.
Replacing a System Fan
- If necessary, open the chassis while the power is running to determine which fan requires changing. (Never run the server for an extended period of time with the chassis open.)
- Open the mid-chassis cover, as described previously in this section.
- Press the fan release tab to lift the failed fan from the chassis and pull it completely out of the chassis.
- Place the new fan into the vacant space in the housing while making sure the arrows on the top of the fan (indicating air direction) point in the same direction as the arrows on the other fans.
- The fan will automatically begin running at the correct speed.

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Release TabFigure 3-20. System Fan

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Isometric technical diagram of a server rack with cooling fans and ventilation slots (no text or labels)Figure 3-21. Placing a System Fan
Installing the Air Shrouds
Air shrouds concentrate airflow to maximize fan efficiency. They do not require screws for installation.
Installing the Air Shroud
- Power down the system, as described previously in this section. Remove both the covers.
- Place the air shroud in the chassis. The air shroud fits just behind the five fans in the fan rack.
- Align the mounting holes in the air shroud with those in the chassis and secure them with the four screws provided with the air shroud.
- Replace both chassis covers and power up the system.

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Technical line drawing of a server rack with multiple drive bays and ventilation ducts (no text or labels)Figure 3-22. Air Shroud Installation
Power Supply
The chassis features redundant power supplies. The power modules can be changed without powering down the system. New units can be ordered directly from Supermicro or authorized distributors.
These power supplies are auto-switching capable. This feature enables them to automatically sense the input voltage and operate at a 100-120v or 180-240v. An amber light will be illuminated on the power supply when the power is off. An illuminated green light indicates that the power supply is operating.
Changing the Power Supply:
- Unplug the AC cord from the module to be replaced.

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3 Release TabFigure 3-23. Power Supply Release Tab
- Push the release tab on the back of the power supply as illustrated.
- Pull the power supply out using the handle provided.
- Replace the failed power module with the same model.
- Push the new power supply module into the power bay until it clicks.
- Plug the AC power cord back into the module.
Chapter 4
Motherboard Connections
This section describes the connections on the motherboard and provides pinout definitions. Note that depending on how the system is configured, not all connections are required. The LEDs on the motherboard are also described here. A serverboard layout indicating component locations may be found in Chapter 1.
Please review the Safety Precautions in Chapter 3 before installing or removing components.
4.1 Power Connections
ATX and CPU Power Connectors
JPWR1 is the 24-pin ATX main power supply connector. This primary power supply connector meets the ATX SSI EPS 24-pin specification. You must also connect the 8-pin (JPWR2/JPWR3) CPU power connectors to your power supply.
| ATX Power 24-pin Connector Pin Definitions | |||
| Pin# | Definition | Pin# | Definition |
| 13 | +3.3V | 1 +3.3V | |
| 14 | NC | 2 +3.3V | |
| 15 | Ground | 3 Ground | |
| 16 | PS_ON | 4 +5V | |
| 17 | Ground | 5 Ground | |
| 18 | Ground | 6 +5V | |
| 19 | Ground | 7 Ground | |
| 20 | Res (NC) | 8 PWR_OK | |
| 21 | +5V | 9 5VSB | |
| 22 | +5V | 10 +12V | |
| 23 | +5V | 11 | +12V |
| 24 | Ground | 12 +3.3V | |
12V 8-pin CPU Power Connectors
JPWR2 and JPWR3 are the 8-pin 12V DC power input for the CPU. Refer to the table below for pin definitions.
| 12V 8-pin Power Pin Definitions | |
| Pin# Definition | |
| 1 - 4 | Ground |
| 5 - 8 | +12V |
4.2 Connectors
SATA Power Connectors
The SATA power connectors at JSD1 and JSD2 provide 5V power to onboard SATA devices. Refer to the table below for pin definitions.
| SATA Power Pin Definitions | |
| Pin# | Definition |
| 1 5V | |
| 2 Ground | |
| 3 Ground | |
I-SATA 3.0 and S-SATA 3.0 Ports
The X11DSC+ has eight I-SATA 3.0 ports (I-SATA0-3, I-SATA4-7) and six S-SATA ports (S-SATA0-3, S-SATA4, S-SATA5) on the motherboard. The I-SATA ports are supported by the Intel PCH C621 chipset, and the S-SATA ports are supported by Intel SCU. S-SATA4/S-SATA5 can be used with Supermicro SuperDOMs which are yellow SATA DOM connectors with power pins built in, and do not require external power cables.
| SATA 3.0 PortPin Definitions | |
| Pin# Signal | |
| 1 Ground | |
| 2 SATA_TXP | |
| 3 SATA_TXN | |
| 4 Ground | |
| 5 SATA_RXN | |
| 6 SATA_RXP | |
| 7 Ground |
4.3 Ports
Rear I/O Ports
See Figure 4-1 below for the locations and descriptions of the various I/O ports on the rear of the motherboard.

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JSDCARD1 JUIDB1 UO UID-LED BMI LAN VGA COM1 LEDBMC BMC USB 34T (3.0) CPU1 SIOM PCI-E 3.0 x16 J2C_FP1 JSD1 SP1 I-SAT10 I-SAT11 BAT1 PCH FAN3 FAN2 FAN1 JPNR3 CPU2 SuperX X1ESC+ BIOS LICENSE BAN CODE FM CODE CE FC CPU1 P1 NVMe0 P1_NVMe3 P1_NVMe1 P1_NVMe2 JPNR1 JPI2C1 JPWR2 JPWR1Figure 4-1. Back panel I/O Port Locations and Definitions

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Diagram showing six labeled electronic device ports: two VGA connectors, one BVI, and a network switch with ports 3, 4, 5, and 6.Figure 4-2. Back Panel I/O Port Locations and Definitions
| Back Panel I/O Ports | ||
| No. | Description No. Description | |
| 1. | COM1 4. USB 1 (USB 3.0) | |
| 2. | VGA 5. IPMI LAN | |
| 3. | USB 0 (USB 3.0) 6. Unit Identifier | Switch (UID) |
VGA Port
The onboard VGA port is located next to IPMI LAN port on the I/O back panel. Use this connection for VGA display.
Serial Port
There is one COM port (COM1) on the I/O back panel. The COM port provides serial communication support. See the table below for pin definitions.
Universal Serial Bus (USB) Ports
There are two USB 3.0 ports (USB0/1) on the I/O back panel. USB2 is a Type A USB 3.0 header on the motherboard to provide front access USB connection. The onboard headers can be used to provide front side USB access with a cable (not included).
| Back Panel USB 0/1 (3.0)Pin Definitions | |||
| Pin# | Definition | Pin# | Definition |
| A1 | VBUS | B1 Power | |
| A2 | D-B2 | USB_N | |
| A3 | D+B3 | USB_P | |
| A4 | GND | B4 GND | |
| A5 | Stca_SSRX- | B5 USB3_RN | |
| A6 | Stca_SSRX+ | B6 USB3_RP | |
| A7 | GND | B7 GND | |
| A8 | Stca_SSTX- | B8 USB3_TN | |
| A9 | Stca_SSTX+ | B9 USB3_TP | |
| Type A USB 2 (3.0) Pin Definitions | |||
| Pin# | Definition Pin# | Definition | |
| 1 | VBUS | 5 | SSRX- |
| 2 | USB_N | 6 | SSRX+ |
| 3 | USB_P | 7 | GND |
| 4 | Ground | 8 | SSTX- |
| 9 | SSTX+ | ||
Unit Identifier Switch/UID LED Indicator
A Unit Identifier (UID) switch and a rear UID LED (UID-LED) are located on the I/O back panel. A front UID switch is located on pins 7 & 8 of the front panel control (JF1). When you press the front or the rear UID switch, both front and rear UID LEDs will be turned on. Press the UID switch again to turn off the LED indicators. The UID indicators provide easy identification of a system that may be in need of service. (Note: UID can also be triggered via IPMI on the motherboard. For more information, please refer to the IPMI User's Guide posted on our website at http://www.supermicro.com.)
| UID Switch Pin Definitions | |
| Pin# | Definition |
| 1 | Ground |
| 2 | Ground |
| 3 | Button In |
| 4 | Button In |
| UID LEDPin Definitions | |
| Color Status | |
| Blue: On Unit Identified | |
4.4 Headers
Onboard Fan Header
Five 4-pin fan headers (FAN1\~5) are located on the motherboard to provide CPU/system cooling. These fan headers support both 3-pin fans and 4-pin fans; however, onboard fan speed control is available only when all 4-pin fans are used in the motherboard. Fan speed control is supported by a thermal management setting in the BMC (Baseboard Management Controller). See the table below for pin definitions.
| Fan HeaderPin Definitions | |
| Pin# | Definition |
| 1 | Ground (Black) |
| 2 | +12V (Red) |
| 3 | Tachometer |
| 4 | PWM Control |
NVMe Connectors
Use the NVMe connectors (P1_NVMe0/P1_NVMe1/P1_NVMe2/P1_NVMe3) to attach high-speed PCI-E storage devices (supported by CPU1).
TPM Header
The JTPM1 header is used to connect a Trusted Platform Module (TPM)/Port 80, which is available from a third-party vendor. A TPM/Port 80 connector is a security device that supports encryption and authentication in hard drives. It allows the motherboard to deny access if the TPM associated with the hard drive is not installed in the system. See the table below for pin definitions.
| Trusted Platform Module/Port 80 Header Pin Definitions | |
| Pin# Definition Pin# Definition | |
| 1 P3V3 2 SPI_TPM_CS_N | |
| 3 PCIE_RESET_N# 4 SPI_PCH_MISO | |
| 5 SPI_PCH_CLK# 6 Ground | |
| 7 SPI_PCH_MOSI 8 N/A | |
| 9 JTPM1_P3V3A 10 IRQ_TPM_SPIN_N | |
Internal Speaker/Buzzer
The Internal Speaker/Buzzer (SP1) is used to provide audible indications for various beep codes. See the table below for pin definitions.
| Internal BuzzerPin Definitions | ||
| Pin# | Definition | |
| 1 Pos | (+) Beep In | |
| 2 Neg | (-) Alarm Speaker | |
RAID Key Header
A RAID Key header is located at JRK1 on the motherboard. The RAID key is used to support NVMe SSD.
| Intel® RAID KeyPin Definitions | |
| Pin# | Definition |
| 1 | Ground |
| 2 | 3.3V Standby |
| 3 | Ground |
| 4 | PCH RAID Key |
SGPIO Header
The I-SGPIO1 (Serial General Purpose Input/Output) header is used to communicate with the enclosure management chip on the backplane.
| SGPIO HeaderPin Definitions | |||
| Pin# | Definition | Pin# | Definition |
| 1 NC | 2 NC | ||
| 3 Ground | 4 DATA | Out | |
| 5 Load | 6 Ground | ||
| 7 Clock | 8 NC | ||
NC = No Connection
Standby Power
The Standby Power header is located at JSTBY1 on the motherboard. You must have a card with a Standby Power connector and a cable to use this feature. Refer to the table below for pin definitions.
| Standby Power Pin Definitions | |
| Pin# | Definition |
| 1 +5V | Standby |
| 2 Ground | |
| 3 No Connection | |
Power SMBus (I2C) Header
The Power System Management Bus (I2C) header at JPI2C1 monitors the power supply input/output voltages, fans, temperatures, and status. Refer to the table below for pin definitions.
| Power SMBus Header Pin Definitions | |
| Pin# | Definition |
| 1 | Clock |
| 2 | Data |
| 3 | PMBUS_Alert |
| 4 | Ground |
| 5 | +3.3V |
Chassis Intrusion
A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to the table below for pin definitions.
| Chassis Intrusion Pin Definitions | |
| Pin# | Definition |
| 1 | Intrusion Input |
| 2 | Ground |
4-pin BMC External I2C Header
A System Management Bus header for IPMI 2.0 is located at JIPMB1. Connect the appropriate cable here to use the IPMB I2C connection on your system. Refer to the table below for pin definitions.
| External I2C Header Pin Definitions | |
| Pin# | Definition |
| 1 | Data |
| 2 | Ground |
| 3 | Clock |
| 4 | No Connection |
NVMe SMBus Headers
NVMe SMBus (I2C) headers (JNVI2C1/2), used for PCI-E SMBus clock and data connections, provide hot-plug support via a dedicated SMBus interface. This feature is only available for a Supermicro complete system with an SMCI-proprietary NVMe add-on card and cable installed. See the table below for pin definitions.
| NVMe SMBus Header Pin Definitions | |
| Pin# | Definition |
| 1 | Data |
| 2 | Ground |
| 3 | Clock |
| 4 | VCCIO |
SMB (I2C) for LCD Connector
The connector used for System Management Bus (I2C) for LCD devices is located at JI2C_FP1. Connect a cable here to provide health monitoring and management for LCD devices.
SMB (I2C) for SAS3 Backplanes Connectors
JI2C_EXP1/2 connectors are used for System Management Bus (I2C) for the devices installed on the SAS3 backplanes. Connect appropriate cables to these connectors for SAS3 health monitoring and system management.
Disk-On-Module Power Connector
The Disk-On-Module (DOM) power connectors at JSD1 and JSD2 provide 5V power to a solid-state DOM storage devices connected to one of the SATA ports. See the table below for pin definitions.
| DOM Power Pin Definitions | |
| Pin# | Definition |
| 1 5V | |
| 2 Ground | |
| 3 Ground | |
Inlet Sensor Header
This header (JSEN1) allows BMC to monitor thermal inlet temperature. A special module is required. Please contact Supermicro at www.supermicro.com to purchase the module for this header. Refer to the table below for pin definitions.
| Inlet Sensor HeaderPin Definitions | |
| Pin# | Definition |
| 1 | SMBDAT |
| 2 | Ground |
| 3 | SMBCLK |
| 4 | 3.3V STBY |
4.5 Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally located on a control panel at the front of the chassis. These connectors are designed specifically for use with Supermicro chassis. See the figure below for the descriptions of the front control panel buttons and LED indicators.

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JSCARC® JUDE TAN UD LED PWM LAN COMTRICA LAN CTRL LEDMC SMC LSRAM (12.0) J2C FP1 J5D2 JSATA2 JSD1 SP1 USB 4.0 CEAT PC4 FAN JPN3 CPU2 SUPRA® V150+ 60S LED8E PDC2 PDC-3 CE FE CPU1 CPU1 SOM PD-E 3.9 x15 P1 MAN0 P1 MAN3 P1 MAN1 P1 MAN2 JPCK1 JPCK2 JPAR1Figure 4-3. JF1 Header Pins

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PWR Power Button Reset Reset Button 3.3V UID LED 3.3V Stby 3.3V Stby 3.3V Stby 3.3V Stby X NMI 1 2 Ground Ground Power Fail LED OH/Fan Fail LED NIC2 Active LED NIC1 Active LED HDD LED PWR LED X Ground 19 20Power Button
The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both pins will power on/off the system. This button can also be configured to function as a suspend button (with a setting in the BIOS - see Chapter 4). To turn off the power when the system is in suspend mode, press the button for 4 seconds or longer. Refer to the table below for pin definitions.
| Power ButtonPin Definitions (JF1) | |
| Pins Definition | |
| 1 Signal | |
| 2 Ground |
Reset Button
The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset switch on the computer case to reset the system. Refer to the table below for pin definitions.
| Reset ButtonPin Definitions (JF1) | |
| Pins Definition | |
| 3 Reset | |
| 4 Ground |
Power Fail LED
The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below for pin definitions.
| Power Fail LEDPin Definitions (JF1) | |
| Pin# | Definition |
| 5 | 3.3V |
| 6 | PWR Supply Fail |
OH/Fan Fail/PWR Fail/UID LED
Connect an LED cable to pins 7 and 8 of the Front Control Panel (JF1) to use UID/Overheat/Fan Fail/Power Fail LED connections. The LED on pin 8 provides warnings of overheat, power failure or fan failure. Refer to the tables below for details.
| Informational LED-UID/OH/PWR Fail/Fan Fail LED Pin Definitions (Pin 7 & Pin 8 of JF1) | |
| Status Description | |
| Solid red An overheat condition has occurred. (This may be caused by cable congestion). | |
| Blinking red (1Hz) Fan failure: check for an inoperative fan. | |
| Blinking red (0.25Hz) Power failure: check for a non-operational power supply | |
| Solid blue Local UID is activated. Use this function to locate a unit in a rack mount environment that might be in need of service. | |
| Blinking blue (300 msec) | Remote UID is on. Use this function to identify a unit from a remote location that might be in need of service. |
The NIC (Network Interface Controller) LED connection for LAN port 1 is located on pins 11 and 12 of JF1, and LAN port 2 is on pins 9 and 10. Attach the NIC LED cables here to display network activity. Refer to the table below for pin definitions.
| LAN1/LAN2 LEDPin Definitions (JF1) | |
| Pin# | Definition |
| 9 NIC | 2 Activity LED |
| 10 3.3V | Stby |
| 11 NIC | 1 Activity LED |
| 12 3.3V | Stby |
HDD LED
The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable to pin 14 to show hard drive activity status. Refer to the table below for pin definitions.
| HDD LEDPin Definitions (JF1) | |
| Pins Definition | |
| 13 3.3V Stdby | |
| 14 HDD Active |
Power LED
The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below for pin definitions.
| Power LEDPin Definitions (JF1) | |
| Pins Definition | |
| 15 3.3V | |
| 16 PWR LED |
NMI Button
The non-maskable interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer to the table below for pin definitions.
| NMI ButtonPin Definitions (JF1) | |
| Pins Definition | |
| 19 Control | |
| 20 Ground |
4.6 Jumpers
Explanation of Jumpers
To modify the operation of the motherboard, jumpers are used to choose between optional settings. Jumpers create shorts between two pins to change the function associated with it. Pin 1 is identified with a square solder pad on the printed circuit board. See the motherboard layout page for jumper locations.
Note: On a two-pin jumper, "Closed" means the jumper is on both pins and "Open" indicates the jumper is either on only one pin or has been completely removed.

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Connector Pins Jumper Setting 3 2 1 3 2 1CMOS Clear
JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper consists of contact pads to prevent accidentally clearing the contents of CMOS.
To Clear CMOS
- First power down the system and unplug the power cord(s).
- Remove the cover of the chassis to access the motherboard.
- Remove the onboard battery from the motherboard.
- Short the CMOS pads with a metal object such as a small screwdriver for at least four seconds.
- Remove the screwdriver (or shorting device).
- Replace the cover, reconnect the power cord(s) and power on the system.
Notes: Clearing CMOS will also clear all passwords.
Do not use the PW ON connector to clear CMOS.

JBT1 contact pads
Watch Dog
JWD1 controls the Watch Dog function. Watch Dog is a monitor that can reboot the system when a software application hangs. Jumping pins 1-2 will cause Watch Dog to reset the system if an application hangs. Jumping pins 2-3 will generate a non-maskable interrupt signal for the application that hangs. Watch Dog must also be enabled in BIOS. The default setting is Reset.
Note: When Watch Dog is enabled, the user needs to write their own application software to disable it.
| Watch DogJumper Settings | |
| Jumper Setting | Definition |
| Pins 1-2 Reset | |
| Pins 2-3 NMI | |
| Open Disabled | |
Manufacturing Mode Select
Close JPME2 to bypass SPI flash security and force the system to use the Manufacturing Mode, which will allow you to flash the system firmware from a host server to modify system settings. See the table below for jumper settings.
| Manufacturing Mode SelectJumper Settings | |
| Jumper Setting Definition | |
| Pins 1-2 Normal | (Default) |
| Pins 2-3 Manufacturing Mode | |
I2C Bus for VRM
Jumpers JVRM_SEL1 allows the BMC or the PCH to access CPU and memory VRM controllers. See the table below for jumper settings.
| VRMJumper Settings | |
| Jumper Setting | Definition |
| Pins 1-2 BMC (Normal) | |
| Pins 2-3 PCH | |
4.7 LED Indicators
Dedicated IPMI LAN LEDs
A dedicated IPMI LAN is located on the I/O Backplane of the motherboard. See the tables below for more information.

| IPMI LAN Connection LED | |
| LED Color Definition | |
| Off No Connection, 10 Mbps or 100 Mbps | |
| Green 10 Gbps | |
| Amber 1 Gbps | |
| IPMI LAN Activity LED | |
| LED Color/State Definition | |
| Link (left) Green: Solid 100 Mbps | |
| Activity (Right) Amber: Blinking Active | |
BMC Heartbeat LED
LEDBMC is the BMC heartbeat LED. When the LED is blinking green, BMC is functioning normally. See the table below for the LED status.
| BMC Heartbeat LED Indicator | |
| LED Color Definition | |
| Green:Blinking | BMC Normal |
Onboard Power LED
The Onboard Power LED is located at LEDPWR on the motherboard. When this LED is on, the system is on. Be sure to turn off the system and unplug the power cord before removing or installing components. Refer to the table below for more information.
| Onboard Power LED Indicator | |
| LED Color Definition | |
| Off | System Off(power cable not connected) |
| Green System | On |
Unit ID LED
A rear UID LED indicator (UID-LED) is located near the UID switch on the I/O back panel. This UID indicator provides easy identification of a system.unit that may need service.
| UID LEDLED Indicator | |
| LED Color Definition | |
| Blue: On Unit | Identified |
HDD LED
An HDD LED indicator, located at HDD_LED1 on the motherboard, indicates the status of onboard hard drive disks including SATA devices. When HDD_LED1 is blinking, all onboard HDDs are functioning normally. See the table below for more information.
| HDD LEDLED Indicator | |
| LED Color Definition | |
| Green: Blinking HDDs: Normal | |
Onboard Memory\_Fault LED Indicators
The memory-fault LED indicators are located at P1_LED_A1 - P2_LED_F2 on the motherboard. Each memory LED indicates the status of the DIMM module installed on the memory slot that carries the same name. For example, if P1_LED_A1 is on, it indicates that an error has occurred to the DIMM module installed on the P1-DIMMA1 memory slot. See the tables below for more information.
| Memory-Fault LED Indicators & Corresponding Memory Modules | |
| LED Indicator Corresponding DIMM | Module |
| P1_LED_A1 / P1_LED_A2 P1-D | IMMA1 / P1-DIMMA2 |
| P1_LED_B1 / P1_LED_B2 P1-D | IMMB1 / P1-DIMMB2 |
| P1_LED_C1 / P1_LED_C2 P1-D | IMMC1 / P1-DIMMC2 |
| P1_LED_D1 / P1_LED_D2 P1-D | DIMMD1 / P1-DIMMD2 |
| P1_LED_E1 / P1_LED_E2 P1-D | IMME1 / P1-DIMME2 |
| P1_LED_F1 / P1_LED_F2 P1-D | IMMF1 / P1-DIMMF2 |
| P2_LED_A1 / P2_LED_A2 P2-D | IMMA1 / P2-DIMMA2 |
| P2_LED_B1 / P2_LED_B2 P2-D | IMMB1 / P2-DIMMB2 |
| P2_LED_C1 / P2_LED_C2 P2-D | IMMC1 / P2-DIMMC2 |
| P2_LED_D1 / P2_LED_D2 P2-D | DIMMD1 / P2-DIMMD2 |
| P2_LED_E1 / P2_LED_E2 P2-D | IMME1 / P2-DIMME2 |
| P2_LED_F1 / P2_LED_F2 P2-D | IMMF1 / P2-DIMMF2 |
| Memory-Fault LEDLED Indicator | |
| LED Color Definition | |
| LED On: Red Corresponding DIMM Module: Bad | |
Chapter 5
Software
After the hardware has been installed, you can install the Operating System (OS), configure RAID settings and install the drivers.
5.1 Microsoft Windows OS Installation
If you will be using RAID, you must configure RAID settings before installing the Windows OS and the RAID driver. Refer to the RAID Configuration User Guides posted on our website at www.supermicro.com/support/manuals.
Installing the OS
- Create a method to access the MS Windows installation ISO file. That might be a DVD, perhaps using an external USB/SATA DVD drive, or a USB flash drive, or the IPMI KVM console.
- Retrieve the proper RST/RSTe driver. Go to the Supermicro web page for your motherboard and click on "Download the Latest Drivers and Utilities", select the proper driver, and copy it to a USB flash drive.
- Boot from a bootable device with Windows OS installation. You can see a bootable device list by pressing F11 during the system startup.

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Please select boot device: ATEN Virtual CDROM YSOJ → IPMI virtual drive (Legacy) ASUS SDRW-08D2S-U F601 → USB DVD device (Legacy) USB FLASH DRIVE PMAP → USB flash drive with OS installation (Legacy) IBA 40-10G Slot 1900 v1060 → PXE boot (Legacy) UEFI: ATEN Virtual CDROM YSOJ → IPMI virtual drive (UEFI) UEFI: ASUS SDRW-08D2S-U F601 → USB DVD device (UEFI) UEFI: Built-in EFI Shell Enter Setup ↑ and ↓ to move selection ENTER to select boot device ESC to boot using defaultsFigure 5-1. Select Boot Device
- During Windows Setup, continue to the dialog where you select the drives on which to install Windows. If the disk you want to use is not listed, click on "Load driver" link at the bottom left corner.

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Where do you want to install Windows? Name Total size Free space Type Refresh Delete Format New Load driver Extend We couldn't find any drives. To get a storage driver, click Load driver. NextFigure 5-2. Load Driver Link
To load the driver, browse the USB flash drive for the proper driver files.
- For RAID, choose the SATA/sSATA RAID driver indicated then choose the storage drive on which you want to install it.
-
For non-RAID, choose the SATA/sSATA AHCI driver indicated then choose the storage drive on which you want to install it.
-
Once all devices are specified, continue with the installation.
- After the Windows OS installation has completed, the system will automatically reboot multiple times.
5.2 Driver Installation
The Supermicro website contains drivers and utilities for your system at https://www.supermicro.com/wftp/driver. Some of these must be installed, such as the chipset driver.
After accessing the website, go into the CDR_Images (in the parent directory of the above link) and locate the ISO file for your motherboard. Download this file to a USB flash drive or a DVD. (You may also use a utility to extract the ISO file if preferred.)
Another option is to go to the Supermicro website at http://www.supermicro.com/products/. Find the product page for your motherboard, and "Download the Latest Drivers and Utilities". Insert the flash drive or disk and the screenshot shown below should appear.

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SUPERMICRO X10DRX Motherboard Drivers & Tools (Win7) Intel C621 Chipset X11DSC+ SUPERMICRO Computer Inc. Intel Chipset INF files Microsoft .Net Framework (Optional) ASPEED Graphics Driver Intel Rapid Storage Technology Enterprise Intel USB 3.0 Drivers Intel PRO Network Connections Drivers Intel Management Engine SUPERMICRO SuperDoctor 5 Build driver diskettes and manuals Browse CD Auto Start Up Next Time For more information, please visit SUPERMICRO's web site.Figure 5-3. Driver & Tool Installation Screen
Note: Click the icons showing a hand writing on paper to view the readme files for each item. Click the computer icons to the right of these items to install each item (from top to the bottom) one at a time. After installing each item, you must re-boot the system before moving on to the next item on the list. The bottom icon with a CD on it allows you to view the entire contents.
5.3 SuperDoctor® 5
The Supermicro SuperDoctor 5 is a program that functions in a command-line or web-based interface for Windows and Linux operating systems. The program monitors such system health information as CPU temperature, system voltages, system power consumption, fan speed, and provides alerts via email or Simple Network Management Protocol (SNMP).
SuperDoctor 5 comes in local and remote management versions and can be used with Nagios to maximize your system monitoring needs. With SuperDoctor 5 Management Server (SSM Server), you can remotely control power on/off and reset chassis intrusion for multiple systems with SuperDoctor 5 or IPMI. SuperDoctor 5 Management Server monitors HTTP, FTP, and SMTP services to optimize the efficiency of your operation.
Note: The default User Name and Password for SuperDoctor 5 is ADMIN / ADMIN.

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SuperDoctor 5 Matherboard: C7B360-CB-ML Voltage 10Vrms Value 20Vrms Value 30Vrms Value 40Vrms Value 50Vrms Value 60Vrms Value 70Vrms Value 80Vrms Value 90Vrms Value Temperature 100 2.10 100 2.10 100 2.10 100 2.10 100 2.10 100 2.10 100 2.10 100 2.10 100 2.10 100 2.10 100 2.10 100 2.10Figure 5-4. SuperDoctor 5 Interface Display Screen (Health Information)
5.4 IPMI
The X11DSC+ supports the Intelligent Platform Management Interface (IPMI). IPMI is used to provide remote access, monitoring and management. There are several BIOS settings that are related to IPMI.
Supermicro ships standard products with a unique password for the BMC ADMIN user. This password can be found on a label on the motherboard. For general documentation and information on IPMI, please visit our website at: http://www.supermicro.com/products/nfo/IPMI.cfm.
Chapter 6
UEFI BIOS
6.1 Introduction
This chapter describes the AMIBIOS™ Setup utility for the X11DSC+ motherboard(s). The is stored in a flash chip and can be easily upgraded.
Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual. Please refer to the Manual Download area of our website for any changes to BIOS that may not be reflected in this manual.
Starting the Setup Utility
To enter the BIOS Setup Utility, hit the
The Main BIOS screen has two main frames. The left frame displays all the options that can be configured. "Grayed-out" options cannot be configured. The right frame displays the key legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white. Often a text message will accompany it. (Note that BIOS has default text messages built in. We retain the option to include, omit, or change any of these text messages.) Settings printed in Bold are the default values.
A "▶" indicates a submenu. Highlighting such an item and pressing the
The BIOS setup utility uses a key-based navigation system called hot keys. Most of these hot keys (
6.2 Main Menu
When you first enter the AMI BIOS setup utility, you will enter the Main setup screen. You can always return to the Main setup screen by selecting the Main tab on the top of the screen. The Main BIOS setup screen is shown below. The following Main menu items will be displayed:
| System Date System Time Supermicro X11DSC+ BIOS Version Build Date CPLD Version Memory Information Total Memory | [Wed 01/03/2018] [22:39:33] 2.0a 12/06/2017 03.B1.01 393216 MB | Set the Date. Use Tab to switch between Date elements. Default Ranges: Year: 2005-2099 Months: 1-12 Days: dependent on month |
| ++: Select Screen ↑↓: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit |
Version 2.19.1268. Copyright (C) 2017 American Megatrends, Inc.
System Date/System Time
Use this item to change the system date and time. Highlight System Date or System Time using the arrow keys. Enter new values using the keyboard. Press the
Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00. The date's default value is 01/01/2014 after RTC reset.
Supermicro X11DSC+
BIOS Version
This item displays the version of the BIOS ROM used in the system.
Build Date
This item displays the date when the version of the BIOS ROM used in the system was built.
CPLD Version
This item displays the version of the CPLD (Complex-Programmable Logical Device) used in the system.
Memory Information
Total Memory
This item displays the total size of memory available in the system.
Memory Speed
This item displays the default speed of the memory modules installed in the system.
6.3 Advanced Settings Menu
Use the arrow keys to select the Advanced submenu and press
| Aptio Setup Utility - Copyright (C) 2017 American Megatrends, Inc. Main Advanced Event Logs IPMI Security Boot Save & Exit | |
| Boot Feature CPU Configuration Chipset Configuration Server ME Configuration PCH SATA Configuration PCIe/PCI/PnP Configuration Super IO Configuration Serial Port Console Redirection ACPI Settings Trusted Computing iSCSI Configuration Intel(R) Virtual RAID on CPU | Boot Feature Configuration Page |
| +: Select Screen ↑↓: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit | |
| Version 2.19.1268. Copyright (C) 2017 American Megatrends, Inc. | |
Warning: Take Caution when changing the Advanced settings. An incorrect value, an incorrect DRAM frequency, or an incorrect BIOS timing setting may cause the system to malfunction. When this occurs, restore the setting to the manufacture default setting.
▶Boot Feature
Quiet Boot
Use this feature to select the screen between displaying POST messages or the OEM logo at bootup. Select Disabled to display the POST messages. Select Enabled to display the OEM logo instead of the normal POST messages. The options are Disabled and Enabled.
Note: POST message is always displayed regardless of the item setting.
Option ROM Messages
Use this feature to set the display mode for the Option ROM. Select Keep Current to display the current AddOn ROM setting. Select Force BIOS to use the Option ROM display set by the system BIOS. The options are Force BIOS and Keep Current.
Bootup NumLock State
Use this feature to set the Power-on state for the
Wait For "F1" If Error
Use this feature to force the system to wait until the 'F1' key is pressed if an error occurs. The options are Disabled and Enabled.
INT19 Trap Response
Interrupt 19 is the software interrupt that handles the boot disk function. When this item is set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup immediately and allow the drives that are attached to these host adaptors to function as bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not capture Interrupt 19 immediately and allow the drives attached to these adaptors to function as bootable devices at bootup. The options are Immediate and Postponed.
Re-try Boot
If this item is enabled, the BIOS will automatically reboot the system from a specified boot device after its initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.
Install Windows 7 USB support
Enable this feature to use the USB keyboard and mouse during the Windows 7 installation, since the native XHCI driver support is unavailable. Use a SATA optical drive as a USB drive. USB CD/DVD drives are not supported. Disable this feature after the XHCI driver has been installed in Windows. The options are Disabled and Enabled.
Port 61h Bit-4 Emulation
Select Enabled to support the emulation of Port 61h bit-4 toggling in SMM (System Management Mode). The options are Disabled and Enabled.
Power Configuration
Watch Dog Function
If enabled, the Watch Dog Timer will allow the system to reset or generate NMI based on jumper settings when it is expired for more than 5 minutes. The options are Disabled and Enabled.
Restore on AC Power Loss
Use this feature to set the power state after a power outage. Select Stay-Off for the system power to remain off after a power loss. Select Power-On for the system power to be turned on after a power loss. Select Last State to allow the system to resume its last power state before a power loss. The options are Stay Off, Power On, and Last State.
Power Button Function
This feature controls how the system shuts down when the power button is pressed. Select 4 Seconds Override for the user to power off the system after pressing and holding the power button for 4 seconds or longer. Select Instant Off to instantly power off the system as soon as the user presses the power button. The options are Instant Off and 4 Seconds Override.
Throttle on Power Fail
Throttling improves reliability and reduces power consumption in the processor via automatic voltage control during processor idle states. Select Enabled to decrease the system power by throttling CPU frequency when one power supply is failed. The options are Disabled and Enabled.
▶CPU Configuration
Warning: Setting the wrong values in the following sections may cause the system to malfunction.
Processor Configuration
The following CPU information will be displayed:
- Processor BSP Revision
- Processor Socket
- Processor ID
- Processor Frequency
-
Processor Max Ration
-
Processor Min Ration
- Microcode Revision
- L1 Cache RAM
- L2 Cache RAM
- L3 Cache RAM
- Processor 0 Version
- Processor 1 Version
Hyper-Threading [All] (Available when supported by the CPU)
Select Enabled to support Intel® Hyper-threading Technology to enhance CPU performance. The options are Disable and Enable.
Cores Enabled
This feature allows the user to determine the number of CPU cores to be enabled. Enter "0" to enable all cores. The default setting is 0, which enables all CPU cores in the system.
Execute Disable Bit (Available if supported by the OS & the CPU)
Select Enable to enable the Execute-Disable Bit which will allow the processor to designate areas in the system memory where an application code can execute and where it cannot, thus preventing a worm or a virus from flooding illegal codes to overwhelm the processor or damage the system during an attack. (Please refer to Intel's website for more information.) The options are Disable and Enable.
Intel Virtualization Technology (Available when supported by the CPU)
Select Enable to use Intel® Virtualization Technology so that I/O device assignments will be reported directly to the VMM (Virtual Memory Management) through the DMAR ACPI Tables. This feature offers fully-protected I/O resource-sharing across the Intel® platforms, providing the user with greater reliability, security and availability in networking and data-sharing. The options are Disable and Enable.
Note: If a change is made to this setting, you will need to reboot the system for the change to take effect. Refer to Intel's website for detailed information.
PPIN Control
Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system. The options are Unlock/Disable and Unlock/Enable.
Hardware Prefetcher (Available when supported by the CPU)
If this item is set to Enable, the hardware prefetcher will prefetch streams of data and instructions from the main memory to the L2 cache to improve CPU performance. The options are Enable and Disable.
Adjacent Cache Prefetch (Available when supported by the CPU)
The CPU prefetches the cache line for 64 bytes if this feature is set to Disable. The CPU prefetches both cache lines for 128 bytes as comprised if this feature is set to Enable. The options are Enable and Disable.
DCU Streamer Prefetcher (Available when supported by the CPU)
Select Enabled to enable Intel® CPU Advanced Encryption Standard (AES) Instructions for CPU to enhance data integrity. The options are Enable and Disable.
DCU IP Prefetcher (Available when supported by the CPU)
If this feature is set to Enable, the DCU (Data Cache Unit) IP prefetcher will prefetch IP addresses in advance to improve network connectivity and system performance. The options are Enable and Disable.
LLC Prefetch
Select Enable to support the LLC prefetch on all threads. The options are Disable and Enable.
Extended APIC
Select Enable to use the extended APIC (Advanced Programmable Interrupt Control) support to enhance power management. The options are Disable and Enable.
AES-NI
Select Enable to use the Intel® Advanced Encryption Standard (AES) New Instructions (NI) to ensure data security. The options are Disable and Enable.
▶Advanced Power Management Configuration
Power Technology
Use this item to enable power management features. The options are Disable, Energy Efficient, and Custom. Select Energy Efficient to support power-saving mode. Select Custom to customize system power settings. Select Disable to disable power-saving settings.
Power Performance Tuning (Available when Power Technology is set to Custom)
This feature allows the user to set whether the operating system or the BIOS controls the Energy Performance BIAS (EPB). The options are OS Controls EPB and BIOS Controls EPB.
ENERGY\_PERF\_BIAS\_CFG Mode (Available when Power Performance Tuning is set to BIOS Controls EPB)
The Energy Performance BIAS (EPB) feature allows the user to configure CPU power and performance settings. Select Maximum Performance to set the highest performance. Select Performance to optimize performance over energy efficiency. Select Balanced Performance to prioritize performance optimization while conserving energy. Select Balanced Power to prioritize energy conservation while maintaining good performance. Select Power to optimize energy efficiency over performance. The options are Maximum Performance, Performance, Balanced Performance, Balanced Power, and Power.
▶CPU P State Control (Available when Power Technology is set to Custom)
SpeedStep (Pstates)
EIST (Enhanced Intel® SpeedStep™ Technology) allows the system to automatically adjust processor voltage and core frequency to reduce power consumption and heat dissipation. The options are Disable and Enable.
EIST PSD Function
This feature allows the user to change the P-State (Power-Performance State) coordination type. P-State is also known as "SpeedStep" for Intel® processors. Select HW_ALL to change the P-State coordination type for all hardware components only. Select SW_ALL to change the P-State coordination type for all software installed in the system. Select SW_ANY to change the P-State coordination type for a particular software program specified by the user in the system. The options are HW_ALL, SW_ALL, and SW_ANY.
Turbo Mode (Available when Intel® EIST Technology is enabled)
Select Enable to use the Turbo Mode to boost system performance. The options are Disable and Enable.
▶Hardware PM State Control (Available when Power Technology is set to Custom)
Hardware P-States
This feature enables the hardware P-States support. The options are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.
▶CPU C State Control (Available when Power Technology is set to Custom)
Autonomous Core C-State
Use this feature to enable the autonomous core C-State control. The options are Disable and Enable.
CPU C6 report
Select Enable to allow the BIOS to report the CPU C6 State (ACPI C3) to the operating system. During the CPU C6 State, the power to all cache is turned off. The options are Disable, Enable, and Auto.
Enhanced Halt State (C1E)
Select Enable to use Enhanced Halt-State technology, which will significantly reduce the CPU's power consumption by reducing the CPU's clock cycle and voltage during a Halt-state. The options are Disable and Enable.
▶Package C State Control (Available when Power Technology is set to Custom)
Package C State
This feature allows the user to set the limit on the C-State package register. The options are C0/C1 state, C2 state, C6 (non Retention) state, C6 (Retention) state, No Limit, and Auto.
▶CPU T State Control (Available when Power Technology is set to Custom)
Software Controlled T-States
This feature enables the software controlled T-States support. The options are Disable and Enable
▶Chipset Configuration
Warning: Setting the wrong values in the following features may cause the system to malfunction.
▶ North Bridge
This feature allows the user to configure the settings for the Intel® North Bridge.
▶UPI Configuration
UPI Configuration
This section displays the following UPI General Configuration information:
- Number of CPU
• Number of Active UPI Link - Current UPI Link Speed
- Current UPI Link Frequency
• UPI Global MMIO Low Base/Limit
• UPI Global MMIO High Base/Limit
• UPI Pci-e Configuration Base/Size
Degrade Precedence
Select Topology Precedence to degrade features if system options are in conflict. Select Feature Precedence to degrade topology if system options are in conflict. The options are Topology Precedence and Feature Precedence.
Link L0p Enable
Select Enable for the QPI to enter the L0p state for power saving. The options are Disable, Enable, and Auto.
Link L1 Enable
Select Enable for the QPI to enter the L1 state for power saving. The options are Disable, Enable, and Auto.
IO Directory Cache (IODC)
Use this feature to enable the IO Directory Cache (IODC) support. The options are Disable, Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Remote InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WViLF.
SNC
Sub NUMA Clustering (SNC) is a feature that breaks up the Last Level Cache (LLC) into clusters based on address range. Each cluster is connected to a subset of the memory controller. Enabling SNC improves average latency and reduces memory access congestion to achieve higher performance. Select Auto for 1-cluster or 2-clusters depending on IMC interleave. Select Enable for Full SNC (2-clusters and 1-way IMC interleave). The options are Disable, Enable, and Auto.
XPT Prefetch
XPT Prefetch is a feature that speculatively makes a copy to the memory controller of a read request being sent to the LLC. If the read request maps to the local memory address and the recent memory reads are likely to miss the LLC, a speculative read is sent to the local memory controller. The options are Disable and Enable.
KTI Prefetch
KTI Prefetch is a feature that enables memory read to start early on a DDR bus, where the KTI Rx path will directly create a Memory Speculative Read command to the memory controller. The options are Disable and Enable.
Local/Remote Threshold
This feature allows the user to set the threshold for the Interrupt Request (IRQ) signal, which handles hardware interruptions. The options are Disable, Auto, Low, Medium, and High.
Stale AtoS
This feature optimizes A to S directory. When all snoop responses found in directory A are found to be Rspl, then all data is moved to directory S and is returned in S-state. The options are Disable, Enable, and Auto.
LLC Dead Line Alloc
Select Enable to optimally fill dead lines in LLC. Select Disable to never fill dead lines in LLC. The options are Disable, Enable, and Auto.
Isoc Mode
Select Enable to enable Isochronous support to meet QoS (Quality of Service) requirements. This feature is especially important for Virtualization Technology. The options are Disable, Enable, and Auto.
▶ Memory Configuration
Integrated Memory Controller (iMC)
Enforce POR
Select Enable to enforce POR restrictions on DDR4 frequency and voltage programming. The options are POR and Disable.
Memory Frequency
Use this feature to set the maximum memory frequency for onboard memory modules. The options are Auto, 1866, 2000, 2133, 2400, and 2666.
Data Scrambling for NVMDIMM
Select Enable to enable data scrambling to enhance system performance and data integrity. The options are Auto, Disable, and Enable.
Data Scrambling for DDR4
Use this feature to enable data scrambling for DDR4. The options are Auto, Disable, and Enable.
tCCD\_L Relaxation
Select Auto to get TCDD settings from SPD (Serial Presence Detect) and implement into memory RC code to improve system reliability. Select Disable for TCCD to follow Intel® POR. The options are Disable and Auto.
Memory tRWSR Relaxation
Select Enable to use the same tRWSR DDR timing setting among all memory channels, in which case, the worst case value among all channels will be used. Select Disable to
use different values for the tRWSR DDR timing settings for different channels as trained. The options are Disable and Enable.
2X Refresh Options
Use this item to select the 2X refresh mode. The options are Auto and Enable.
Page Policy
This feature allows the user to determine the desired page mode for IMC. When Auto is selected, the memory controller will close or open pages based on the current operation. Closed policy closes that page after reading or writing. Adaptive is similar to open page policy, but can be dynamically modified. The options are Auto, Closed, and Adaptive..
IMC Interleaving
This feature allows the user to configure Integrated Memory Controller (IMC) Interleaving settings. The options are Auto, 1-way Interleave, and 2-way Interleave.
▶ Memory Topology
The item displays the information of onboard memory modules as detected by the BIOS.
▶Memory RAS (Reliability\_Availability\_Serviceability) Configuration
Memory RAS Configuration Setup
Use this submenu to configure the following Memory RAS settings.
Static Virtual Lockstep Mode
Select Enable to support the static virtual lockstep mode. The options are Disable and Enable.
Mirror Mode
Use this item to select the mirror mode. The options are Disable, Mirror Mode 1LM, and Mirror Mode 2LM. If this item is set to Mirror Mode 1LM or Mirror Mode 2LM, the available memory capacity will be reduced by 50 percent.
UEFI ARM Mirror
Select Enable to support the UEFI-based address range mirroring with setup option. The options are Disable and Enable.
Memory Rank Sparing
Select Enable to enable memory-sparing support for memory ranks to improve memory performance. The options are Disable and Enable.
*If the item above "Memory Rank Sparing" is set to Enable, the following item, "Multi Rank Sparing", will be available:
Multi Rank Sparing
Use this feature to set the multiple rank sparing number. The default setting and the maximum is two ranks per channel. The options are One Rank and Two Rank.
Correctable Error Threshold
Use this item to enter the threshold value for correctable memory errors. The default setting is 10.
Run Sure
Use this item to enable the Intel® Run Sure Technology. The options are Disable and Enable.
Patrol Scrub
Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors detected on a memory module and send the correction to the requestor (the original source). When this item is set to Enable, read-and-write will be performed every 16K cycles per cache line if there is no delay caused by internal processing. The options are Disable and Enable.
Patrol Scrub Interval
This feature allows you to decide how many hours the system should wait before the next complete patrol scrub is performed. Use the keyboard to enter a value from 0-24. The Default setting is 24.
▶IIO Configuration
IIO Configuration
EV DFX Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located on a processor will always remain clear during electric tuning. The options are Disable and Enable.
▶CPU1 Configuration
IOU0 (IIO PCIe Br1)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU1 (IIO PCIe Br2)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU2 (IIO PCIe Br3)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
▶P1\_NVMe0
Link Speed
Use this feature to select the link speed for the PCIe port. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).
PCI-E Port Link Status
PCI-E Port Link Max
PCI-E Port Link Speed
PCI-E Port Clocking
The options are Distinct and Common. If this item is set to Distinct, this component and the component at the opposite end of the Link are operating with separate reference clock sources. If this item is set to Common, this component and the component at the opposite end of the Link are operating with a common clock source.
PCI-E Port Max Payload Size
Select Auto for the system BIOS to automatically set the maximum payload value for a PCI-E device to enhance system performance. The options are 128B, 256B, and Auto.
▶P1\_NVMe2
Link Speed
Use this feature to select the link speed for the PCIe port. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).
PCI-E Port Link Status
PCI-E Port Link Max
PCI-E Port Link Speed
PCI-E Port Clocking
The options are Distinct and Common. If this item is set to Distinct, this component and the component at the opposite end of the Link are operating with separate reference clock sources. If this item is set to Common, this component and the component at the opposite end of the Link are operating with a common clock source.
PCI-E Port Max Payload Size
Select Auto for the system BIOS to automatically set the maximum payload value for a PCI-E device to enhance system performance. The options are 128B, 256B, and Auto.
▶CPU1 JMEZZ1 PCI-E 3.0 x8
Link Speed
Use this feature to select the link speed for the PCIe port. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).
PCI-E Port Link Status
PCI-E Port Link Max
PCI-E Port Link Speed
PCI-E Port Clocking
The options are Distinct and Common. If this item is set to Distinct, this component and the component at the opposite end of the Link are operating with separate reference clock sources. If this item is set to Common, this component and the component at the opposite end of the Link are operating with a common clock source.
PCI-E Port Max Payload Size
Select Auto for the system BIOS to automatically set the maximum payload value for a PCI-E device to enhance system performance. The options are 128B, 256B, and Auto.
▶CPU2 Configuration
IOU0 (IIO PCIe Br1)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU1 (IIO PCIe Br2)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU2 (IIO PCIe Br3)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
▶CPU2 SLOT1 PCI-E 3.0 x8
Link Speed
Use this feature to select the link speed for the PCIe port. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).
PCI-E Port Link Status
PCI-E Port Link Max
PCI-E Port Link Speed
PCI-E Port Clocking
The options are Distinct and Common. If this item is set to Distinct, this component and the component at the opposite end of the Link are operating with separate reference clock sources. If this item is set to Common, this component and the component at the opposite end of the Link are operating with a common clock source.
PCI-E Port Max Payload Size
Select Auto for the system BIOS to automatically set the maximum payload value for a PCI-E device to enhance system performance. The options are 128B, 256B, and Auto.
▶CPU2 SLOT3 PCI-E 3.0 x16
Link Speed
Use this feature to select the link speed for the PCIe port. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).
PCI-E Port Link Status
PCI-E Port Link Max
PCI-E Port Link Speed
PCI-E Port Clocking
The options are Distinct and Common. If this item is set to Distinct, this component and the component at the opposite end of the Link are operating with separate reference clock sources. If this item is set to Common, this component and the component at the opposite end of the Link are operating with a common clock source.
PCI-E Port Max Payload Size
Select Auto for the system BIOS to automatically set the maximum payload value for a PCI-E device to enhance system performance. The options are 128B, 256B, and Auto.
▶CPU2 SLOT2 PCI-E 3.0 x16
Link Speed
Use this feature to select the link speed for the PCIe port. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).
PCI-E Port Link Status
PCI-E Port Link Max
PCI-E Port Link Speed
PCI-E Port Clocking
The options are Distinct and Common. If this item is set to Distinct, this component and the component at the opposite end of the Link are operating with separate reference clock sources. If this item is set to Common, this component and the component at the opposite end of the Link are operating with a common clock source.
PCI-E Port Max Payload Size
Select Auto for the system BIOS to automatically set the maximum payload value for a PCI-E device to enhance system performance. The options are 128B, 256B, and Auto.
▶CPU2 PcieBr3D02F0 - Port 3C
Link Speed
Use this feature to select the link speed for the PCIe port. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).
PCI-E Port Link Status
PCI-E Port Link Max
PCI-E Port Link Speed
PCI-E Port Clocking
The options are Distinct and Common. If this item is set to Distinct, this component and the component at the opposite end of the Link are operating with separate reference clock sources. If this item is set to Common, this component and the component at the opposite end of the Link are operating with a common clock source.
PCI-E Port Max Payload Size
Select Auto for the system BIOS to automatically set the maximum payload value for a PCI-E device to enhance system performance. The options are 128B, 256B, and Auto.
▶ IOAT (Intel® IO Acceleration) Configuration
Disable TPH
Select Yes to deactivate TLP Processing Hint support. The options are No and Yes.
Prioritize TPH
Use this feature to enable the prioritize TPH support. The options are Enable and Disable.
Relaxed Ordering
Select Enable to enable Relaxed Ordering support which will allow certain transactions to violate the strict-ordering rules of PCI bus for a transaction to be completed prior to other transactions that have already been enqueued. The options are Disable and Enable.
▶Intel® VT for Directed I/O (VT-d)
Intel ^® VT for Directed I/O (VT-d)
Select Enable to use Intel® Virtualization Technology support for Direct I/O VT-d support by reporting the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR ACPI Tables. This feature offers fully-protected I/O resource sharing across Intel® platforms, providing greater reliability, security and availability in networking and data-sharing. The options are Enable and Disable.
\*If the item above is set to Enable, the following items will be available:
Interrupt Remapping
Select Enable for Interrupt Remapping support to enhance system performance. The options are Enable and Disable.
PassThrough DMA
Select Enable to use the Non-Isoch VT_D engine pass through DMA support. The options are Enable and Disable.
ATS
Select Enable to use the Non-Isoch VT_D engine ATS support. The options are Enable and Disable.
Posted Interrupt
Use this feature to enable VT_D posted interrupt. The options are Enable and Disable.
Coherency Support (Non-Isoch)
Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access) to enhance system performance. The options are Enable and Disable.
Intel® VMD technology
The Intel® Volume Management Device (VMD) is a host bridge to a secondary PCIe domain to provide more bus resources.
Intel® VMD for Volume Management Device on CPU1
VMD Config for PStack0
Intel® VMD for Volume Management Device
Select Enable to use the Intel® Volume Management Device Technology for this stack. The options are Disable and Enable.
*If the item above "Intel® VMD for Volume Management Device" is set to Enable, the following items will be displayed:
P1_NVMe0 VMD (Available when the device is detected by the system)
Select Enable to use the Intel® Volume Management Device Technology for this device. The options are Disable and Enable.
P1_NVMe1 VMD (Available when the device is detected by the system)
Select Enable to use the Intel® Volume Management Device Technology for this device. The options are Disable and Enable.
P1_NVMe2 VMD (Available when the device is detected by the system)
Select Enable to use the Intel® Volume Management Device Technology for this device. The options are Disable and Enable.
P1_NVMe3 VMD (Available when the device is detected by the system)
Select Enable to use the Intel® Volume Management Device Technology for this device. The options are Disable and Enable.
Hot Plug Capable (Available when the device is detected by the system)
Use this feature to enable the hot plug support for PCIe root ports 1A\~1D. The options are Disable and Enable.
Intel® VMD for Volume Management Device on CPU2
VMD Config for PStack0
Intel® VMD for Volume Management Device
Select Enable to use the Intel® Volume Management Device Technology for this stack. The options are Disable and Enable.
*If the item above "Intel® VMD for Volume Management Device" is set to Enable, the following items will be displayed:
CPU2 SLOT1 PCI-E 3.0 x8 VMD (Available when the device is detected by the system)
Select Enable to use the Intel® Volume Management Device Technology for this device. The options are Disable and Enable.
Hot Plug Capable (Available when the device is detected by the system)
Use this feature to enable the hot plug support for PCIe root ports 1A\~1D. The options are Disable and Enable.
VMD Config for PStack1
Intel® VMD for Volume Management Device
Select Enable to use the Intel® Volume Management Device Technology for this stack. The options are Disable and Enable.
*If the item above "Intel® VMD for Volume Management Device" is set to Enable, the following items will be displayed:
CPU2 SLOT3 PCI-E 3.0 x16 VMD (Available when the device is detected by the system)
Select Enable to use the Intel® Volume Management Device Technology for this device. The options are Disable and Enable.
Hot Plug Capable (Available when the device is detected by the system)
Use this feature to enable the hot plug support for PCIe root ports 2A\~2D. The options are Disable and Enable.
VMD Config for PStack2
Intel® VMD for Volume Management Device
Select Enable to use the Intel® Volume Management Device Technology for this stack. The options are Disable and Enable.
*If the item above "Intel® VMD for Volume Management Device" is set to Enable, the following items will be displayed:
CPU2 SLOT2 PCI-E 3.0 x16 VMD (Available when the device is detected by the system)
Select Enable to use the Intel® Volume Management Device Technology for this device. The options are Disable and Enable.
Hot Plug Capable (Available when the device is detected by the system)
Use this feature to enable the hot plug support for PCIe root ports 3A\~3D. The options are Disable and Enable.
IIO-PCIE Express Global Options
PCI-E Completion Timeout Disable
Use this feature for PCI-E Completion Timeout support for electric tuning. The options are Yes, No, and Per-Port.
▶ South Bridge
The following South Bridge information will be displayed:
- USB Module Version
- USB Devices
Legacy USB Support
Select Enabled to support onboard legacy USB devices. Select Auto to disable legacy support if there are no legacy USB devices present. Select Disable to have all USB devices available for EFI applications only. The options are Enabled, Disabled, and Auto.
XHCI Hand-off
This is a work-around solution for operating systems that do not support XHCI (Extensible Host Controller Interface) hand-off. The XHCI ownership change should be claimed by the XHCI driver. The options are Enabled and Disabled.
Port 60/64 Emulation
Select Enabled for I/O port 60h/64h emulation support, which will provide complete legacy USB keyboard support for the operating systems that do not support legacy USB devices. The options are Disabled and Enabled.
PCIe PLL SSC
Use this feature to enable PCI-E Phase-locked Loop (PLL) Spread Spectrum Clocking (SSC). The options are Disable and Enable.
▶Server ME Configuration
This feature displays the following system ME configuration settings.
• Operational Firmware Version
• Backup Firmware Version
• Recovery Firmware Version
• ME Firmware Status #1
• ME Firmware Status #2
- Current State
- Error Code
▶PCH SATA Configuration
SATA Controller
This item enables or disables the onboard SATA controller supported by the Intel® PCH chip. The options are Disable and Enable.
Configure SATA as
Select AHCI to configure a SATA drive specified by the user as an AHCI drive. Select RAID to configure a SATA drive specified by the user as a RAID drive. The options are AHCI and RAID.
SATA HDD Unlock
Select Enable to unlock the HDD password. The options are Disable and Enable.
Aggressive Link Power Management
When this item is set to Enable, the SATA AHCI controller manages the power usage of the SATA link. The controller will put the link to a low power state when the I/O is inactive for an extended period of time, and the power state will return to normal when the I/O becomes active. The options are Disable and Enable.
*If the item above "Configure SATA as" is set to AHCI, the following items will be displayed:
SATA Port 0\~ Port 3
This item displays the information detected on the installed SATA drive on the particular SATA port.
• Model number of drive and capacity
- Software Preserve Support
Hot Plug (SATA Port 0\~ Port 3)
Select Enabled to enable a SATA port specified by the user. The options are Disable and Enable.
Spin Up Device (SATA Port 0\~ Port 3)
On an edge detect from 0 to 1, set this item to allow the PCH to initialize the device. The options are Disable and Enable.
SATA Device Type (SATA Port 0\~ Port 3)
Use this item to specify if the SATA port specified by the user should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.
*If the item above "Configure SATA as" is set to RAID, the following items will be displayed:
SATA HDD Unlock
Select Enable to unlock the HDD password. The options are Disable and Enable.
SATA RSTe Boot Info
Select Enable to provide the full int13h support for SATA controller attached devices. The options are Disable and Enable.
Aggressive Link Power Management
When this item is set to Enable, the SATA Raid controller manages the power usage of the SATA link. The controller will put the link to a low power state when the I/O is inactive for an extended period of time, and the power state will return to normal when the I/O becomes active. The options are Disable and Enable.
SATA RAID Option ROM/UEFI Driver
Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for system boot. The options are Disable, EFI, and Legacy.
SATA Port 0\~ Port 3
This item displays the information detected on the installed SATA drive on the particular SATA port.
• Model number of drive and capacity
- Software Preserve Support
Hot Plug (SATA Port 0\~ Port 3)
Select Enabled to enable a SATA port specified by the user. The options are Disable and Enable.
Spin Up Device (SATA Port 0\~ Port 3)
On an edge detect from 0 to 1, set this item to allow the PCH to initialize the device. The options are Disable and Enable.
SATA Device Type (SATA Port 0\~ Port 3)
Use this item to specify if the SATA port specified by the user should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.
▶PCIe/PCI/PnP Configuration
The following information will be displayed:
- PCI Bus Driver Version
PCI Devices Common Settings:
Above 4G Decoding (Available if the system supports 64-bit PCI decoding)
Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address. The options are Disabled and Enabled.
SR-IOV Support
Use this feature to enable or disable Single Root IO Virtualization support. The options are Disabled and Enabled.
MMIO High Base
Use this item to select the base memory size according to memory-address mapping for the IO hub. The base memory size must be between 4032G to 4078G. The options are 56T, 40T, 24T, 16T, 4T, and 1T.
MMIO High Granularity Size
Use this item to select the high memory size according to memory-address mapping for the IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.
Maximum Read Request
Select Auto to allow the system BIOS to automatically set the maximum read request size for a PCI-E device to enhance system performance. The options are Auto, 128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.
MMCFG Base
Use this feature to select the default value for the PCI MMIO (Memory-Mapped IO) base address. The options are 1G, 1.5G, 1.75G, 2G, 2.25G, and 3G.
NVMe Firmware Source
Use this item to select the NVMe firmware to support booting. The options are Vendor Defined Firmware and AMI Native Support. The default option, Vendor Defined Firmware, is pre-installed on the drive and may resolve errata or enable innovative functions for the drive. The other option, AMI Native Support, is offered by the BIOS with a generic method.
VGA Priority
Use this item to select the graphics device to be used as the primary video display for system boot. The options are Onboard and Offboard.
CPU2 SLOT1 PCI-E 3.0 x8 OPROM, CPU2 SLOT2 PCI-E 3.0 x16 OPROM, CPU2 SLOT3 PCI-E 3.0 x16 OPROM, CPU1 JMEZZ1 PCI-E 3.0 x8 OPROM
Select Disabled to deactivate the selected slot, Legacy to activate the slot in legacy mode, and EFI to activate the slot in EFI mode. The options are Disabled, Legacy, and EFI.
Bus Master Enable
This item allows PCI bus driver enable/disable the bus master bit. The options are Enabled and Disabled.
Onboard LAN1 Option ROM
Use this item to select the type of device to be installed in LAN port1 used for system boot. The options are Disabled, Legacy, and EFI.
Onboard LAN2 Option ROM
Use this item to select the type of device to be installed in LAN port2 used for system boot. The options are Disabled, Legacy, and EFI.
Onboard NVMe1 Option ROM, Onboard NVMe2 Option ROM, Onboard NVMe3 Option ROM, Onboard NVMe4 Option ROM
Select Disabled to deactivate the selected slot, Legacy to activate the slot in legacy mode, and EFI to activate the slot in EFI mode. The options are Disabled, Legacy, and EFI.
Onboard Video Option ROM
Select Legacy to boot the system using a legacy video device installed on the motherboard. The options are Disabled, Legacy, and EFI.
▶Network Stack Configuration
Network Stack
Select Enabled to enable UEFI (Unified Extensible Firmware Interface) for network stack support. The options are Disabled and Enabled.
*If the item above "Network Stack" is set to Enabled, the following items will be displayed:
Ipv4 PXE Support
Select Enabled to enable lpv4 PXE boot support. The options are Disabled and Enabled.
Ipv4 HTTP Support
Select Enabled to enable lpv4 HTTP boot support. The options are Disabled and Enabled.
Ipv6 PXE Support
Select Enabled to enable lpv6 PXE boot support. The options are Disabled and Enabled.
Ipv6 HTTP Support
Select Enabled to enable IPv6 HTTP boot support. The options are Disabled and Enabled.
PXE boot wait time
Use this option to specify the wait time to press the ESC key to abort the PXE boot. Press "+" or "-" on your keyboard to change the value. The default setting is 0.
Media detect count
Use this option to specify the number of times media will be checked. Press "+" or "-" on your keyboard to change the value. The default setting is 1.
▶Super IO Configuration
Super IO Configuration
The following Super IO information will be displayed:
• Super IO Chip AST2500
▶ Serial Port 1 Configuration
Serial Port 1 Configuration
This submenu allows the user the configure settings of Serial Port 1.
Serial Port 1
Select Enabled to enable the selected onboard serial port. The options are Disabled and Enabled.
Device Settings
This item displays the status of a serial part specified by the user.
Change Settings
This feature specifies the base I/O port address and the Interrupt Request address of a serial port specified by the user. Select Auto to allow the BIOS to automatically assign the base I/O and IRQ address. The options are Auto, (IO=3F8h; IRQ=4;), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;), (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;).
▶Serial Port Console Redirection
COM1
Console Redirection
Select Enabled to enable console redirection support for a serial port specified by the user. The options are Disabled and Enabled.
*If the item above is set to Enabled, the following items will become available for user's configuration:
▶Console Redirection Settings
This feature allows the user to specify how the host computer will exchange data with the client computer, which is the remote computer used by the user.
COM1
Console Redirection Settings
Terminal Type
This feature allows the user to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100, VT100+, VT-UTF8, and ANSI.
Bits Per second
Use this feature to set the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 38400, 57600, and 115200 (bits per second).
Data Bits
Use this feature to set the data transmission size for Console Redirection. The options are 7 and 8.
Parity
A parity bit can be sent along with regular data bits to detect data transmission errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you do not want to send a parity bit with your data bits in transmission. Select Mark to add a mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity bit to be sent with your data bits. The options are None, Even, Odd, Mark, and Space.
Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.
Flow Control
Use this feature to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a "Stop" signal to stop sending data when the receiving buffer is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None and Hardware RTS/CTS.
VT-UTF8 Combo Key Support
Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals. The options are Disabled and Enabled.
Recorder Mode
Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server. The options are Disabled and Enabled.
Resolution 100x31
Select Enabled for extended-terminal resolution support. The options are Disabled and Enabled.
Legacy OS Redirection Resolution
Use this feature to select the number of rows and columns used in Console Redirection for legacy OS support. The options are 80x24 and 80x25.
Putty KeyPad
This feature selects the settings for the function keys and the key pad used for Putty, which is a terminal emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SC0, ESCN, and VT400.
Redirection After BIOS POST
Use this feature to enable or disable legacy console redirection after BIOS POST. When this feature is set to BootLoader, legacy console redirection is disabled before booting the OS. When this feature is set to Always Enable, legacy console redirection remains enabled when booting the OS. The options are Always Enable and BootLoader.
SOL
Console Redirection
Select Enabled to enable console redirection support for a serial port specified by the user. The options are Disabled and Enabled.
*If the item above is set to Enabled, the following items will become available for user's configuration:
▶Console Redirection Settings
This feature allows the user to specify how the host computer will exchange data with the client computer, which is the remote computer used by the user.
SOL
Console Redirection Settings
Terminal Type
This feature allows the user to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100, VT100+, VT-UTF8, and ANSI.
Bits Per second
Use this feature to set the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 38400, 57600, and 115200 (bits per second).
Data Bits
Use this feature to set the data transmission size for Console Redirection. The options are 7 and 8.
Parity
A parity bit can be sent along with regular data bits to detect data transmission errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you do not want to send a parity bit with your data bits in transmission. Select Mark to add a mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity bit to be sent with your data bits. The options are None, Even, Odd, Mark, and Space.
Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.
Flow Control
Use this feature to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a "Stop" signal to stop sending data when the receiving buffer is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None and Hardware RTS/CTS.
VT-UTF8 Combo Key Support
Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals. The options are Disabled and Enabled.
Recorder Mode
Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server. The options are Disabled and Enabled.
Resolution 100x31
Select Enabled for extended-terminal resolution support. The options are Disabled and Enabled.
Legacy OS Redirection Resolution
Use this feature to select the number of rows and columns used in Console Redirection for legacy OS support. The options are 80x24 and 80x25.
Putty KeyPad
This feature selects the settings for the function keys and the key pad used for Putty, which is a terminal emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SC0, ESCN, and VT400.
Redirection After BIOS POST
Use this feature to enable or disable legacy console redirection after BIOS POST. When this feature is set to BootLoader, legacy console redirection is disabled before booting the OS. When this feature is set to Always Enable, legacy console redirection remains enabled when booting the OS. The options are Always Enable and BootLoader.
Legacy Console Redirection
Legacy Serial Redirection Port
Use the feature to select the COM port to display redirection of Legacy OS and Legacy OPROM messages. The options are COM1 and SOL.
Serial Port for Out-of-Band Management/Windows Emergency Management Services (EMS)
The submenu allows the user to configure Console Redirection settings to support Out-of-Band Serial Port management.
Console Redirection
Select Enabled to use a COM port selected by the user for EMS Console Redirection. The options are Disabled and Enabled.
*If the item above is set to Enabled, the following items will become available for user's configuration:
▶Console Redirection Settings
This feature allows the user to specify how the host computer will exchange data with the client computer, which is the remote computer used by the user.
Out-of-Band Management Port
The feature selects a serial port in a client server to be used by the Windows Emergency Management Services (EMS) to communicate with a remote host server. The options are COM1 and SOL.
Terminal Type
Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII character set. Select VT100+ to add color and function key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100, VT100+, VT-UTF8, and ANSI.
Bits Per second
This item sets the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in both host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 57600, and 115200 (bits per second).
Flow Control
Use this item to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a "Stop" signal to stop data-sending when the receiving buffer is full. Send a "Start" signal to start data-sending when the receiving buffer is empty. The options are None, Hardware RTS/CTS, and Software Xon/Xoff.
The settings below are displayed:
Data Bits, Parity, Stop Bits
▶ACPI Settings
NUMA (Available when the OS supports this feature)
Select Enabled to enable Non-Uniform Memory Access support to enhance system performance. The options are Disabled and Enabled.
WHEA Support
Select Enabled to support the Windows Hardware Error Architecture (WHEA) platform and provide a common infrastructure for the system to handle hardware errors within the Windows OS environment to reduce system crashes and to enhance system recovery and health monitoring. The options are Disabled and Enabled.
High Precision Event Timer
Select Enabled to activate the High Precision Event Timer (HPET) that produces periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing multimedia streams, providing smooth playback and reducing the dependency on other timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU. The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer. The options are Disabled and Enabled.
▶Trusted Computing (Available when a TPM device is installed and detected by the BIOS)
Security Device Support
If a Trusted Platform Module (TPM) device is connected to the TPM header (JTPM1) on the motherboard and this feature is set to Enable, onboard security devices will be available for the TPM support to enhance data integrity and network security. Please reboot the system for a change on this setting to take effect. The options are Disable and Enable.
\*If the item above is set to Enable, the following items will become available for user's configuration:
The following Platform Configuration Register information will be displayed:
• Active PCR banks
• Available PCR banks
SHA256 PCR Bank
Use this item to disable or enable the SHA256 Platform Configuration Register (PCR) bank for the installed TPM device. The options are Disabled and Enabled.
Pending operation
Use this item to schedule a TPM-related operation to be performed by a security device for system data integrity. Your system will reboot to carry out a pending TPM operation. The options are None and TPM Clear.
Platform Hierarchy
Use this item to disable or enable platform hierarchy for platform protection. The options are Disabled and Enabled.
Storage Hierarchy
Use this item to disable or enable storage hierarchy for cryptographic protection. The options are Disabled and Enabled.
Endorsement Hierarchy
Use this item to disable or enable endorsement hierarchy for privacy control. The options are Disabled and Enabled.
PH Randomization
Use this feature to disable or enable Platform Hierarchy Randomization. The options are Disabled and Enabled.
SMC BIOS -Based TPM Provision Support
Use this feature to enable TPM Provision Support. Enabling this feature will lock your TPM. Once locked, the NV indexes will not be able to be deleted. The options are Disabled and Enabled.
TXT Support
Intel® TXT (Trusted Execution Technology) helps protect against software-based attacks and ensures protection, confidentiality, and integrity of data stored or created on the system. Use this feature to enable or disable TXT Support. The options are Disabled and Enabled.
▶iSCSi Configuration (refer to Appendix G for more information)
iSCSI Initiator Name
This feature allows the user to enter the unique name of the iSCSI Initiator in IQN format. Once the name of the iSCSI Initiator is entered into the system, configure the proper settings for the following items.
▶ Add an Attempt
▶ Delete Attempts
▶Change Attempt order
▶Intel® Virtual RAID on CPU (refer to Appendix E for more information)
This submenu displays the information of the Intel® VMD controllers as detected by the BIOS.
6.4 Event Logs
Use this feature to configure Event Log settings.
| Aptio Setup Utility - Copyright (C) 2017 American Megatrends, Inc. Main Advanced Event Logs IPMI Security Boot Save & Exit | |
| Change SMBIOS Event Log Settings View SMBIOS Event Log | Press <Enter> to change the SMBIOS Event Log configuration. |
| +: Select Screen ↑↓: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit | |
| Version 2.19.1268. Copyright (C) 2017 American Megatrends, Inc. | |
▶Change SMBIOS Event Log Settings
Enabling/Disabling Options
SMBIOS Event Log
Change this item to enable or disable all features of the SMBIOS (System Management BIOS) Event Logging during system boot. The options are Disabled and Enabled.
Erasing Settings
Erase Event Log
If No is selected, data stored in the event log will not be erased. Select Yes, Next Reset, data in the event log will be erased upon next system reboot. Select Yes, Every Reset, data in the event log will be erased upon every system reboot. The options are No, (Yes, Next reset), and (Yes, Every reset).
When Log is Full
Select Erase Immediately for all messages to be automatically erased from the event log when the event log memory is full. The options are Do Nothing and Erase Immediately.
SMBIOS Event Log Standard Settings
Log System Boot Event
This option toggles the System Boot Event logging to enabled or disabled. The options are Enabled and Disabled.
MECI
The Multiple Event Count Increment (MECI) counter counts the number of occurrences that a duplicate event must happen before the MECI counter is incremented. This is a numeric value. The default value is 1.
METW
The Multiple Event Time Window (METW) defines number of minutes must pass between duplicate log events before MECI is incremented. This is in minutes, from 0 to 99. The default value is 60.
Note: After making changes on a setting, be sure to reboot the system for the changes to take effect.
▶View SMBIOS Event Log
This section displays the contents of the SMBIOS Event Log.
6.5 IPMI
Use this feature to configure Intelligent Platform Management Interface (IPMI) settings.
| Aptio Setup Utility - Copyright (C) 2017 American Megatrends, Inc. Main Advanced Event Logs IPMI Security Boot Save & Exit | |
| BMC Firmware Revision 1.43 IPMI STATUS Working | Press <Enter> to change the SEL event log configuration. |
| System Event Log BMC Network Configuration | |
| +: Select Screen ↑↓: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit | |
| Version 2.19.1268. Copyright (C) 2017 American Megatrends, Inc. | |
When you select this submenu and press the
- IPMI Firmware Revision: This feature indicates the IPMI firmware revision used in your system.
- Status of BMC: This feature indicates the status of the BMC (Baseboard Management Controller) installed in your system.
▶System Event Log
Enabling/Disabling Options
SEL Components
Select Enabled for all system event logging at bootup. The options are Enabled and Disabled.
Erasing Settings
Erase SEL
Select Yes, On next reset to erase all system event logs upon next system reboot. Select Yes, On every reset to erase all system event logs upon each system reboot. Select No to keep all system event logs after each system reboot. The options are No, Yes, On next reset, and Yes, On every reset.
When SEL is Full
This feature allows the user to determine what the BIOS should do when the system event log is full. Select Erase Immediately to erase all events in the log when the system event log is full. The options are Do Nothing and Erase Immediately.
Custom EFI Logging Options
Log EFI Status Codes
Select EFI (Extensible Firmware Interface) Status Codes to log EFI status codes. Select Error Codes to log EFI error codes. Select Progress Code to log the EFI progress code. Select both to log both EFI error codes and progress codes. The options are Disabled, Both, Error code and Progress code.
Note: After making changes on a setting, be sure to reboot the system for the changes to take effect.
▶BMC Network Configuration
The following items will be displayed:
- IPMI LAN Selection: This feature displays the IPMI LAN setting. The default setting is Failover.
- IPMI Network Link Status: This item displays the IPMI Network Link status. The default setting is Dedicated LAN.
- Current Configuration Address Source: This feature displays the source of the current IPMI LAN address. The default setting is DHCP (Dynamic Host Configuration Protocol).
- Station IP Address: This feature displays the Station IP address for this computer. This should be in decimal and in dotted quad form (i.e., 192.168.10.253).
- Subnet Mask: This feature displays the sub-network that this computer belongs to. The value of each three-digit number separated by dots should not exceed 255.
-
Station MAC Address: This feature displays the Station MAC address for this computer. Mac addresses are 6 two-digit hexadecimal numbers.
-
Gateway IP Address: This feature displays the Gateway IP address for this computer. This should be in decimal and in dotted quad form (i.e., 192.168.10.253).
- VLAN: Select Enabled to enable IPMI VLAN support. The options are Enabled and Disabled.
Update IPMI LAN Configuration
Select Yes for the BIOS to implement all IP/MAC address changes at the next system boot. The default setting is Yes.
IPMI LAN Selection
Use this feature to configure the IPMI LAN mode setting. The options are Dedicated, Shared, and Failover.
VLAN Support
Select Enabled for IPMI VLAN support. The options are Disabled and Enabled.
Configuration Address Source
Use this feature to select the IP address source for this computer. If Static is selected, you will need to know the IP address of this computer and enter it to the system manually in the field. If DHCP is selected, AMI BIOS will search for a DHCP (Dynamic Host Configuration Protocol) server attached to the network and request the next available IP address for this computer. The options are DHCP and Static.
6.6 Security Settings
This menu allows the user to configure the following security settings for the system.
| Aptio Setup Utility - Copyright (C) 2017 American Megatrends, Inc. Main Advanced Event Logs IPMI Security Boot Save & Exit | |
| Administrator Password Not Installed User Password Not Installed | Set Administrator Password |
| Password Description | |
| If the Administrator's / User's password is set, then this only limits access to Setup and is asked for when entering Setup. Please set Administrator's password first in order to set User's password, if clear Administrator's password, the User's password will be cleared as well. | |
| The password length must be in the following range: | |
| Minimum length 3 Maximum length 20 | |
| Administrator Password Password Check [Setup] | +: Select Screen ↑↓: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit |
| Secure Boot | |
Version 2.19.1268. Copyright (C) 2017 American Megatrends, Inc.
Administrator Password
Press Enter to set the user password which is required to enter the BIOS setup utility. The length of the password should be from 3 characters to 20 characters long.
Password Check
Select Setup for the system to check for a password at Setup. Select Always for the system to check for a password at bootup or upon entering the BIOS Setup utility. The options are Setup and Always.
▶Secure Boot (refer to Appendix F for more information)
This section displays the contents of the following secure boot features:
- System Mode
- Secure Boot
- Vendor Keys
Secure Boot
This feature is available when the platform key (PK) is pre-registered where the platform operates in the user mode and compatibility support module (CSM) support is disabled in the BIOS Setup utility. Select Enabled for secure boot flow control. The options are Disabled and Enabled.
Secure Boot Mode
This feature allows selection of the secure boot mode. The options are Standard and Custom. Select Standard to load manufacturer's default secure variables. Selecting Custom allows users to change the image execution policy and to manage secure boot keys.
CSM Support
Select Enabled to support the legacy Compatibility Support Module (CSM), which provides compatibility support for traditional legacy BIOS for system boot. The options are Disabled and Enabled.
▶Key Management
This submenu allows the user to configure the following Key Management settings.
Provision Factory Defaults
This feature allows provisioning the default secure boot keys set by the manufacturer when system is in the setup mode. The options are Disabled and Enabled.
▶Enroll all Factory Default Keys
Select Yes to install all default secure keys set by the manufacturer. The options are Yes and No.
▶Enroll Efi Image
This feature allows the image to run in the secure boot mode and the enroll of SHA256 hash of the binary into the Authorized Signature Database (DB).
▶ Save all Secure Boot variables
This feature allows the user to decide if all secure boot variables should be saved.
Secure Boot variable: Size/ Key#/ Key Source
▶ Platform Key (PK)
The Platform Key (PK), which is pre-installed in firmware during manufacturing, provides full control of the secure boot key hierarchy. The options are Save to File, Set New, and Erase.
▶Key Exchange Keys (KEK)
The Key Exchange Key (KEK), which is held by the operating system vendor, can be updated by the holder of the PK and be used by secure boot to protect access to signatures databases. The options are Save to File, Set New, Append, and Erase.
▶ Authorized Signatures
Authorized Signature Database (DB) contains authorized signing certificates and digital signatures. The options are Save to File, Set New, Append, and Erase.
▶Forbidden Signatures
Forbidden Signature Database (DBX), which is the inverse of DB, contains forbidden certificates and digital signatures. The options are Save to File, Set New, Append, and Erase
▶ Authorized TimeStamps
Authorized Timestamp Database (DBT) is used to issue and check signed time stamp certificates. The options are Save to File, Set New, Append, and Erase
▶OsRecovery Signatures
OsRecovery Signatures Database (DBR) contains secure boot authorized recovery variables. The options are Save to File, Set New, Append, and Erase
6.7 Boot Settings
Use this feature to configure Boot Settings:

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Aptio Setup Utility - Copyright (C) 2017 American Megatrends, Inc. Main Advanced Event Logs IPMI Security Boot Save & Exit Boot Configuration Boot mode select [DUAL] LEGACY to EFI support [Disabled] FIXED BOOT ORDER Priorities Boot Option #1 [Hard Disk:#3B00 I...] Boot Option #2 [UEFI Hard Disk] Boot Option #3 [USB Hard Disk] Boot Option #4 [USB CD/DVD] Boot Option #5 [USB Key] Boot Option #6 [USB Floppy] Boot Option #7 [USB Lan] Boot Option #8 [Network:IBA XE S1...] Boot Option #9 [UEFI USB CD/DVD] Boot Option #10 [CD/DVD] Boot Option #11 [UEFI USB Hard Disk] Boot Option #12 [UEFI CD/DVD] Boot Option #13 [UEFI USB Key] Boot Option #14 [UEFI USB Floppy] Boot Option #15 [UEFI USB Lan] Boot Option #16 [UEFI Network] Boot Option #17 [UEFI AP:UEFI: Bui...] ► Delete Boot Option ▲ Select boot mode LEGACY/UEFI ++: Select Screen ↑↓: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: ExitVersion 2.19.1268. Copyright (C) 2017 American Megatrends, Inc.
Use this feature to configure Boot Settings:
Boot mode select
Use this item to select the type of device that the system is going to boot from. The options are LEGACY, UEFI, and DUAL. The default setting is DUAL.
LEGACY to EFI support
Use this item to enable the EFI boot support. The options are Disabled and Enabled.
FIXED BOOT ORDER Priorities
This option prioritizes the order of bootable devices that the system to boot from. Press
*If the item above, "Boot mode select", is set to Legacy/UEFI/Dual, the following items will be displayed:
• Legacy/UEFI/Dual Boot Order #1
• Legacy/UEFI/Dual Boot Order #2
• Legacy/UEFI/Dual Boot Order #3
• Legacy/UEFI/Dual Boot Order #4
• Legacy/UEFI/Dual Boot Order #5
• Legacy/UEFI/Dual Boot Order #6
• Legacy/UEFI/Dual Boot Order #7
• Legacy/UEFI/Dual Boot Order #8
• UEFI/Dual Boot Order #9
• Dual Boot Order #10
• Dual Boot Order #11
• Dual Boot Order #12
• Dual Boot Order #13
• Dual Boot Order #14
• Dual Boot Order #15
• Dual Boot Order #16
• Dual Boot Order #17
▶ Delete Boot Option
Use this feature to remove a pre-defined boot device from which the system will boot during startup. The options are Select one to Delete, UEFI: Built-in EFI Shell, and CentOS.
▶UEFI Application Boot Priorities
This feature allows the user to specify which UEFI devices are boot devices.
Boot Option #1
The options are UEFI: Built-in EFI Shell and Disabled.
▶Hard Disk Drive BBS Priorities
This feature allows the user to specify the boot device priority from the available hard disk drives.
Boot Option #1
The options are (the available hard disk drive) and Disabled.
▶Network Drive BBS Priorities
This feature allows the user to specify which available network drives are boot devices.
Boot Option #1
The options are IBA XE Slot 0100 v2398 and Disabled.
▶UEFI Application Boot Priorities
- Boot Option #1
6.8 Save & Exit
Select the Save & Exit tab from the BIOS setup screen to configure the settings below.
| Aptio Setup Utility - Copyright (C) 2017 American Megatrends, Inc. Main Advanced Event Logs IPMI Security Boot Save & Exit | |
| Save Options Discard Changes and Exit Save Changes and Reset Save Changes Discard Changes Default Options Restore Optimized Defaults Save as User Defaults Restore User Defaults Boot Override #3B00 IDOB LUNO ATA HGST HMS5C4040 IBA XE Slot 5E00 v2366 UEFI: Built-in EFI Shell | Exit system setup without saving any changes. |
| +: Select Screen ↑↓: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit | |
Version 2.19.1268. Copyright (C) 2017 American Megatrends, Inc.
Save Options
Discard Changes and Exit
Select this option to quit the BIOS Setup without making any permanent changes to the system configuration, and reboot the computer. Select Discard Changes and Exit from the Exit menu and press
Save Changes and Reset
After completing the system configuration changes, select this option to save the changes you have made. This will reset (reboot) the system.
Save Changes
When you have completed the system configuration changes, select this option to save all changes made. This will not reset (reboot) the system.
Discard Changes
Select this option and press
Listed on this section are other boot options for the system (i.e., Built-in EFI shell). Select an option and press
Default Options
Restore Optimized Defaults
To set this feature, select Restore Optimized Defaults from the Save & Exit menu and press
Save As User Defaults
To set this feature, select Save as User Defaults from the Exit menu and press
To set this feature, select Restore User Defaults from the Exit menu and press
Boot Override
Listed on this section are other boot options for the system (i.e., Built-in EFI shell). Select an option and press
Appendix A
BIOS Error Codes
A.1 BIOS Error Beep (POST) Codes
During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur.
Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process. The error messages normally appear on the screen.
Fatal errors are those which will not allow the system to continue the boot-up procedure. If a fatal error occurs, you should consult with your system manufacturer for possible repairs.
These fatal errors are usually communicated through a series of audible beeps. The numbers on the fatal error list (on the following page) correspond to the number of beeps for the corresponding error.
| BIOS Beep (POST) Codes | ||
| Beep Code Error | Message Description | |
| 1 beep Refresh Circuits have been reset (Ready to power up) | ||
| 5 short, 1 long Memory error No memory detected in system | ||
| 5 long, 2 short Display memory read/write error Video adapter missing or with faulty memory | ||
| 1 long continuous System OH System overheat condition | ||
A.2 Additional BIOS POST Codes
The AMI BIOS supplies additional checkpoint codes, which are documented online at http://www.supermicro.com/support/manuals/ ("AMI BIOS POST Codes User's Guide").
When BIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, a diagnostic card can be attached to the computer to read I/O port 0080h (Supermicro p/n AOC-LPC80-20).
For information on AMI updates, please refer to http://www.ami.com/products/.
Appendix B
Standardized Warning Statements for AC Systems
B.1 About Standardized Warning Statements
The following statements are industry standard warnings, provided to warn the user of situations which have the potential for bodily injury. Should you have questions or experience difficulty, contact Supermicro's Technical Support department for assistance. Only certified technicians should attempt to install or configure components.
Read this appendix in its entirety before installing or configuring components in the Supermicro chassis.
These warnings may also be found on our website at http://www.supermicro.com/about/policies/safety_information.cfm.
Warning Definition

Warning! This warning symbol means danger. You are in a situation that could cause bodily injury. Before you work on any equipment, be aware of the hazards involved with electrical circuitry and be familiar with standard practices for preventing accidents.
警告の定義
この警告サインは危険を意味します。
Installation Instructions

Warning! Read the installation instructions before connecting the system to the power source.
設置手順書
Warning! This product relies on the building's installation for short-circuit (overcurrent) protection. Ensure that the protective device is rated not greater than: 250 V, 20 A.
サーキット・ブレーカー
Power Disconnection Warning

Warning! The system must be disconnected from all sources of power and the power cord removed from the power supply module(s) before accessing the chassis interior to install or remove system components.
電源切断の警告
Equipment Installation

Warning! Only trained and qualified personnel should be allowed to install, replace, or service this equipment.
機器の設置
Warning! This unit is intended for installation in restricted access areas. A restricted access area can be accessed only through the use of a special tool, lock and key, or other means of security. (This warning does not apply to workstations).
アクセス制限区域
Warning! There is the danger of explosion if the battery is replaced incorrectly. Replace the battery only with the same or equivalent type recommended by the manufacturer. Dispose of used batteries according to the manufacturer's instructions
電池の取り扱い
Redundant Power Supplies

Warning! This unit might have more than one power supply connection. All connections must be removed to de-energize the unit.
冗長電源装置
Warning! Hazardous voltage or energy is present on the backplane when the system is operating. Use caution when servicing.
バックプレーンの電圧
Comply with Local and National Electrical Codes

Warning! Installation of the equipment must comply with local and national electrical codes.
地方および国の電気規格に準拠
Warning! Ultimate disposal of this product should be handled according to all national laws and regulations.
製品の廃棄
Warning! Hazardous moving parts. Keep away from moving fan blades. The fans might still be turning when you remove the fan assembly from the chassis. Keep fingers, screwdrivers, and other objects away from the openings in the fan assembly's housing.
ファン・ホットスワップの警告
Power Cable and AC Adapter

Warning! When installing the product, use the provided or designated connection cables, power cables and AC adaptors. Using any other cables and adaptors could cause a malfunction or a fire. Electrical Appliance and Material Safety Law prohibits the use of UL or CSA-certified cables (that have UL/CSA shown on the code) for any other electrical devices than products designated by Supermicro only.
電源コードとACアダプター
System Specifications
Processors
Supports dual Intel® Xeon® 81xx/61xx/51xx/41xx/31xx and 82xx/62xx/52xx/42xx/32xx series (Socket P) processors which offer three Intel® UltraPath Interconnect (UPI) of up to 10.4 GT/s.
Note: Please refer to the motherboard specifications pages on our website for updates to supported processors.
Chipset
Intel PCH C621 chipset
BIOS
128 Mb AMI® Flash ROM
Memory
Supports up to 6 TB of 3DS Load Reduced DIMM (3DS LRDIMM), 3DS Registered DIMM (3DS RDIMM) DDR4 (288-pin) ECC of up to 2933/2666 MHz modules in 24 slots.
SATA Controller
On-chip (Intel PCH C621) controller
Drive Bays
48 2.5"" hot-swap drive bays to house SAS3/SATA4/NVMe (up to four) drives
PCI Expansion Slots
Supports the following expansion slots:
- One SIOM module
- Two PCI-E 3.0 x16 slots
• One PCI-E 3.0 x8 slot
Motherboard
X11DSC+
Chassis
SC226STS-R1K62P1; 2U Rackmount, (WxHxD) 17.2 x 3.5 x 30.7-in (437 x 89 x 780-mm)
System Cooling
Up to five 8-cm PWM fans
Power Supply
Model: PWS-1K62A-1R
AC Input Voltages: 100-127/200-240 VAC
Rated Input Current: 13-9A (100-127V)/10-6A (200-240V)
Rated Input Frequency: 50-60 Hz
Rated Output Power: 1600 Watt
Rated Output Voltages: 100-127V: +12V (83.3A), +12Vsb (2.1A); 200-240V: +12V (133A), +12Vsb (2.1A)
Operating Environment
Operating Temperature: 10° to 35° C (50° to 95° F)
Non-operating Temperature: -40^ to 60^ C ( -40^ to 140^ F)
Operating Relative Humidity: 8% to 90% (non-condensing)
Non-operating Relative Humidity: 5% to 95% (non-condensing)
Regulatory Compliance
Electromagnetic Emissions: FCC Class A, EN 55032 Class A, EN 61000-3-2/3-3, CISPR 32 Class A Electromagnetic Immunity: EN 55024/CISPR 24, (EN 61000-4-2, EN 61000-4-3, EN 61000-4-4, EN 61000-4-5, EN 61000-4-6, EN 61000-4-8, EN 61000-4-11), CNS14336-1, CNS13438, GB4943.1-2011, GB9254-2008(Class A) and GB17625.1-2012 Safety: CSA/EN/IEC/UL 60950-1 Compliant, UL or CSA Listed (USA and Canada), CE Marking (Europe) Other: VCCI-CISPR 32 and AS/NZS CISPR 32 Environmental: Directive 2011/65/EU and Delegated Directive (EU) 2015/863 and Directive 2012/19/EU
Perchlorate Warning
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. "Perchlorate Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate"
Appendix D
UEFI BIOS Recovery
Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue. Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall Supermicro be liable for direct, indirect, special, incidental, or consequential damages arising from a BIOS update. If you need to update the BIOS, do not shut down or reset the system while the BIOS is updating to avoid possible boot failure.
D.1 Overview
The Unified Extensible Firmware Interface (UEFI) provides a software-based interface between the operating system and the platform firmware in the pre-boot environment. The UEFI specification supports an architecture-independent mechanism that will allow the UEFI OS loader stored in an add-on card to boot the system. The UEFI offers clean, hands-off management to a computer during system boot.
D.2 Recovering the UEFI BIOS Image
A UEFI BIOS flash chip consists of a recovery BIOS block and a main BIOS block (a main BIOS image). The recovery block contains critical BIOS codes, including memory detection and recovery codes for the user to flash a healthy BIOS image if the original main BIOS image is corrupted. When the system power is turned on, the recovery block codes execute first. Once this process is complete, the main BIOS code will continue with system initialization and the remaining POST (Power-On Self-Test) routines.
Note 1: Follow the BIOS recovery instructions below for BIOS recovery when the main BIOS block crashes.
Note 2: When the BIOS recovery block crashes, you will need to follow the procedures to make a Returned Merchandise Authorization (RMA) request. (For a RMA request, please see section 3.5 for more information). Also, you may use the Supermicro Update Manager (SUM) Out-of-Band (OOB) (https://www.supermicro.com.tw/products/nfo/SMS_SUM.cfm) to reflash the BIOS.
D.3 Recovering the Main BIOS Block with a USB Device
This feature allows the user to recover the main BIOS image using a USB-attached device without additional utilities used. A USB flash device such as a USB Flash Drive, or a USB CD/DVD ROM/RW device can be used for this purpose. However, a USB Hard Disk drive cannot be used for BIOS recovery at this time.
The file system supported by the recovery block is FAT (including FAT12, FAT16, and FAT32) which is installed on a bootable or non-bootable USB-attached device. However, the BIOS
might need several minutes to locate the SUPER.ROM file if the media size becomes too large due to the huge volumes of folders and files stored in the device.
To perform UEFI BIOS recovery using a USB-attached device, follow the instructions below.
- Using a different machine, copy the "Super.ROM" binary image file into the Root "\" directory of a USB device or a writable CD/DVD.
Note: If you cannot locate the "Super.ROM" file in your drive disk, visit our website at www.supermicro.com to download the BIOS package. Extract the BIOS binary image into a USB flash device and rename it "Super.ROM" for the BIOS recovery use. - Insert the USB device that contains the new BIOS image ("Super.ROM") into your USB drive and reset the system when the following screen appears.
- After locating the healthy BIOS binary image, the system will enter the BIOS Recovery menu as shown below.

text_image
SUPERON BMC IP:10.132.161.13 PEI--Could Not Find Recovery Image... 87Note: At this point, you may decide if you want to start the BIOS recovery. If you decide to proceed with BIOS recovery, follow the procedures below.

text_image
Optio Setup Utility - Copyright (C) 2017 American Megatrends, Inc. Auto Advanced Event Log DMI MACROW Security Boot Save & Exit Please select blocks you want to update Rega Value Boot Block Update [Enabled] [Enabled] ►Proceed with Flash update Get this option to reset M8R6K to default values +: Select Screen T4: Select Item Enter: Select +/-: Change Dot. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit EBC: EXIT Version 2.19.1986. Copyright (C) 2017 American Megatrends, Inc.- When the screen as shown above displays, use the arrow keys to select the item "Proceed with flash update" and press the
key. You will see the BIOS recovery progress as shown in the screen below.
Note: Do not interrupt the BIOS flashing process until it has completed.
- After the BIOS recovery process is complete, press any key to reboot the system.
- Using a different system, extract the BIOS package into a USB flash drive.

text_image
Auto Setup Utility - Copyright (C) 2017 American Hesatrends, Inc. Recovery WARNING System firmware is being updated. Keyboard is locked. DO NOT TURN THE POWER OFF!! Once firmware update is completed press any key to reboot the system Program new data write now boot block... 178 +#: Select Screen T4: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults #4: Save a Exit EBC: Exit Version 2.19.1266. Copyright (C) 2017 American Hesatrends, Inc.- Press
continuously during system boot to enter the BIOS Setup utility. From the top of the tool bar, select Boot to enter the submenu. From the submenu list, select Boot

text_image
MWARNING System firmware is being updated. Keyboard is locked. DO NOT TURN THE POWER OFF !!! Once Firmware update is completed press any key to reboot the system Flash update Flash update completed. Press any key to reset the system #: Select Screen #: Select Item Enter: Select #/-1 Change Opt. F1: General Help FS: Previous Values FS: Optimized Defaults #4: Save & Exit ESC: Exit Version 2.15.1056. Copyright (C) 2017 American Megatrends, Inc.Option #1 as shown below. Then, set Boot Option #1 to [UEFI AP:UEFI: Built-in EFI Shell]. Press
- When the UEFI Shell prompt appears, type fs# to change the device directory path. Go to the directory that contains the BIOS package you extracted earlier from Step 6. Enter flash.nsh BIOSname.### at the prompt to start the BIOS update process.
Note: Do not interrupt this process until the BIOS flashing is complete.

text_image
Auto Setup Utility - Copyright (C) 2017 American Megatrends, Inc. Main Advanced Event Logs IPRT Security BOOT Save & Exit Boot Configuration Boot mode select [DUAL] LEGACY to EPI support [Disabled] FIXED BOOT ORDER Priorities Boot Option #1 [DEF] No/DEF: No/... Boot Option #2 [DSV/DVI] Boot Option #3 [DBS Hard Disk] Boot Option #4 [USB ID/DVI] Boot Option #5 [USB Key/GenDisk] Boot Option #6 [USB Floppy] Boot Option #7 [USB Lan] Boot Option #8 [Network:IDA QE 91...] Boot Option #9 [DEFI Hand Disk] Boot Option #10 [DEFI DD/DVI] Boot Option #11 [DEFI USB Hard Disk] Boot Option #12 [DEFI USB CD/DVI] Boot Option #13 [DEFI USB Key/UDFI...] Boot Option #14 [DEFI USB Floppy] Boot Option #15 [DEFI USB Lan] Boot Option #16 [DEF] Network! Boot Option #17 [Hear Disk] Add New Boot Option Sets the system boot order **: Select Screen T4: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit Version 2.19.1366. Copyright (C) 2017 American Megatrends, Inc.- The screen above indicates that the BIOS update process is complete. When you see the screen above, unplug the AC power cable from the power supply, clear CMOS, and plug the AC power cable in the power supply again to power on the system.

text_image
UEFI Interactive Shell v2.1 EDI: II UEFI v2-50 (American flagatrends, 0x00s000c) Mapping table: F50: Alius(s):H040B:BLK1 PciRoot(oxv)/Pci(ox1,oxv)/w8k(ox1,oxv)/W01_MER,ox07061972,ox809,oxi (C6532) BLK0: A1106(s): PciRoot(oxv)/Pci(ox1,oxv)/w8k(ox1,oxv) Press F50: is 1 seconds to skip startup.nsh or any other key to continue. Shell: fast F50: VCI PDLOOS F50: VAPILOOS: CD SKAPMEZ_03162017 F50: VAPILOOS:DMATMEZ_0366261Y: 4seh.esh_X1SPUT.5J- Press
continuously to enter the BIOS Setup utility.

text_image
Done. [ Access Oxxx Part Ex ] @Read Index 0x51: 0x18 Done. ********************************************************************** * Program BIOS and ME (including PDT) regions... * ********************************************************************** | AMI Firmware Update Utility v5.07.01.1317 | | Copyright (C)2017 American Registrends Inc. All Rights Reserved. OPUD = 50652 Reading Flash ....... done - ME Data Size checking . ok - PFS checkouts ....... ok - Check Bootload ....... ok, Erasing Boot Block ....... done Updating Boot Block ....... done Verifying Boot Block ....... done _Erasing Mesh Block ....... 0x00132000 (00)- Press
to load the default settings. - After loading the default settings, press
to save the settings and exit the BIOS Setup utility.
