SG380 - Générateur de signaux RF SRS - Free user manual and instructions

Product Type	RF Signal Generator
Brand	SRS (Stanford Research Systems)
Model	SG380
Frequency Range	1 MHz to 2.5 GHz
Frequency Resolution	0.001 Hz
Output Power Range	-110 dBm to +13 dBm
Modulation Types	AM, FM, PM, Pulse, Sweep, I/Q
Phase Noise	< -120 dBc/Hz at 1 GHz, 10 kHz offset
Dimensions (W x H x D)	17.0 x 3.5 x 17.5 inches (432 x 89 x 445 mm)
Weight	12.5 lbs (5.7 kg)
Power Supply	AC 100-240 V, 50/60 Hz, 60 W max
Display	Color TFT LCD, 5.7 inch
Interfaces	GPIB, RS-232, Ethernet, USB, Option: Rubidium frequency standard
Operating Temperature	0°C to 50°C
Storage Temperature	-20°C to 70°C
Humidity	< 95% RH, non-condensing
Maintenance & Cleaning	Clean with soft, dry cloth. Avoid solvents.
Safety	Use grounded outlet. Do not operate with covers removed.
Spare Parts & Repairability	Contact SRS support for parts and repair information.
Warranty	Standard one-year warranty

Frequently Asked Questions - SG380 SRS

What is the frequency range of the SRS SG380?

The SG380 covers a frequency range from 1 MHz to 2.5 GHz with 0.001 Hz resolution.

What modulation types are supported?

It supports AM, FM, PM, pulse, sweep, and I/Q modulation.

How do I connect the SG380 to a computer?

You can use GPIB, RS-232, Ethernet, or USB interfaces for remote control.

What is the output power range?

The output power can be set from -110 dBm to +13 dBm.

Does the SG380 have a touchscreen?

Yes, it has a color TFT LCD with touchscreen capability for intuitive operation.

Is there an optional rubidium frequency standard?

Yes, an optional rubidium frequency standard is available for improved accuracy.

What is the phase noise performance?

Phase noise is typically < -120 dBc/Hz at 1 GHz and 10 kHz offset.

How do I clean the SG380?

Use a soft, dry cloth. Avoid solvents or abrasive cleaners.

What is the warranty period?

The standard warranty is one year from the date of purchase.

Can the SG380 be rack-mounted?

Yes, it has a standard 19-inch rack-mount form factor with a height of 3.5 inches (2U).

USER MANUAL SG380 SRS

RF Signal Generators

SG382 (DC to 2.025 GHz)

SG384 (DC to 4.050 GHz)

SG386 (DC to 6.075 GHz)

User Manual

STANFORD RESEARCH SYSTEMS MODEL SG384 DC to 4.05 GHz SIGNAL GENERATOR 4.050 000 000 000 000 OUTPUTS DC to 62.5 MHz OFFS W/O 950 MHz to 4.05 GHz AC H/D 410 & SHG (BEAR) —● MODULATION ON OFF AM FM SPM SWEEP LTM PLASE NOISE HQ OUTPUTS EXT MOD TYPE MOD FCN SELECT / ADJUST PREF PHASE AMPL. MOD RATE MOD DEV DC OFFS MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEBT MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEB MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DEC MOD DECE MOD DECE MOD DECE MOD DECE MOD DECE MOD DECE MOD DECE MOD DECE MOD DECE MOD DECE MOD DECE MOD DECE MOD DECE

NSRS

Stanford Research Systems

Certification

Stanford Research Systems certifies that this product met its published specifications at the time of shipment.

Warranty

This Stanford Research Systems product is warranted against defects in materials and workmanship for a period of one (1) year from the date of shipment.

Service

For warranty service or repair, this product must be returned to a Stanford Research Systems authorized service facility. Contact Stanford Research Systems or an authorized representative before returning this product for repair.

Model numbers

This document is the User Manual for three models in the SG380 series of RF Signal Generators. The SG382, SG384 and SG386 provide front panel outputs of frequencies up to 2.025 GHz, 4.050 GHz and 6.075 GHz respectively.

Information in this document is subject to change without notice.

Copyright © Stanford Research Systems, Inc., 2012, 2017, 2019, 2021. All rights reserved.

Stanford Research Systems, Inc.

1290-C Reamwood Avenue

Sunnyvale, California 94089

Phone: [phone]

Fax: [phone]

www.thinkSRS.com

Printed in the U.S

Contents

Contents i

Safety and Preparation for Use vii

Symbols You May Find on SRS Products viii

Specifications ix

Typical Waveforms xviii

Typical Spectra xx

Quick Start Instructions 1

Introduction 3

Feature Overview 3

Front-Panel Overview 4

Parameter and Units Display 4

Main Output 5

BNC Output 5

Type-N Output 5

Indicators 5

Modulation Modes 6

Parameter Selection and Adjustment 7

Display Navigation 7

Numeric Entry and Secondary Parameters 8

Stepping Up and Down 8

Step Size 9

Store and Recall Settings 9

Secondary Functions 10

Cancel 11

Power and Status 11

Status Indicators 11

REF / SYNTH 11

INTERFACE 11

POWER 12

Rear-Panel Overview 13

AC Power 13

Timebase 13

10 MHz IN 13

10 MHz OUT 13

Remote Interfaces 14

GPIB 14

RS-232 14

Ethernet 14

Modulation 14

IN 14

Table of Contents ii

OUT 14

Rear-Panel Optional Outputs 15

Option 1: Clock Outputs 15

Option 2: 8 GHz Frequency Doubler 15

Option 3: I/Q Modulator 15

Operation 17

Introduction 17

Power-On 17

Setting Parameters 17

Frequency 18

Phase 18

Rel Phase 19

Amplitude and Power 20

DC Offset 21

RF ON/RF OFF 22

Modulation and Sweeps

Introduction 23

Modulation Section 24

Modulation On/Off 24

Modulation Type 24

Modulation Function 24

Modulation Rate 25

Modulation Deviation 25

Modulation Waveform Generator, Inputs and Outputs 26

Linear Modulation 26

Pulse Modulation 26

Linear Noise Modulation 27

Pulse Noise Modulation 27

Modulation Output 27

Amplitude Modulation 28

Setting up Amplitude Modulation: 28

Amplitude Modulation Example 29

Frequency Modulation 29

Setting up Frequency Modulation: 31

Frequency Modulation Example 32

Phase Modulation 33

Setting up Phase Modulation: 33

Phase Modulation Example 34

Pulse and Blank Modulation 35

Setting up Pulse Modulation: 35

Pulse Modulation Example 36

Phase Continuous Frequency Sweeps 38

Setting up Frequency Sweeps: 39

I/Q Modulation (Option 3) 40

Setting up External IQ Modulation: 41

Setting up Internal Noise IQ Modulation: 42

IQ Noise Modulation Example 42

Secondary (Shift) Parameters 43

Table of Contents iii

REL Φ=0 43
PRBS 43
STEP SIZE 43
Timebase 44
NET 44
TCP/IP Configuration Methods 44
TCP/IP Based Remote Interfaces 45
Link Speed 45
Reset the TCP/IP Interface 45
GPIB 46
GPIB Address 46
Reset the GPIB Interface	46
RS-232	47
RS-232 Configuration	47
Reset the RS-232 Interface	47
DATA	47
STATUS	48
TCP/IP Status 48
Error Status	48
Instrument Status	49
Self Test	49
LOCAL	49
INIT	49
CAL	49
Factory Default Settings	50
Remote Programming	53
Introduction	53
Interface Configuration	53
GPIB	54
RS-232	54
LAN	54
Network Security	55
Front-Panel Indicators	56
Command Syntax	56
Parameter Conventions	57
Numeric Conventions	57
Abridged Index of Commands	58
Detailed Command List	60
Common IEEE-488.2 Commands	60
Status and Display Commands	63
Signal Synthesis Commands	65
Modulation Commands	68
List Commands	74
Interface Commands	76
Status Byte Definitions	78
Serial Poll Status Byte	78
Standard Event Status Register	79

Table of Contents iv

Instrument Status Register 79

List Mode 80

List Instrument States 80

Enables/Disables 81

Modulation List States 82

Examples 83

Error Codes 84

Execution Errors 84

Query Errors 85

Device Dependent Errors 85

Parsing Errors 86

Communication Errors 87

Other Errors 87

Example Programming Code 88

SG380 Series Operation Verification 93

Overview 93

Equipment Required 93

SG380 Series Self Test 94

Output Power Tests 94

BNC Output Power Test 94

Type-N Output Power Test 95

Frequency Synthesis Tests 97

Frequency Generation Tests 97

Modulation Output Test 98

Modulation Input Test 99

Timebase Calibration 100

SR620 Configuration 101

Timebase Calibration Test 101

Calibration 102

Option Board Verifications 102

Option 1: Clock Output Test 102

Option 2: RF Doubler Test 104

Option 2: DAC Output Test 105

Option 3: IQ Modulation 106

Conclusions 106

Circuit Description 107

Overview 107

Block Diagram 108

Detailed Circuit Description 110

Front-Panel Display 110

Front-Panel Display EMI Filter 111

Motherboard 111

Timebases 111

LF DDS and 19 MHz Reference 112

Table of Contents v

Microcontroller and Interface 113

Modulation Processor 114

Modulation ADC and DACs 115

RF DDS 116

RF Block and Rear-Panel Options Interface 117

Power Conditioning 118

Motherboard to RF Block Jumper 118

RF Output Block 118

RF Synthesizer 119

RF Dividers and Selectors 120

RF I/Q Modulator, Amplifiers and Attenuators 121

RF Output Attenuators 122

BNC Output 122

Power Supply 123

Rear-Panel Options 124

Clock Output (Options 1) 124

RF Doubler (Option 2) 125

I/Q Modulator (Option 3) 126

Timebase Options 126

Appendix A : Rational Approximation Synthesis 127

Phase Lock Loop Frequency Synthesizers 127

Phase Noise 128

Increasing Frequency Resolution 129

A Note on Fractional-N Synthesis 129

About YIG Oscillators 129

A New Approach 130

An Example 131

Elimination of Error 132

Conclusion 132

Appendix B : Parts List 133

Appendix C : Schematic Diagrams 153

Revisions 183

Safety and Preparation for Use

Line Voltage

The instruments operate from a 90 to 132 V AC or 175 to 264 V AC power source having a line frequency between 47 and 63 Hz. Power consumption is less than 90 VA total. In standby mode, power is turned off to the main board. However, power is maintained at all times to the installed timebase. Units with the standard ovenized quartz oscillator or the optional rubidium timebase will consume less than 15 VA and 25 VA, respectively, in standby mode.

Power Entry Module

A power entry module, labeled AC POWER on the back panel of the instrument, provides connection to the power source and to a protective ground.

Power Cord

The unit is shipped with a detachable, three-wire power cord for connection to the power source and protective ground.

The exposed metal parts of the box are connected to the power ground to protect against electrical shock. Always use an outlet which has a properly connected protective ground. Consult with an electrician if necessary.

Grounding

BNC shields are connected to the chassis ground and the AC power source ground via the power cord. Do not apply any voltage to the shield.

Line Fuse

The line fuse is internal to the instrument and may not be serviced by the user.

Operate Only with Covers in Place

To avoid personal injury, do not remove the product covers or panels. Do not operate the product without all covers and panels in place.

Serviceable Parts

There are no user serviceable parts. Refer service to a qualified technician.

Symbols You May Find on SRS Products

Symbol	Description
	Alternating Current
	Caution – risk of electrical shock
	Frame or Chassis terminal
	Caution – refer to accompanying document
	Earth (ground) terminal
	Battery
	Fuse
boost	Power On
	Power Off
	Power Standby

Specifications

Frequency Setting ( f_c )

Frequency ranges

BNC output DC to 62.5 MHz

Type-N output

SG382 950 kHz to 2.025 GHz

SG384 950 kHz to 4.050 GHz

SG386 950 kHz to 6.075 GHz

SMA rear-panel (Opt 2)

SG384 4.050 GHz to 8.100 GHz

SG386 6.075 GHz to 8.100 GHz

Frequency resolution 1 μHz at any frequency

Switching speed < 8 ms (to within 1 ppm)

Frequency error < (10^-18 + timebase error) × f_C

Frequency stability < 1:10 -^11 (1 second Allan variance)

Front-Panel Type-N Output (50 Ω load)

Frequency range

SG382 950 kHz to 2.025 GHz

SG384 950 kHz to 4.050 GHz

SG386 950 kHz to 6.075 GHz

Output power

SG382 +16.5 dBm to -110 dBm (1.5 V RMS to 0.7 V_RMS )

SG384 +16.5 dBm (-3.50 dB/GHz above 3 GHz) to -110 dBm

SG386 +16.5 dBm (-3.25 dB/GHz above 4 GHz) to -110 dBm

Power resolution 0.01 dBm

Power accuracy ±1 dB (±2 dB above 4 GHz and above +5 dBm or below -100 dBm)

Output coupling 50 Ω, AC

User load 50 Ω

VSWR <1.6

Reverse protection 30 V _DC , +25 dBm RF

Front-Panel BNC Output (50 Ω load)

Frequency range DC to 62.5 MHz

Amplitude

Full specs 1.00 to 0.001 V RMS (+13 dBm to -47 dBm)

Derated specs 1.00 to 1.25 V RMS (+14.96 dBm)

Offset ± 1.50V_DC

Maximum excursion ±1.817 V (amplitude + offset)

Amplitude resolution <1 %

Amplitude accuracy ±5 %

Offset resolution 5 mV

Harmonics <-40 dBc

Spurious <-75 dBc

Output coupling DC, 50 Ω ±2 %

User load 50 Ω

Reverse protection ±5 V_DC

Specifications x

Spectral Purity of the RF Output Referenced to 1 GHz ^(1)

Sub harmonics None (No doublers are used below 4 GHz.)

Harmonics <−25 dBc with +7 dBm on Type-N output

Spurious

Within 10 kHz of carrier < -65 dBc

More than 10 kHz from carrier < -75 dBc

Phase noise

Offset from carrier Phase Noise (typical)

10 Hz -80 dBc/Hz

1 kHz -102 dBc/Hz

20 kHz

SG382 & SG384 -116 dBc/Hz

SG386 -114 dBc/Hz

1 MHz

SG382 & SG384 -130 dBc/Hz

SG386 -124 dBc/Hz

Residual FM 1 Hz rms, typical, over 300 Hz to 3 kHz bandwidth

Residual AM 0.006 % rms, typical, over 300 Hz to 3 kHz bandwidth

(1) Spurs, phase noise and residual FM scale by 6 dB/octave to other carrier frequencies

Phase Setting of Front-Panel Outputs

Phase range ±360°

Phase resolution

DC to 100 MHz 0.01°

100 MHz to 1 GHz 0.1°

1 GHz to 8.1 GHz 1.0^

Internal Modulation Source

Waveforms Sine, ramp, saw, square, pulse, noise

Sine THD -80 dBc (typical at 20 kHz)

Ramp linearity <0.05 % (1 kHz)

Rate

SG382 & SG384

f c ≤ 62.5 MHz 1 μHz to 500 kHz

f c > 62.5 MHz 1 μHz to 50 kHz

SG386

f c ≤ 93.75 MHz 1 μHz to 500 kHz

f c > 93.75 MHz 1 μHz to 50 kHz

Rate resolution 1 μHz

Rate error < 1:2^31 + timebase error

Noise function White Gaussian noise, RMS = DEV / 5

Noise bandwidth 1 μHz < ENBW < 50 kHz

Pulse generator period 1 μs to 10 s

Pulse generator width 100 ns to 9999.9999 ms

Pulse timing resolution 5 ns

Pulse noise function PRBS length 2^5 to 2^19 . Bit period (100 + n· 5) ns

100 ns to 10 s in 5 ns steps

Specifications xi

Modulation Waveform Output

Output impedance 50 Ω (for reverse termination)

User load Unterminated 50 Ω coax

AM, FM, M ± 1 V for ± full deviation

Pulse/Blank "Low" = 0 V, "High" = 3.3 V

Connector Rear-panel BNC

DC

External Modulation Input

Modes AM, FM, ΦM, Pulse and Blank

Unmodulated level 0 V input for unmodulated carrier

AM, FM, M ±1 V input for ± full deviation

Modulation bandwidth >100 kHz

Modulation distortion < -60 dB

Input impedance 100 kΩ

Input Coupling AC (4 Hz high pass) or DC

Input offset <500 V

Pulse/Blank threshold +1 V_DC

Connector Rear-panel BNC

Frequency Modulation

Frequency deviation

Minimum 0.1 Hz

Maximum

SG382 & SG384

f_C≤ 62.5MHz Smaller of f_C or (64 MHz - f_C )

62.5MHz < f_c≤ 126.5625MHz 1MHz

126.5625 MHz < f_c≤ 253.1250MHz 2MHz

253.1250 MHz < f_c ≤ 506.25 MHz 4 MHz

506.25 MHz < f_c≤ 1.0125GHz 8MHz

1.0125 GHz < f_c ≤ 2.025 GHz 16 MHz

2.025 GHz < f_C≤ 4.050 GHz (SG384) 32 MHz

4.050GHz < f_c≤ 8.100GHz (Opt 2) 64MHz

SG386

f_C≤ 93.75MHz Smaller of fC or (96 MHz- fC

93.75MHz < f_C≤ 189.84375MHz 1MHz

189.84375 MHz < f_c ≤ 379.6875 MHz 2 MHz

379.6875 MHz < f_C≤ 759.375MHz 4MHz

759.375 MHz < f_c≤ 1.51875GHz 8MHz

1.51875 GHz < f_C ≤ 3.0375 GHz 16 MHz

3.0375 GHz < f_c≤ 6.075GHz 32MHz

6.075GHz < f_c≤ 8.100GHz (Opt 2) 64MHz

Frequency Modulation (continued)

Deviation resolution 0.1 Hz

Deviation accuracy

SG382 & SG384

f c ≤ 62.5 MHz < 0.1 %

f c > 62.5 MHz <3 %

SG386

f c ≤ 93.75 MHz <0.1 %

fc > 93.75 MHz < 3 % ]

Modulation source Internal or external

Modulation distortion < -60 dB (f C = 100MHz , f_M = 1kHz , f_D = 1kHz )

Ext FM carrier offset <1:1000 of deviation

Modulation bandwidth

SG382 & SG384

f c ≤ 62.5 MHz 500 kHz

f c > 62.5 MHz 100 kHz

SG386

f c ≤ 93.75 MHz 500 kHz

f C > 93.75MHz 100kHz

Phase Continuous Frequency Sweeps

Frequency span

0.1 Hz to entire sweep range

Sweep ranges

SG382 & SG384

DC to 64 MHz

59.375 to 128.125 MHz

118.75 to 256.25 MHz

237.5 to 512.5 MHz

475 to 1025 MHz

950 to 2050 MHz

1900 to 4100 MHz (SG384)

3800 to 8200 MHz (Opt. 2 only)

SG386

DC to 96 MHz

89.0625 to 192.1875 MHz

178.125 to 384.375 MHz

356.25 to 768.75 MHz

712.5 to 1537.5 MHz

1425 to 3075 MHz

2850 to 6150 MHz

5950 to 8150 MHz (Opt. 2 only)

Deviation resolution 0.1 Hz

Internal or external

Sweep source

<0.1 Hz + (deviation / 1000)

Sweep distortion

<1:1000 of deviation

Sweep offset

Triangle, ramps, or sine up to 120 Hz

Sweep function

Specifications xiii

Phase Modulation

Deviation 0 to 360°

Deviation resolution

$$ \mathrm{DC} < \mathrm {f_ {c}} \leq 1 0 0 \mathrm{MHz} 0. 0 1 ^ {\circ} $$

$$ 1 0 0 \mathrm{MHz} < \mathrm{f} _ {\mathrm{C}} \leq 1 \mathrm{GHz} 0. 1 ^ {\circ} $$

$$ f _ {\mathrm{c}} > 1 \mathrm{GHz} 1. 0 ^ {\circ} $$

Deviation accuracy

SG382 & SG384

$$ f \quad c \leq 62.5 \text{MHz} < 0.1\% $$

$$ f _ {c} > 62.5 \mathrm{MHz} < 3 \% $$

SG386

$$ f \quad c \leq 93.75 \text{MHz} < 0.1\% $$

$$ f _ {c} > 93.75 \mathrm{MHz} < 3 \% $$

Modulation source

Internal or external

Modulation distortion

$$ < - 6 0 \mathrm{dB} \left(\mathrm{f} _ {\mathrm{C}} = 1 0 0 \mathrm{MHz}, \mathrm{f} _ {\mathrm{M}} = 1 \mathrm{kHz}, \Phi_ {\mathrm{D}} = 5 0 ^ {\circ}\right) $$

Modulation bandwidth

SG382 & SG384

$$ f \quad c \leq 6 2. 5 \mathrm{MHz} \quad 5 0 0 \mathrm{kHz} $$

$$ f \quad c > 6 2. 5 \mathrm{MHz} \quad 1 0 0 \mathrm{kHz} $$

SG386

$$ \mathrm{f} \quad \mathrm{c} \leq 9 3. 7 5 \mathrm{MHz} \quad 5 0 0 \mathrm{kHz} $$

$$ \mathrm{f} \quad \mathrm{c} > 9 3. 7 5 \mathrm{MHz} \quad 1 0 0 \mathrm{kHz} $$

Amplitude Modulation

Range 0 to 100% (Decreases above +7 dBm output)

Resolution 0.1%

Modulation source Internal or external

Modulation distortion (f_M = 1kHz, Depth = 50%)

$$ \mathrm{f} _ {\mathrm{C}} \leq 62.5 \mathrm{MHz}, \text {BNC output} < 1 \% $$

$$ \mathrm {f_ {C} > 62.5 MHz, Type - N output < 3 \% typical} $$

Modulation bandwidth >100 kHz

Pulse/Blank Modulation

Pulse mode Logic "high" turns BNC and RF on

Blank mode Logic "high" turns BNC and RF off

On/Off ratio

BNC output 70 dB

Type-N output

$$ f _ {\mathrm{c}} < 1 \mathrm{GHz} \quad 5 7 \mathrm{dB} $$

$$ 1 \mathrm{GHz} \leq \mathrm{f} \quad \mathrm{c} < 4 \mathrm{GHz} 4 0 \mathrm{dB} $$

$$ f \quad c \geq 4 \mathrm{GHz} \quad 3 5 \mathrm{dB} $$

Pulse feed-through 10 % of carrier for 20 ns at turn-on (typical)

Turn on/off delay 60 ns

RF rise/fall time 20 ns

Modulation source Internal or external pulse

External I/Q Modulation (Option 3)

Modulated output Front-panel Type-N only (+10 dBm max)

Frequency Range Carrier frequencies above 400 MHz

I/Q inputs 50 Ω, ±0.5 V, (rear BNCs)

I or Q input offset < 500 V

I/Q full scale (I ^2 + Q^2)^1/2 = 0.5 V

Carrier suppression >40 dBc (>35 dBc above 4 GHz)

Modulation bandwidth 200 MHz

Square Wave Clock Outputs (Option 1)

Differential clocks Rear-panel SMAs drive 50 Ω loads

Frequency range DC to 4.05 GHz

Transition time <35 ps (20 % to 80 %)

Jitter (f_c > 62.5MHz) 300 fs rms(typical, 1kHz to 5MHz BW at 1GHz )

Jitter (f_c≤ 62.5MHz) < 10^-4 U.I. (1 kHz to 5 MHz or f/2 BW)

Amplitude 0.4 to 1.0 V _PP

Offset ±2 V_DC

Amplitude & Offset resolution 5 mV

Amplitude & Offset accuracy ±5 %

Output coupling DC, 50 Ω ± 2 %

Compliance ECL, PECL, RSECL, CML & LVDS

RF Doubler Output (Option 2)

Output Rear-panel SMA

Frequency range (SG384) 4.050 to 8.10 GHz

Frequency range (SG386) 6.075 to 8.10 GHz

RF amplitude

4.05 to 7 GHz -10 dBm to +13 dBm

7 to 8.10 GHz -10 dBm to +7 dBm

Overrange +16.5 dBm

Sub harmonic (fC / 2)

f_c<6.5 GHz <-25 dBc typical

f_c=8.1 GHz<-12 dBc typical

Mixing products (2f C and 3f C / 2) <−20 dBc

Harmonics (n × fC) <−25 dBc

Spurious (8 GHz) <-55 dBc (>10 kHz offset)

Phase noise (8 GHz) -98 dBc/Hz at 20 kHz offset, typical

Amplitude resolution 0.01 dBm

Amplitude accuracy

4.05 to 6.5 GHz ±1 dB

6.5 to 8.10 GHz ±2 dB

Modulation modes FM, M, and Sweeps

Output coupling AC, 50 Ω

Reverse protection 30 V _DC , +25 dBm RF

DC Bias Source (comes with Option 2)

Output Rear-panel SMA

Voltage range ±10 V

Offset voltage <20 mV

DC accuracy ±0.2 %

DC resolution 5 mV

Output resistance 50 Ω

Current limit 20 mA

Timebase Input

Frequency 10 MHz, ±2 ppm

Amplitude 0.5 to 4 V

PP (-2 dBm to +16 dBm)

Input impedance 50 Ω, AC coupled

Timebase Output

Frequency 10 MHz, sine

Source 50 Ω, DC transformer coupled

Amplitude 1.75 V

PP ± 10 % (8.8 ± 1 ~dBm)

Standard OCXO Timebase

Oscillator type Oven controlled, 3

^rd OT, SC-cut crystal

Stability <0.002 ppm (0 to 45°C)

Aging

<0.05 ppm/year

Rubidium Timebase (Option 4)

Oscillator type Oven controlled, 3

^rd OT, SC-cut crystal

Physics package

Rubidium vapor frequency discriminator

Stability <0.0001 ppm (0 to 45°C)

Aging

<0.001 ppm/year

Computer Interfaces (all are standard)

Ethernet (LAN)

10/100 Base-T. TCP/IP & DHCP default.

GPIB

IEEE-488.2

RS-232 4.8k-115.2k baud, RTS/CTS flow

General

Line power

<90 W, 90 to 264 V _AC , 47 to 63 Hz with PFC

EMI Compliance

FCC Part 15 (Class B), CISPR-22 (Class B)

Dimensions

8.5'' × 3.5'' × 13'' (W × H × D)

Weight

<10 lbs

Warranty

One year on parts and labor

Phase Noise Spectra vs RF PLL Modes

To change the PLL mode, refer to the front panel CAL menu. See page 49 for more details. PLL 1 is the default setting.

SG384 Phase Noise at 1 GHz vs RF PLL Mode

SG386 Phase Noise at 1 GHz vs RF PLL Mode

Typical Waveforms

Amplitude Modulation

Waveform 1 is a 20 kHz carrier being amplitude modulated by a 1 kHz sine wave. The top trace is the rear panel Modulation output, while the bottom trace is the front-panel BNC output:

Setup:

Frequency 20 kHz

Amplitude BNC 1 V PP

Offset BNC 0 V

Modulation

Type AM

Function Sine

Rate 1 kHz

Depth 100%

ON

Waveform 1: AM Modulation

FSK (Frequency Shift Keying)

In Waveform 2 the internal modulator is set to FM between 1 MHz and 3 MHz with a 100 kHz square wave. The top trace is the rear panel Modulation output, while the middle and bottom traces are the front panel BNC and Type-N outputs.

Setup:

Frequency 2 MHz

Amplitude

BNC 1 V PP

Type-N 2 V PP

Modulation

Type FM

Function Square

Rate 100 kHz

Deviation 1 MHz

On

Waveform 2: FSK Modulation

Typical Operating Characteristics xix

Pulse Modulated Outputs

Waveform 3 is a 50 MHz carrier being pulse modulated with a 1 MHz, 300 ns pulse waveform. The upper trace is the timing signal with the middle trace being the BNC output, and the lower trace being the RF output. There are delays of 50 ns in the gating circuitry as shown.

Setup:

Frequency 50 MHz

Amplitude

Type-N 2 V PP

BNC 2 V PP

Modulation

Type Pulse

Function Square

Period 1 μs

Duty Factor 30%

ON

Waveform 3: Pulse Modulated Output

Differential Clock Outputs (Option 1)

Waveform 4 shows the optional rear panel clock outputs with the frequency set to 100 MHz. The top trace is front panel Type-N output with the differential clock outputs depicted by the lower traces. The displayed transition times are limited by the 1.5 GHz bandwidth of the oscilloscope.

Setup:

Frequency 100 MHz

Amplitude

Type-N 1 V PP

Clock 1 V PP

Offset Clock 0 V

Modulation Off

Waveform 4: Clock Outputs

Typical Spectra

The following spectra show typical frequency domain performance for the SG380 series signal generators:

Unmodulated Carrier

Waveform 5 shows a direct measurement taken on a spectrum analyzer with a 200 kHz span and 100 Hz RBW. The noise floor of the spectrum analyzer dominates over most of the 200 kHz span.

Setup:

Frequency 1 GHz

Amplitude Type-N 0 dBm

Modulation OFF

Spectrum Analyzer set for:

Center Frequency 1 GHz

Span 200 kHz

Resolution BW 100 Hz

Waveform 5: Unmodulated 1 GHz Output

Frequency Modulation with Modulation Index of 2.40477

Waveform 6 depicts a 50 MHz carrier frequency modulated at a rate of 10 kHz and a deviation of 24.0477 kHz, for a modulation index = 2.40477 . The carrier amplitude is proportional to the Bessel function J_0() and has its first zero at 2.40477, and thus suppresses the carrier.

Setup:

Frequency 50 MHz

Amplitude Type-N 0 dBm

Amplitude BNC 0 dBm

Modulation

Type FM

Function Sine

Rate 10 kHz

Dev 24.04 kHz

ON

Waveform 6: 50 MHz with FM Carrier Suppressed

I/Q Modulation (Option 3) by an Internal Noise Source

Option 3 allows I/Q modulation for output frequencies from 400 MHz to 6.075 GHz. Two signal sources may be used for modulation: the external I & Q inputs or an internal noise generator. The external I & Q inputs are on the rear panel. The internal noise generator has adjustable noise

bandwidth from 1 Hz to 50 kHz. Waveform 7 is a 1 GHz carrier being modulated by the internal noise generator with 1 kHz noise bandwidth.

Setup:

Frequency 1 GHz

Amplitude

Type-N -10 dBm

Modulation

Type I/Q

Function Noise

Dev (ENBW) 1.0 kHz

ON

Waveform 7: I/Q Modulation using internal noise source

Frequency offset of 1 kHz, 100% AM at 5 kHz

An unmodulated carrier at the spectrum analyzer's reference frequency (1 GHz in this case) appears as a single dot in the I/Q plane. When the carrier frequency is offset, the single dot moves in a circle about the center of the I/Q plane. The pattern shown in Waveform 8 occurs when the carrier amplitude is modulated with 100% depth at a rate of five times the carrier

offset frequency (creating five lobes). The symmetry of the lobes indicates that there is no residual phase distortion (AM to M conversion) in the amplitude modulator. The narrow line of the trajectory is indicative of low phase and amplitude noise.

Setup:

Frequency 1.000001 GHz

Amplitude

Type-N 0 dBm

Modulation

Type AM

Function Sine

Rate 5.0 kHz

Depth 100 %

ON

Waveform 8: I/Q Polar plot of offset carrier with AM

Quick Start Instructions

This is intended to help the first time users get started with the RF Signal Generator and to help verify its functionality.

Connect the rear panel AC power to the AC mains (90 to 264 V _AC , 47 to 63 Hz). Then:

1. Push the power button "in" to turn on the unit.

a. The model number will be briefly displayed
b. Then the firmware version and unit serial number
c. The unit will recall the its last operating state and begin operation

It is important to realize that the SG380 series signal generators resume operating with the same settings which were active when the unit was last turned off. There is a simple way to preset the instrument to a default state without changing any of the stored settings or the communications configuration: Notice that there is a “shifted function” above each key in the NUMERIC ENTRY portion of the key pad. To initialize the unit to its default settings, in the NUMERIC ENTRY section:

1. Press the [SHIFT] key
   a. The SHIFT LED will turn "on"
2. Press the number [0] (whose shifted function is "INIT")
   a. The display shows" init. PrESS EntEr"
3. Press the "ENTER" key (lowest, rightmost key [Hz % dBm])
   a. The instrument will be set to its default state

The default setting displays the frequency (10 MHz) and sets the AMPL of the BNC and Type-N outputs to 0 dBm (1 mW into 50 Ω or 0.63 V PP). Two green LEDs indicate that both the BNC and the Type-N outputs are active, and another LED shows that the modulation is “OFF”. The “LOCK” LED in the REF/SYNTH section should be “ON” (as should the “EXT” LED if the unit is connected to an external 10 MHz reference.)

Connect the front panel outputs to an oscilloscope. The oscilloscope timebase should be set for 50 ns/div and vertical sensitivity 200 mV/div with DC coupling and 50 Ω input impedance. The displayed cycle period should be 100 ns (2 divisions) and the displayed amplitude should be 630 mV PP. (The displayed amplitude will be twice that if the oscilloscope input is not set for 50 Ω.)

Here are some things to try:

1. Change the frequency to 5 MHz by pressing [5] then [MHz V_PP]
2. Press the SELECT [◀] key six times to select the 1 MHz digit
3. Press the ADJUST [] key to increase the frequency
4. Press the [AMPL] key to display the power at the Type-N output
5. Press the ADJUST [] key to increase the power by 1 dB
6. Press the [AMPL] key again to display the power at the BNC output
7. Press the [MHz V_PP] key to change the units from dBm to V_PP .
8. Press the ADJUST [Δ] key to increase amplitude by 0.100 V

Introduction

Feature Overview

The SG380 series of RF Signal Generators consists of three models. Each instrument is based on a new frequency synthesis technique which provides low phase noise, agile modulation, fast settling and virtually infinite frequency resolution. (See Appendix A for details on the Rational Approximation Frequency Synthesis technique.)

Each of the generators has two front panel outputs with overlapping frequency ranges. The frequency resolution is 1 Hz at all frequencies. The front panel BNC output spans DC to 62.5 MHz. The BNC output is DC coupled with an adjustable DC offset and provides sine wave outputs from 1 mV_RMS to 1 V_RMS .

The front panel Type-N connector provides outputs from 950 kHz to 2.025 GHz (for the SG382), or 4.050 GHz (for the SG384), or 6.075 GHz (for the SG386). This AC coupled output can provide power from -110 dBm to +16.5 dBm. A rear panel option extends the frequency range of the SG384 or SG386 to 8.1 GHz.

The SG380 generators have extensive modulation capabilities. The front panel outputs can be amplitude, frequency, phase or pulse modulated by internally generated waveforms (sines, ramps, triangles, pulse and noise) or by external sources. A rear panel option allows carrier frequencies above 400 MHz to be IQ modulated by external sources with more than 100 MHz of bandwidth.

The user interface provides single-key access to the most commonly adjusted synthesizer parameters (frequency, amplitude, phase, modulation rate and modulation deviation.) In addition, there are three standard communication interfaces (GPIB, RS-232 and LAN) which allow for all instrument parameters to be remotely controlled.

To assist in the development of high speed digital devices, a rear panel option provides differential clock outputs from DC to 4.05 GHz. These SMA outputs have 35 ps transition times and can be set to standard logic levels including ECL, PECL, RSECL, CML and LVDS.

The accuracy, stability and low phase noise of the SG380 series is supported by two outstanding timebases. The standard timebase uses a 3^rd overtone, SC-cut ovenized 10 MHz resonator. In addition to its remarkable stability ( <0.002 ppm 0^ to 45^ ), and low aging ( <0.05 ppm/yr ), this oscillator is responsible for the low phase noise close to carrier (-80 dBc/Hz at 10 Hz offset from a 1 GHz carrier) and its short term stability (1:10 ^11 1s root Allan variance).

An optional rubidium timebase reduces the frequency aging to <0.001 ppm/yr. This timebase (a SRS PRS10 rubidium frequency standard) also improves the frequency stability to <0.0001 ppm over 0^ to 45^ C.

The 10 MHz output from the internal timebase is made available on a rear panel BNC connector. The user can also provide a 10 MHz timebase via a rear panel external timebase input.

Front-Panel Overview

Parameter Display Units Display STANFORD RESEARCH SYSTEMS MODEL SG384 DC to 4.05 GHz SIGNAL GENERATOR 4050 000 000 000 000 000 GHz MHz kHz Hz dBm VREF V DEG % μs ms OUTPUTS DC to 62.5 MHz ON ON/OFF AM ~ FM ~ M ~ SWEEP ~ PULSE NOISE HQ(OPT) EXT MOD MOD TYPE MOD FCN SELECT / ADJUST RF ON FREQ PHASE AMPL MOD MODEV DC OFFS PULSE PERIOD PULSE WITH OR DUTY SHIFT CANCEL SHIFT STO RCL BACK CAL REL0 ~0 PRBS STEP SIZE ns +/- 7 8 9 μs NET CPB RS-232 DATA MHz INIT TIMEBASE STATUS LOCAL ENTER 0 1 2 3 Hz % Shift Key Unit Keys Power and Status Main Outputs Modulation Modes Parameter Selection and Adjustment Numeric Entry and Secondary Parameters Power and Status

Figure 1: The SG384 Front Panel

The front panel operation of each SG380 series RF Signal Generator is virtually the same, with the only substantial difference being the model number and the maximum operating frequency.

The front panel is divided into seven sections: Parameter Display, Units Display, OUTPUTS, MODULATION, SELECT/ADJUST, NUMERIC ENTRY, and STATUS.

The power switch is located in the lower right corner of the front panel. Pushing the switch enables power to the instrument. Pushing the switch again places the instrument in standby mode, where power is enabled only to the internal timebase.

Parameter and Units Display

The front panel has a sixteen digit display showing the value of the currently displayed parameter. The LEDs below the display indicate which parameter is being viewed. Error messages may also appear in the display, briefly.

The Units Display highlights the units associated with a parameter. Note that a given parameter may have multiple views. For example, the RF output amplitude may be viewed in units of dBm, V_RMS , or V_PP .

Main Output

These are the synthesizer's main signal outputs. Two types of connectors are provided due to the bandwidths covered by the instrument.

OUTPUTS DC to 62.5 MHz DC OFFS 50 Ω 950 kHz to 4.05 GHz AC 50 Ω 4 to 8 GHz (REAR) BNC N-Type Doubler Indicator (SG384 Option 2) Output Status LEDs

BNC Output

Signals on this connector are active for frequency settings between DC and 62.5 MHz. The amplitude may be set independently for levels from 1 mV_RMS to 1 V_RMS (-47 dBm to 13 dBm). Increase amplitude setting of 1.25 V_RMS (14.96 dBm) are allowed with relaxed signal specifications. Additionally, the BNC output may be offset by ± 1.5 V_DC , however non-zero offsets will reduce the maximum amplitude setting. The BNC output is protected against externally applied voltages of up to ± 5 V .

Type-N Output

Signals on this connector are active for frequency settings between 950 kHz and 2.025 GHz, 4.050 GHz, or 6.075 GHz (for the SG382, SG384 and SG386 respectively). The output power may be set from -110 dBm to 16.5 dBm (0.7 V RMS to 1.5 V RMS ). The maximum output power is reduced by 3.50 dB/GHz above 3 GHz for the SG384, or by 3.25 dB/GHz above 4 GHz for the SG386. The Type-N output is protected against externally applied voltages of up to 30 V _DC and RF powers up to +25 dBm.

Indicators

Three LEDs are used to indicate which of the outputs are active: BNC, Type-N, and the 4 to 8 GHz (REAR) Doubler. (There is no doubler option available for the SG382). The Doubler LED is lit only when Option 2 is installed and when the frequency is greater than 4.05 GHz (for the SG384) or above 6.075 GHz (for the SG386).

Modulation Modes

The Modulation section displays the present modulation state and enables the user to control both the type and function of the modulation.

The [ON/OFF] key enables modulation.

The [MOD TYPE] key allows selection of the type of modulation (via the ADJUST and keys). The types of modulation available are AM, FM, M, Sweep, and Pulse. IQ modulation from an internal noise generator, or from external sources, is available as an option.

The [MOD FCN] key allows the selection of the modulation waveform (via the ADJUST and keys). The available waveforms include sine, ramp, triangle, square wave, and noise.

The rear panel external modulation input can also be used in AM, FM, M or Pulse modulations. When the external source is selected, the signal level is monitored. If the external source exceeds operational limits the overload LED turns on and remains on until the condition is removed.

MODULATION ON OFF AM FM φM SWEEP PULSE I/Q(OPT) ON/OFF ~ ✓ ~ ~ √ NOISE EXT MOD TYPE MOD FCN Enable Sine Ramp Triangle Square Noise External (Overload) Waveform Amplitude Frequency Phase Sweep Pulse/Blank I/Q (Optional) Type

Parameter Selection and Adjustment

graph TD
    A["Select Keys"] --> B["Shift"] Enable RF Outputs
    B --> C["RF ON"]
    C --> D["FREQ"]
    C --> E["PHASE"]
    C --> F["AMPL"]
    C --> G["MOD RATE"]
    G --> H["PULSE WIDTH OR DUTY"]
    C --> I["MOD DEV"]
    I --> J["DC OFFS"]
    B --> K["Adjust Keys"]
    K --> L["Select / ADJUST"]
    L --> M["Adjust Keys"]
    M --> N["Main Parameter Keys"]

Display Navigation

The SELECT/ADJUST section determines which main parameter is shown on the front panel display. The six basic displays for viewing and modifying instrument settings are shown in Table 1. Each display is activated by pressing the correspondingly labeled key.

Table 1: Main Parameter Keys

Label	Value Shown in Main Display When Pressed
FREQ	Frequency (fc)
PHASE	Phase
AMPL	Amplitude – sequences through outputs
DC OFFS	Offset – sequences through the outputs
MOD RATE	Modulation Rate (Pulse Period or ENBW)
MOD DEV	Modulation Deviation (Pulse Width or Duty)

For Parameter menus with multiple items, repeatedly pressing the Parameter key allows cycling through all of its parameters. For example, in the default configuration multiple key presses of the [AMPL] key will cycle through the various available outputs BNC, Clock, and Type-N.

Some of the parameters will have a blinking digit (the cursor). The cursor indicates which digit will be modified when the ADJUST and keys are pressed. The SELECT and keys allow adjusting the cursor for the desired resolution. The step size may also set using a shifted function and a numeric entry (to set channel spacing, for example.)

Numeric Entry and Secondary Parameters

SHIFT CANCEL SHIFT CAL +/- NET • INIT 0 STO RELφ =0 7 GPIB 4 TIMEBASE 1 RCL PRBS 8 RS-232 5 STATUS 2 BACK SPACE 9 STEP SIZE DATA 6 LOCAL 3 ns GHz DEG μs MHz Vpp ms kHz VRMS ENTER Hz % dBm Numeric Keypad Unit Keys

This section is used for changing the currently displayed numeric parameter directly. A parameter is entered numerically and completed by pressing any of the unit keys. Corrections can be made using the BACK SPACE or the entire entry may be aborted by pressing the CANCEL key.

For example, to set the frequency to 1.0001 GHz, press the [FREQ] key followed by the key sequence of [1][•][0][0][0][1][GHz].

This section also allows access to secondary (or “Shifted”) functions. The secondary functions are listed above the key in light blue text. A secondary function is accessed by first pressing the SHIFT key (indicated by the SHIFT LED being on) followed by pressing the desired secondary function key.

For example, to set the incremental value for frequency to 12 kHz press [FREQ] [SHIFT] [9 (STEP SIZE)], followed by the sequence [1] [2] [kHz].

Numeric or SHIFT entries may be CANCELed at any time by pressing the SHIFT key.

Stepping Up and Down

Most instrument settings can be stepped up or down by a programmed amount. The blinking digit identifies the current cursor position and step size. The cursor shows the digit that will change if the parameter is incremented or decremented via the ADJUST keys. Pressing the ADJUST () key causes the displayed parameter to increment (decrement).

Step Size

Pressing the ADJUST and keys increments or decrements the value of the selected digit on the numeric display (to change the selected digit use the SELECT and keys). To view the step size use SHIFT [9] (STEP SIZE).

The step size can be changed using the numeric keypad followed by the appropriate unit. To set the step size to an arbitrary value use SHIFT [9] and enter the desired step size followed by the appropriate unit type. For example, to change the frequency's step size to 1.25 MHz, first press [Shift] then [9] followed by 1.25 and finally the [MHz] unit key. When the cursor is changed to another digit (using the SELECT ◀ or ▷ keys) the step size returns to its default value.

Store and Recall Settings

The [STO] and [RCL] keys are for storing and recalling instrument settings, respectively. Instrument settings include modulation configuration and all associated step sizes. Up to nine different instrument settings may be stored in the locations 1 to 9. To save the current settings to location 5, press the keys [STO], [5], [ENTER], sequentially. To recall instrument settings from location 5, press the keys [RCL], [5], [ENTER] sequentially. Note: the INIT key is used to recall default instrument settings. See Default Factory Settings in the Operations chapter for additional details.

Secondary Functions

SHIFT NUMERIC ENTRY CANCEL SHIFT STO RCL BACK SPACE ns GHz DEG CAL RELφ =0 PRBS STEP SIZE μs +/- 7 8 9 MHz Vpp NET GPIB RS-232 DATA ms kHz VRMS INIT TIMEBASE STATUS LOCAL ENTER Hz % dBm

Many of the keys in the NUMERIC ENTRY section have secondary (or SHIFT) functions associated with them. The secondary functions are listed above the keys. The [5] key, for example, has RS-232 above it. The meaning of the secondary functions is summarized in Table 2.

Table 2: Secondary Functions

Label	Primary Key	Function Description
CAL	+/-	Adjust the timebase, and selects the PLL filter mode
REL Φ=0	7	Defines the current phase to be 0 degrees and displays phase
PRBS	8	Allows access to the length of the Pseudo-Random Binary Sequence generator
STEP SIZE	9	Set the incremental value used by the ADJUST keys
NET	•	Configure the Ethernet interface
GPIB	4	Configure the GPIB interface
RS-232	5	Configure the RS-232 interface
DATA	6	Display the most recent data received over any of the remote interfaces
INIT	0	Load default instrument settings
TIMEBASE	1	Displays the installed timebase and its status
STATUS	2	View TCP/IP (Ethernet), error, or instrument status, as well as running Self-Test
LOCAL	3	Go to local. Enables front panel keys if in remote mode.

A more detailed description of each of the secondary functions is given in the Secondary Functions section of the Operation chapter.

The secondary functions can only be accessed when the shift mode is active, which is indicated by SHIFT LED in the main display. The SHIFT mode can be toggled on and off by pressing the [SHIFT] key. For example, to configure the PRBS length, press [SHIFT] [8] to access the PRBS secondary function.

For menu items with multi-parameter settings, the SELECT ◀ and ▷ keys allow selection of the various menu items. The ADJUST △ and ▽ keys may be used to modify a parameter. For example, the first option in the NET menu is TCPIP ENABLE/DISABLE. Use the ADJUST △ and ▽ keys to change the setting as desired. Then press SELECT ▷ to move to the next option which is DHCP ENABLE/DISABLE. Continue pressing the SELECT ▷ until all TCPIP settings have been configured as desired.

Cancel

The [SHIFT] key also functions as a general purpose CANCEL key. Any numeric entry, which has not been completed, can be canceled by pressing the [SHIFT] key. Because of the dual role played by the SHIFT key, the user may have to press [SHIFT] twice to reactivate SHIFT mode. The first key press cancels the current action, and the second key press re-activates SHIFT mode.

Power and Status

The Power and Status section encompass the power switch and displays the status of the timebase and remote interface(s):

Status Indicators

STATUS REF / SYNTH EXT LOCK INTERFACE REM ACT ERR POWER ON/STBY

REF / SYNTH

In the upper right portion of the front panel are two groups of LED indicators. The upper group is labeled REF / SYNTH and indicates the status of the internal timebase. The EXT LED indicates that the instrument has detected an external 10 MHz reference at the timebase input BNC on the rear panel. If detected, the instrument will attempt to lock its internal clock to the external reference.

The LOCK LED indicates that unit has locked its internal frequency synthesizer at the requested frequency. Normally this LED will only extinguish momentarily when the frequency changes or an external timebase is first applied to the rear input. If the LED stays off, it indicates that the signal generator may be unable to lock to the external timebase. This is most commonly caused by the external frequency being offset by more than 2 ppm from 10 MHz.

INTERFACE

The lower group of LED indicators is labeled INTERFACE. These LEDs indicate the current status of any active remote programming interface (Ethernet, RS-232, or GPIB).

The REM (remote) LED turns on when the unit is placed in remote mode by one of the remote interfaces. In this mode, all the front panel keys are disabled and the instrument can only be controlled via the remote interface. The user can return to normal, local mode

by pressing the [3] key (also labeled [LOCAL]). The ACT (activity) LED flashes when a character is received or sent over one of the interfaces. This is helpful when troubleshooting communication problems. If a command received over the remote interface fails to execute due to either a parsing error or an execution error, the ERR (error) LED will turn on. Information about the error is available in the STATUS secondary display.

POWER

The power switch has two positions: STANDBY (button out) and ON (button in).

In STANDBY mode, power is only supplied to the internal timebase and the power consumption will not exceed 25 watts. In ON mode, power is supplied to all circuitry but the power consumption will not exceed 90 watts.

Rear-Panel Overview

AC Power Input AC POWER: 90 to 264 VAC, 47 TO 63 Hz, < 90 W MODEL SG384 SRS SIG GEN S/N 001002 OPTION 4 (Rb) DANGEROUS VOLTAGES INSIDE / NO USER SERVICEABLE PARTS INSIDE / SEE MANUAL FOR ADDITIONAL SAFETY NOTICES DC to 4.05 GHz CLOCKS SET AMPL & OFFS TERMINATE BOTH IN 50Ω -OUT +OUT OPT 1 4 - 8 GHz RF OUT SET AMPL 2 AC 55Ω OPT 2 DC OUT Run = 60Ω SET OFFS 20 mA MAX IN I/Q MOD OUT Q ± 0.5V OPT 3 ± 0.5V TIMEBASE OUT IN INT/M/REF PULSE IN RAIN 100 kΩ ± 1V OR ± 1V OR 2 to 5 V PULSE 3.3V PULSE MODULATION OUT INT/M/REF PULSE IN RAIN ± 1V OR ± 1V OR 2 to 5 V PULSE 3.3V PULSE Optional Clock Outputs Optional Doubler Optional I/Q Modulation Remote Interfaces GPIB, RS-232, 10/100 Base-T Timebase Input / Output Modulation Input / Output

Figure 2: The SG384 Rear Panel

The rear panel provides connectors for AC power, remote computer interfaces, external frequency references, and various additional options.

AC Power

Connect the unit to a power source through the power cord provided with the instrument. The center pin is connected to the chassis so that the entire box is earth grounded. The unit will operate with an AC input from 90 to 264 V, and with a frequency of 47 to 63 Hz. The instrument requires 90W and implements power factor correction. Connect only to a properly grounded outlet. Consult an electrician if necessary.

Timebase

10 MHz IN

This input accepts an external 10 MHz reference. The external reference should be accurate to at least 2 ppm, and provide a signal of no less than 0.5 V PP while driving a 50 Ω impedance. The instrument automatically detects the presence of an external reference, asserting the front panel EXT LED, and locking to it if possible. If the unit is unable to lock to the reference, the LOCK LED is turned off.

10 MHz OUT

The instrument also provides a 10MHz output for referencing other instrumentation to the internal high stability OCXO or optional Rubidium Timebase.

Remote Interfaces

The instruments support remote control via GPIB, RS-232, or Ethernet. A computer can perform any operation that is accessible from the front panel. Programming the instrument is discussed in the Remote Programming chapter. Please refer to the respective Remote Programming Configuration section before attempting to communicate with the signal generators via any computer interface.

GPIB

The signal generators have a GPIB (IEEE-488) communications port for communications over a GPIB bus. The instruments support the IEEE-488.1 (1978) interface standard. It also supports the required common commands of the IEEE-488.2 (1987) standard.

RS-232

The RS-232 port uses a standard 9 pin, female, subminiature-D connector. It is configured as a DCE and supports baud rates from 4.8 kb/s to 115 kb/s. The remaining communication parameters are fixed at 8 Data bits, 1 Stop bit, No Parity, with RTS/CTS configured to support Hardware Flow Control.

Ethernet

The Ethernet uses a standard RJ-45 connector to connect to a local area network (LAN) using standard Category-5 or Category-6 cable. It supports both 10 and 100 Base-T Ethernet connection and a variety of TCP/IP configuration methods.

Modulation

IN

External modulation is applied to this input. The input impedance is 100 k with a selectable input coupling of either DC or AC (4 Hz roll off).

For analog modulations (AM, FM, M ), a signal of ±1 V will produce a full scale modulation of the output (depth for AM or deviation for FM and M ). It supports bandwidths of 100 kHz and introduces distortions of less than -50 dB.

For Pulse/Blank modulation types, this input is used as a discriminator that has a fixed threshold of +1 V.

OUT

This output replicates the modulation waveform and has a 50 Ω reverse termination. When using the internal source for AM, FM, and ΦM, it provides a waveform determined by the function and rate settings with an amplitude of ±1 V PP into a high impedance. During external analog modulation, this output mirrors the modulation input.

For Pulse modulation, the output is a 3.3V logic waveform that coincides with the gate signal.

Rear-Panel Optional Outputs

Two rear panel options are available on the SG382: a high speed clock outputs and IQ modulator inputs for the Type-N output. In addition, a frequency doubler for extending the frequency output to 8.1 GHz is available for the SG384 and SG386.

Option 1: Clock Outputs

The clock outputs provide a digital representation of the synthesized signal for frequencies up to 4.05 GHz on a pair of SMA type connectors. The outputs are differential signals with transition times of 35 ps (20 % to 80 %). They are adjustable for amplitudes from 0.40 to 1.00 V, offsets of ±2 V, with a resolution of 5 mV. The amplitude and offsets are set with the front panel AMPL and DC OFFS keys.

For frequencies above 62.5 MHz (93.75 MHz for the SG386), the jitter on the clock signals will be less than 300 fs with a measurement bandwidth of 5 kHz to 5 MHz. For frequencies below 62.5 MHz (93.75 MHz for the SG386) the rms jitter will be less than 0.01 % × U.I (Unit Interval).

Option 2: 8 GHz Frequency Doubler

This option extends the frequency range to 8.1 GHz with power levels of up to 16.5 dBm. A DC output port is available for providing biasing of external circuits. Both of these signals use SMA type connectors.

RF OUT

This output is operational for frequencies from 4.05 to 8.1 GHz (on the SG384) or 6.075 GHz to 8.1 GHz (on the SG386). This output is AC coupled and is adjustable over a range of -10 to +16.5 dBm. The frequency is set with the front panel FREQ key and the amplitude is set with the front panel AMPL key. The RF output supports FM, M, and SWEEP modulation.

DC OUT

This output provides DC voltage which is settable over a ± 10 V range with 5 mV of resolution. Output currents should be limited to ± 20 mA. The output voltage is set via the front panel DC OFFS key.

Option 3: I/Q Modulator

This option allows I/Q modulation on the front panel Type-N RF output for output frequencies above 400 MHz. Either an external source or the internal noise source may be selected via the MOD FCN key in the front panel MODULATION section.

I/Q IN

These inputs accept signals of ±0.5 V, corresponding to full scale modulation, and have 50 input impedances. Both inputs support signal bandwidths from DC to 100 MHz.

I/Q OUT

These outputs duplicate the I/Q modulation waveforms (internally or externally). All I/Q signals utilize BNC connectors located on the rear panel.

Operation

Introduction

The previous chapter provided an overview of the instrument's features. This section describes the setting of the frequency, phase, amplitude, offset as well as the details of modulation, storing and recalling setups, and configuration of the computer interfaces.

Power-On

At power on, the unit will briefly display the model number followed by the firmware version and the unit serial number. When power on initialization has completed, the instrument will recall the last operational settings from nonvolatile memory.

The instrument continuously monitors front panel key presses and will save the current instrument settings to nonvolatile memory after approximately five seconds of inactivity. To prevent the nonvolatile memory from wearing out, the unit will not automatically save instrument settings that change due to commands executed over the remote interface. The remote commands *SAV (*RCL) may be used to explicitly save (recall) instrument settings over the remote interface, if desired. (See the Remote Programming section for more information about these commands.)

The signal generator can be forced to revert to factory default settings. This is accomplished by power cycling the unit with the [BACK SPACE] depressed. All instrument settings, except for the remote interface configurations, will be set back to their default values. All calibration bytes will be reset to the values set at the most recent calibration. See the Factory Default Settings section for a list of default settings.

Setting Parameters

The SELECT/ADJUST section determines which parameter is shown in the main front panel display. The six keys for selecting the display of the main instrument settings are shown in Table 3. Each display is activated by pressing the corresponding labeled key.

Table 3: Main Display Parameters

SELECT Key	Displayed Value
FREQ	Frequency (carrier or center frequency if modulating)
PHASE	Phase of BNC or Type-N outputs
AMPL	Amplitude or Power – Type-N, BNC, Clock, Doubler
DC OFFS	Offset – BNC, Clock, Rear DC Output
MOD RATE	Modulation Rate, Pulse Period or noise bandwidth
MOD DEV	Modulation Deviation, Pulse Width or Duty Factor

Frequency

Pressing [FREQ] displays the output frequency and turns on the FREQ LED. The frequency may be entered in any of the following units: GHz, MHz, kHz, or Hz. For example, to set the frequency to 5 MHz press the [FREQ] key then press [5] [MHz]. The frequency resolution is 1 Hz at all frequencies. The units for the displayed frequency may be changed by pressing the desired unit key. For example, to change the display from units of MHz to Hz simply press the [Hz] key.

The frequency setting determines which outputs may be active at any given time. The green LED next to the front panel outputs indicate which outputs are enabled. (The output is also “off” if its amplitude is set below the minimum amplitude for the output.) None of the outputs operate across the entire frequency range. Table 4 shows the frequency ranges for each output connector for all models in the series.

Table 4: Frequencies of Operation

Model	SG382	SG384	SG386
Front BNC	DC-62.5 MHz	DC-62.5 MHz	DC-62.5 MHz
Type-N	950 kHz to 2.025 GHz	950 kHz to 4.050 GHz	950 kHz to 6.075 GHz
Rear SMA Clocks	DC to 2.025 GHz	DC to 4.05 GHz	DC to 4.05 GHz
Rear SMA Doubler	Not available	4.05 to 8.10 GHz	6.075 to 8.10 GHz

Phase

Pressing [PHASE] displays the output's phase and turns on the display PHASE LED.

The phase is displayed in degrees and is adjustable over ±360^ . If the phase adjustment exceeds 360^ , the phase is displayed modulo 360^ . The displayed phase is set to 0^ whenever the output frequency is changed.

The phase resolution depends upon the current setting of the frequency. For the frequencies up to 100 MHz the phase resolution is 0.01^ , with reduced resolution for higher frequencies. Table 5 shows the phase resolution verses frequency:

Table 5: Phase Resolution

Frequency Range	Phase Resolution
DC to 100 MHz	0.01^
100 MHz to 1 GHz	0.1^
1 GHz to 8.1 GHz	1.0^

Rel Phase

In many situations it is useful to be able to define the present phase setting as 0^ . The REL =0 function ([SHIFT] [7] keys) will “REL” the phase display to zero without any change of the output’s phase.

When you change the phase setting, you change the phase of all outputs from the synthesizer. This sometimes makes it difficult to see that you have done anything at all.

Phase adjustments are usually only made when there are more than one signal source in a measurement situation. For example, if you have two RF synthesizers, each connected to the same external 10 MHz timebase and set to the same frequency, you will be able to see their relative phase by viewing them simultaneously on an oscilloscope or by applying them both to a mixer and measuring the mixer's IF output.

You can also see phase changes (for frequencies which are a multiple of 10 MHz) by viewing the signal on an oscilloscope while triggering the oscilloscope from the rear panel 10 MHz timebase output.

You can also see the phase adjustment by viewing the RF signal on a polar display of a vector signal analyzer. (It will be important that the vector signal analyzer and the RF synthesizer share the same timebase.)

Amplitude and Power

Pressing [AMPL] displays the output amplitude or power and turns on the “AMPL” LED.

The amplitude has a value for each of the installed outputs, and repeated pressing of [AMPL] sequences through the amplitude for each output (Type-N, BNC, Clock, and RF Doubler). Note however, that only those outputs that are active for the current frequency setting will be accessible. If an output is set below its minimum value it will be disabled. This is indicated on the display as “off” and by extinguishing the LED which is next to the output.

All amplitudes (except for clock) may be displayed in units of dBm, V_RMS , or V_PP , with clock being restricted to V_PP . All stated values assume a load termination of 50 . Output amplitudes will (approximately) double if not terminated.

The units used for the displayed power or amplitude may be changed with a single key press. For example, if the Type-N output power is displayed as 0.00 dBm, pressing the [V_RMS] key will display 0.224 V_RMS and pressing the [V_PP] key will display 0.632 V_PP .

Table 6 lists the range for the various units of the outputs:

Table 6: Output Power Ranges

Output	Power	Amplitude (VRMS)	Amplitude (VPP)
Front Type-N(1)(2)	-110 dBm → +16.5 dBm	0.707 μ → 1.50 VRMS	2 μ → 4.24 VPP
Front BNC(3)	-47 dBm → +13 dBm	0.001 → 1.000 VRMS	.0028 → 2.82 VPP
Rear Doubler(4)	-10 dBm → +13 dBm	0.0707 → 1.000 VRMS	0.200 → 2.82 VPP
Rear Clocks	N.A.	N.A.	0.40 VPP → 1.00 VPP

(1) For the SG384 the maximum power is reduced by 3.50 dB/GHz above 3 GHz. (The maximum power available at 4 GHz is 13 dBm.)
(2) For the SG386 the maximum power is reduced by 3.25 dB/GHz above 4 GHz. (The maximum power available at 6 GHz is 10 dBm.)
(3) The AMPL of the BNC may be set as high as 1.25 V_RMS (+14.96 dBm) , with reduced distortion specifications, provided that the BNC DC offset is set to 0 V.
(4) The maximum specified power from the rear panel SMA doubler output is reduced to +7 dBm above 7 GHz. Over range power up to 16.5 dBm may be achieved at lower frequencies.

DC Offset

Pressing [DC OFFS] displays output offset voltages and turns on the display OFFSET LED.

On the front panel, only the BNC output has a settable DC offset. The Type-N RF output is AC coupled and so has no DC offset setting.

There are two rear panel options which also use DC offset settings: The DC offset on the differential clock outputs (Option 1) and the DC OUT bias source (which is included with Option 2, the RF doubler).

All three DC offsets are accessed by pressing the [DC OFFS] key repeatedly. The DC offsets for the front panel BNC, the rear panel differential clock outputs, and the rear panel DC OUT bias source are always accessible and active (independent of the frequency setting).

All DC offsets are displayed in V_DC . Table 7 gives the DC offset range for the various outputs:

Table 7: Offset Range

Output	DC Offset Range
Type-N	N/A
BNC	±1.5V
Rear DC Offset	±10V
Clock	±2V

The BNC output will support offsets up to 1.5V. The BNC's output is very linear over ±1.9V while driving a 50 load. To maintain low distortion of AC signals in the presence of a DC offset it is necessary to reduce the amplitude of the AC signal. The output provides 13 dBm (2.828 V PP ) at no offset, and is reduced linearly to 0 dBm (0.632 V PP ) for offsets of ±1.5V . Table 8 shows the allowed amplitude (or power settings) for the BNC output for various DC offsets:

Table 8: BNC Output vs. DC Offset

BNC DC Offset	Max Output (VPP)	Max Output (VRMS)	Max Output (dBm)
0.00 V	2.83 VPP	1.00 VRMS	13.01 dBm
±0.25 V	2.46 VPP	0.871 VRMS	11.81 dBm
±0.50 V	2.10 VPP	0.741 VRMS	10.41 dBm
±0.75 V	1.73 VPP	0.612 VRMS	8.75 dBm
±1.00 V	1.37 VPP	0.483 VRMS	6.69 dBm
±1.25 V	0.998 VPP	0.353 VRMS	3.97 dBm
±1.50 V	0.634 VPP	0.224 VRMS	0.02 dBm

RF ON/RF OFF

These are shifted functions of the [FREQ] and [AMPL] keys, respectively. Press the [SHIFT] key (which lights the SHIFT LED) followed by the [AMPL] key to turn the RF "off", and press the [SHIFT] key followed by the [FREQ] key to turn the RF "on".

The RF ON and RF OFF key presses cause a momentary display of “rf on” / “rf off” on the main display, and the status LEDs for the outputs are set or cleared accordingly.

The [RF OFF] turns off all RF outputs, while setting the clock output to a static “off” state (+OUT to “low”, -OUT to “high”). When an output is selected that is “off” the display will indicate the off status. For example, selecting the Type-N amplitude would display “ntype off” on the main display.

The [SHIFT] [RF ON] returns all RF outputs to their previously active levels.

Modulation and Sweeps

Introduction

This section describes the instrument's modulation capabilities. The SG380 series signal generators have powerful and flexible built-in modulation functions, capable of AM, FM, M, frequency sweeps, Pulse, and I/Q modulation.

The modulation waveform may be an internally generated sine wave, square wave, pulse, ramp, triangle, noise, or, may be externally sourced via a rear panel BNC input. A rear panel BNC connector outputs the modulation waveform with a full scale range of ±1.00 V.

In addition, signal generators with Option 3 have wideband I-Q modulation. The rear panel BNC I-Q modulation inputs and outputs have >100 MHz bandwidth, ±0.5 V full scale range, and 50 Ω impedance.

Modulation Section

This section controls the modulation of the front panel Type-N and BNC outputs and can provide FM, M, Sweep modulation for the optional rear panel doubler output to 8.10 GHz. The modulation is turned “on” or “off”, and the modulation type (AM, FM, etc.), and the modulation function (sine, ramp, etc.), are selected in this section.

Modulation On/Off

The [ON/OFF] key toggles the modulation on/off and the current state is reflected by the MODULATION ON/OFF LEDs. Make sure that modulation is “OFF” if you want a CW (unmodulated) output for the signal generator. If the signal generator ever manifests “unexpected behavior” check the modulation status: Unintentionally enabling the modulation will give unexpected results.

Modulation Type

The [MOD TYPE] key allows the selection of which type of modulation will be applied to the synthesizer's output. The ADJUST keys are used to select the desired modulation type and the current selection is indicated with an LED. The types of modulation available are AM, FM, M, Sweep, and Pulse. Optional I/Q modulation is also available if Option 3 is installed.

Modulation Function

The [MOD FCN] key selects one of the various functions used as the modulation waveform. The ADJUST keys are used to select the desired modulation function. The current selection is indicated with an LED.

For all modulation types the rear panel external modulation source may be used. When Option 3 is installed, the I/Q modulation supports separate inputs for the I and Q signals.

Not all modulation types support all modulation functions. Table 9 shows which modulation types support which functions:

Table 9: Modulation Type vs. Function

Type\Function	Sine	Ramp	Triangle	Square	Noise	External
AM / FM / ΦM	√	√	√	√	√	√
Sweep	√	√	√			√
Pulse				√	√	√
I/Q (Optional)					√	√

Modulation Rate

The [MOD RATE] and [MOD DEV] keys are paired in operation and their parameters depend upon the current modulation type and function settings.

Pressing [MOD RATE] displays the modulation rate associated with the current modulation type and turns on either the MOD RATE (for AM/FM/PM and sweep) or the PERIOD (for pulse/blank) LEDs.

For the standard (AM/FM/ M) and sweep modulation types, this parameter is the frequency of the applied modulation waveform. The allowable range depends on both the type of modulation and the frequency selected.

For pulse modulation, this selects the period of the pulses which modulate the carrier. The pulse period is settable in 5ns increments from 1 s to 10 s.

For I/Q noise modulation (available with Option 3) this key sets the equivalent noise bandwidth (ENBW) of the internal generated noise source. The ENBW may be set from 1 Hz to 500 kHz.

Modulation Deviation

Pressing [MOD DEV] displays the deviation of the current modulation function. Depending on the modulation type, either the MOD DEV, AM DEPTH, WIDTH, or DUTY FACTOR is displayed.

During AM modulation, the AM depth is displayed and corresponds to the peak percentage of the output envelope deviation. For example, if the amplitude is set to 1 V_PP and the AM DEPTH is set for 50%, the amplitude envelope would span from 0.5 V to 1.5 V.

During FM and sweep modulations, the deviation corresponds to the peak frequency excursion applied to the carrier. For example, if the carrier is set to 1.1 MHz and the deviation is set to 0.1 MHz, the carrier will span between 1 MHz and 1.2 MHz.

During M modulation, the deviation corresponds to the peak phase excursion applied to the carrier. For example, if the deviation is set to 10^ , then the carrier's phase deviation will span ± 10^ .

During pulse/blank modulation, deviation allows the pulse width or duty factor to be changed. This parameter may be either a time (“t on” for pulse or “t_off” for blank) or a duty factor. For example, for a 1 s pulse period, a width of 500 ns or a duty factor of 50% would be equivalent, and result in the output being on for 50% of the 1 s period.

Modulation Waveform Generator, Inputs and Outputs

The instrument's modulation capabilities include both internal and external modulation sources. The modulating waveform is replicated on the rear panel Modulation Output connector.

Linear Modulation

For AM / FM / M, and Sweep, the modulation source can be either the internal generator or the rear panel external modulation input.

The internal modulation source is capable of generating sine, ramps, triangular, or square waves, at frequencies of up to 500 kHz. The instrument limits the modulation rate to 50 kHz for carrier frequencies above 62.5 MHz (93.75 MHz for the SG386).

The rear panel external modulation input supports bandwidths of 500 kHz, but the modulation bandwidth is limited to 100 kHz for greater than 62.5 MHz (93.75 MHz for the SG386). The sensitivity is set such that a 1 V signal results in a full scale deviation (depth) in the output. For example: in M , if the deviation is set for 10^ , applying a level of -1 V produces a -10^ shift; applying 0 V produces no shift; and applying +1 V produces a 10^ shift.

When modulation is enabled using an internal source, the rear panel modulation output will provide a waveform of the selected function with a full scale range of ±1 V. When external modulation is selected the modulation output tracks the applied signal.

Pulse Modulation

There are two modes of pulse modulation: Pulse and Blank. The mode is shown in the main display and is selected with the ADJUST keys after [MOD TYPE] is pressed.

In Pulse Mode, the RF signal is turned “on” by the internally generated or externally applied signal. In Blank Mode, the RF signal is turned “off” by the internally generated or externally applied signal.

The internal pulse modulation source is a digital waveform whose period and “on” time is settable from 1 s to 10 s with 5 ns of adjustability. The period of the digital waveform is set via the [MOD RATE] key. The “on” time (for Pulse Mode) or “off” time (for Blank Mode) is set via the [MOD DEV] keys.

When an external input is selected the rear panel external modulation input is set for a threshold of 1V. The resulting signal is used in place of the internal source.

In Pulse and Blank Modes, the modulation output is a 3.3 V logic signal, which tracks the pulse waveform.

Linear Noise Modulation

For AM, FM and M , the noise source is pseudo random additive white Gaussian noise (AWGN). The bandwidth of the noise is set by the [MOD RATE] and the RMS deviation is set by the [MOD DEV].

The peak deviation will be about five times the set RMS deviation. This forces limits on the maximum allowed deviation corresponding to one fifth of the non-noise counterparts. For example, at a carrier frequency of 500 MHz the maximum FM deviation for a sine wave function is limited to 4 MHz, and so the maximum deviation for noise modulation is limited to 800 kHz.

For linear modulation, the rear panel output will provide 200mVRMS that will be band limited to the selected modulation rate. Again, the peak deviation will be five times this, or ± 1VPP .

Pulse Noise Modulation

For pulse modulation, the noise source is a Pseudo Random Bit Sequence (PRBS). The bit period is set by the [MOD RATE]. The PRBS supports bit lengths of 2, for 5 ≤ n ≤ 19 which correspond to a noise periodicity from 31 to 524287 periods. The bit length n is set via the [Shift] [PRBS or 8] key.

During pulse PRBS modulation, the rear panel output will be a 3.3V_PP waveform with a duty factor equal to 2^n / 2 / 2^n - 1 (approximately 50% ).

Modulation Output

A rear panel BNC provides a copy of the modulation function with ± 1 V full scale range. This output will be a sine, ramp, triangle, square wave, pulse or noise depending on the selected internal modulation function.

When an external source is applied to the modulation input it will be bandwidth limited, digitized, and reproduced at the modulation output. The transfer function has a bandwidth of about 1 MHz and a latency of about 950 ns.

The modulation output is a useful source even when the RF capabilities of the instrument are not required. The sine output is exceptionally clean, with a spur-free dynamic range typically better than -80 dBc. It can be used as a pulse generator with 5 ns timing resolution, or a PRBS generator. It is a very convenient noise source, with adjustable ENBW from 1 Hz to 500 kHz.

The modulation output has a 50 source impedance (to reverse terminate reflections from the user's load) but the output should not be terminated into 50 .

Amplitude Modulation

The amplitude modulation can use either the internal modulation generator or an external source. The internal modulator can generate sine, ramp, triangle, square, or noise waveforms. Amplitude modulation is not applied to the optional rear panel doubler output or to the rear panel clock outputs.

Setting up Amplitude Modulation:

Modulation Type

Press the [MOD TYPE] key and use the ADJUST △ ∇ keys to select AM.

Modulation Function

Press the [MOD FCN] key and use the ADJUST keys to select the desired modulation function (sine, ramp, triangle, square, noise or external).

Modulation Rate

For internally generated modulation functions, pressing [MOD RATE] displays the modulation rate and turns on the MOD RATE LED. The value may be set using the SELECT/ADJUST arrow keys or via a numeric entry and one of the [MHz] [kHz] or [Hz] unit keys.

The internal modulation supports rates of 50 kHz for £ above 62.5 MHz (93.75 MHz for the SG386) or 500 kHz for £ less than or equal to 62.5 MHz (93.75 MHz for the SG386). The Modulation rate supports 1 Hz of resolution at all frequencies.

External modulation supports bandwidths of 100 kHz.

Modulation Depth

Press [MOD DEV] to display and set the AM modulation depth, which also lights the AM DEPTH LED. The value may be set using the numeric entry and [%] unit keys, or using the SELECT/ADJUST arrow keys. This value has a range of zero to 100% with a 0.1% resolution.

A modulation depth of X percent will modulate the amplitudes by ± X percent. As an example, if the amplitude is set for 224 mV RMS (0 dBm), with a modulation depth of 50%, the resulting envelope would traverse 112 to 336 mV RMS .

NOTE: The outputs are limited to 1 V_RMS (+13 dBm) . If the modulation is increased such that the peak envelope would exceed this limit, the amplitude will be automatically reduced, and the screen will momentarily display “output reduced”.

Modulation On/Off

Press the [ON/OFF] key to turn the modulation "ON".

Amplitude Modulation Example

Illustrated below is an example of amplitude modulation. A 20 kHz carrier, with amplitude of 1 V_PP into 50 , is being amplitude modulated by an internally generated sine wave. The modulation rate is 1 kHz and the modulation depth is 100%.

Two traces are shown below. The upper trace is the 1 kHz modulation waveform (from the rear panel Modulation Output BNC), offset up two divisions. The lower trace is the modulated carrier (from the front panel BNC output), offset down one division.

Waveform 9: Amplitude modulation of a 20kHz carrier

Frequency Modulation

The internal modulation generator or an external source may be used to modulate the frequency outputs from the front panel BNC, Type-N and (optional) rear panel RF doubler output. The internal modulator can generate sine, ramp, triangle, square, or noise waveforms.

During FM, the output frequency traverses ± MOD DEV at the specified MOD RATE. For example, if the frequency is set for 1000 MHz (1 GHz), and the modulation rate and deviation are set for 10 kHz and 1 MHz, respectively, then the output will traverse from 1000 MHz, up to 1001 MHz, down to 999 MHz, and back to 1000 MHz at a rate of 10 kHz (a period of 100 s).

The FM modulation parameters are dependent upon the frequency setting. Table 10 and Table 11 list the FM parameters as a function of frequency. All frequency bands span octaves except for the first band. The internal FM rates correspond to the upper range that the internal function generator supports. The external bandwidth is defined as the -3 dB response referenced to the external modulation source. For the bands 2 to 8, the rates and bandwidths are similar. However, the deviation increases by a factor of two, from 1 to 64 MHz, for octaves 2 through 8.

The first band has unique FM capabilities in that it allows setting the deviation of the carrier frequency to the nearest band edge. If the carrier is set on the upper edge of 62.5 MHz, the deviation is allowed to be set to 1.5 MHz (5 % of f _c ). This range also supports a wider internal rate and bandwidth of 500 kHz.

For example, if the frequency is set for 100 kHz, the deviation may be set from zero to 100 kHz.

Table 10: FM Modulation vs. Frequency for SG382 and SG384

Frequency Range	Internal FM Rate. 1 μHz to:	External FM Bandwidth DC (or 4 Hz for AC) to:	FM Deviation
DC ⇔ 62.5 MHz	500 kHz	500 kHz	Smaller of fc or 64 MHz-fc
62.5 MHz ⇔ 126.5625 MHz	50 kHz	100 kHz	1 MHz
126.5625 MHz ⇔ 253.125 MHz	50 kHz	100 kHz	2 MHz
253.125 MHz ⇔ 506.25 MHz	50 kHz	100 kHz	4 MHz
506.25 MHz ⇔ 1.0125 GHz	50 kHz	100 kHz	8 MHz
1.0125 GHz ⇔ 2.025 GHz	50 kHz	100 kHz	16 MHz
2.025 GHz ⇔ 4.050 GHz (SG384)	50 kHz	100 kHz	32 MHz
4.050 GHz ⇔ 8.100 GHz (Opt 2)	50 kHz	100 kHz	64 MHz

Table 11: FM Modulation vs. Frequency for SG386

Frequency Range	Internal FM Rate. 1 μHz to:	External FM Bandwidth DC (or 4 Hz for AC) to:	FM Deviation
DC ⇔ 93.75 MHz	500 kHz	500 kHz	Smaller of f_c or 96 MHz- f_c
93.75 MHz ⇔ 189.84375 MHz	50 kHz	100 kHz	1 MHz
189.84375 MHz ⇔ 379.6875 MHz	50 kHz	100 kHz	2 MHz
379.6875 MHz ⇔ 759.375 MHz	50 kHz	100 kHz	4 MHz
759.375 MHz ⇔ 1.51875 GHz	50 kHz	100 kHz	8 MHz
1.51875 GHz ⇔ 3.0375 GHz	50 kHz	100 kHz	16 MHz
3.0375 GHz ⇔ 6.075 GHz	50 kHz	100 kHz	32 MHz
6.075 GHz ⇔ 8.100 GHz (Opt 2)	50 kHz	100 kHz	64 MHz

Setting up Frequency Modulation:

Modulation Type

Press the [MOD TYPE] key and use the ADJUST keys to select FM.

Modulation Function

Press the [MOD FCN] key and use the ADJUST keys to select the desired modulation function (sine, ramp, triangle, square, noise or external).

Modulation Rate

Press [MOD RATE] to display the modulation rate. The value may be set using the SELECT/ADJUST arrow keys or via a numeric entry and one of the [MHz] [kHz] or [Hz] unit keys.

Internal modulation supports rates of 50 kHz for f_c above 62.5 MHz (93.75 MHz for the SG386) or 500 kHz for f_c less than or equal to 62.5 MHz (93.75 MHz for the SG386), with 1 Hz of resolution.

External modulation supports bandwidths of 100 kHz.

Modulation Deviation

Press [MOD DEV] to display and set the FM deviation, which also turns on the DEVIATION LED. The value may be set using numeric entry and [MHz] [kHz] or [Hz] unit keys, or the SELECT/ADJUST arrow keys.

The deviation has a range that is dependent on carrier frequency band.

There are seven octaves above the lowest frequency range of DC to 62.5 MHz. The first octave (62.5 to 125 MHz) supports deviation of 1 MHz, with each succeeding octave doubling the deviation, thus achieving a 64 MHz of deviation at the 4 to 8 GHz octave (if the optional doubler is installed.)

NOTE: If the frequency is changed, the deviation may be adjusted as necessary to maintain limits imposed by the new frequency setting.

Modulation On/Off

Press the [ON/OFF] key to turn the modulation "ON".

Frequency Modulation Example

Shown below is a 2 MHz carrier being frequency modulated by a 100 kHz square wave with a 1 MHz deviation. In this example of Frequency Shift Keying (FSK) the carrier frequency is being rapidly switched between 1 MHz and 3 MHz.

The top trace is from the rear panel Modulation Output BNC which shows the 100 kHz modulating waveform. The middle trace is the front panel BNC output, whose amplitude was set to 1 Vp. The bottom trace is from the front panel Type-N output, whose amplitude was set to 2 Vpp.

Waveform 10: FSK Modulation

Phase Modulation

The phase modulation can use either the internal modulation generator or an external source. The internal modulator can generate sine, triangle, ramp, square, or noise waveforms.

The phase of the output traverses the specified deviation at the modulation rate. For example, with a frequency of 1000 MHz (1 GHz), and modulation rate and deviation set to 10 kHz and 45 degrees, respectively, the output will be a fixed frequency with its phase traversing ±45 degrees at a 10 kHz rate.

The optional rear panel doubler output can also be phase modulated.

Setting up Phase Modulation:

Modulation Type

Press the [MOD TYPE] key and use the ADJUST keys to select M .

Modulation Function

Press the [MOD FCN] key and use the ADJUST keys to select the desired modulation function (sine, ramp, triangle, square, noise or external).

Modulation Rate

Press [MOD RATE] to display the modulation rate. The value may be set using the SELECT/ADJUST arrow keys or via a numeric entry and [MHz] [kHz] or [Hz] unit keys.

Modulation Deviation

Press [MOD DEV] to display and set the M deviation, which turns on the DEVIATION LED. The value may be set using the numeric entry and the [DEG] unit key.

The phase deviation resolution depends on the frequency setting. For frequencies below 100 MHz, the phase deviation resolution is 0.01^ . For frequencies between 100 MHz and 1 GHz the resolution is reduced to 0.1^ , and is 1^ for frequencies above 1 GHz.

For frequencies less than or equal to 62.5 MHz (93.75 MHz for the SG386) the accuracy of the phase deviation is 0.1 %. For frequencies above 62.5 MHz (93.75 MHz for the SG386) the accuracy is reduced to 3 %.

Modulation On/Off

Press the [ON/OFF] key to turn the modulation "ON".

Phase Modulation Example

Shown below is the frequency spectrum of a 0 dBm, 50 MHz carrier, being phase modulated by a 10 kHz sine with a deviation of 137.78^ . Here, the modulation index, = phase deviation = 137.78^ × 2 / 360^ = 2.40477 radians. For phase modulation by a sine, the carrier amplitude is proportional to the Bessel function J_0() , which has its first zero at 2.40477, which suppresses the carrier to below -88 dB.

Waveform 11: Spectrum of Phase Modulated 50 MHz Carrier

Pulse and Blank Modulation

Pulse modulation includes both pulse and blank modulation of the front panel BNC and Type-N outputs. Pulse and blank modulation are logical complements of each other—pulse modulation enables the output when the pulse waveform is “true”, while blank modulation disables the output. The functions supported are square, noise (Pseudo Random Binary Sequence — PRBS), and external.

For internal square wave function the instrument has a 32-bit timing generator clocked by a 200 MHz source. This allows the period to be set from 1 s to 10 s with 5 ns resolution. The pulse duration can then be set from 100 ns up to the full period (less 100 ns). The internal generated pulse waveform is available at the rear panel Modulation Output BNC.

For pulse (blank) modulation, the output is turned on (off) when the source is at logic “high”. Pulse modulation is not applied to the optional doubler output.

Setting up Pulse Modulation:

Modulation Type

Press the [MOD TYPE] key and use the ADJUST keys to select PULSE or BLANK.

Modulation Function

Press the [MOD FCN] key and use the ADJUST keys to select the desired modulation function (pulse, noise or external). If external, then CMOS logic levels applied to the rear panel modulation input control the pulse or blanking of the outputs. (See details on PRBS modulation below.)

Pulse Period

Press [MOD RATE] to display the pulse modulation period for the internal source. The value may be set using the SELECT/ADJUST arrow keys or via numeric entry plus one of the [ns] [μs] [ms] [enter] unit keys.

Pulse Width or Duty Factor

Press [MOD DEV] to display and set the pulse width of the internal source, which also turns on either the WIDTH or DUTY FACTOR LED. The value may be set using numeric entry and [ns] [μs] [ms] [enter] or [%] unit keys, or the SELECT/ADJUST arrow keys.

Modulation On/Off

Press the [ON/OFF] key to turn the modulation "ON".

Pulse Modulation Example

The waveforms below show the front panel BNC and Type-N outputs for a pulse modulated carrier frequency of 50 MHz. The internal pulse modulator was set to 1 s period, with a 300 ns “on” time (or a 30% duty cycle).

The output amplitudes were set to 2V_PP into 50 . The top trace is the rear panel Modulation Output signal. The middle trace is the BNC output. The bottom trace is the Type-N output. Both traces show about 50 ns latency in their response to the gating signal. The Type-N output also shows some gate feed-though at the leading edge if the signal.

Waveform 12: Pulse modulated 50 MHz carrier

More about PRBS Noise Modulation

When the noise function is selected for pulse modulation, the modulation source is a pseudo random binary sequence (PRBS) generator. The PRBS is used to gate the Type-N and BNC outputs.

The period of the PRBS may be set from 100 ns to 10 s, with 5 ns resolution via the [MOD RATE] key. The default PRBS period is 1 kHz. At the default setting, the RF output would be set “on” or “off”, randomly, every millisecond.

The default PRBS run length is 9 bits and so the PRBS pattern repeats after 2^-9-1=511 periods. The PRBS run length can be changed from 5 to 19 bits for repeat cycles between 31 and 524,287 periods.

To modify the PRBS run length:

Press the [Shift] key followed by the [PBRS(8)] key to display the PRBS run length (in bits). Press the ADJUST keys or enter a number, N, between 5 and 19 followed by the ENTER key. The PRBS will repeat after 2^N-1 cycles.

The PRBS is available at the rear panel Modulation Output BNC. The source is 0 to 3.3 V with 50 source impedance. The output should not be terminated into 50 .

Phase Continuous Frequency Sweeps

Frequency sweeps allow the traversing of an entire frequency band. The sweep modulation may use the internal sine, triangle, or ramp waveforms or an external modulation source. Sweep rates of up to 120 Hz and sweep ranges from 10 Hz up to an entire frequency band are supported with resolutions of 1 Hz.

Frequency sweeps can require the instrument's RF VCO to sweep through an entire octave. For the sweep to be phase continuous the RF VCO PLL must remain in “LOCK” during the sweep. This is why the maximum sweep rate is limited to 120 Hz and why the frequency slew rate is internally limited for the ramp function. The slew rate of external modulation sources should also be limited if a phase continuous sweep is required.

The RF Synthesizers have eight frequency bands as shown in Tables below:

Table 12: Sweep Frequency Bands for the SG382 and SG384

Band	Frequency
1	DC ⇒ 64 MHz
2	59.375 ⇒ 128.125 MHz
3	118.75 ⇒ 256.25 MHz
4	237.5 ⇒ 512.5 MHz
5	475 ⇒ 1025 MHz
6	950 ⇒ 2050 MHz
7 (SG384)	1900 ⇒ 4100 MHz
8 (Option 2)	3800 ⇒ 8200 MHz

Table 13: Sweep Frequency Bands for the SG386

Band	Frequency
1	DC ⇒ 96 MHz
2	89.0625 ⇒ 192.1875 MHz
3	178.125 ⇒ 384.375 MHz
4	356.25 ⇒ 768.75 MHz
5	712.5 ⇒ 1537.5 MHz
6	1425 ⇒ 3075 MHz
7	2850 ⇒ 6150 MHz
8 (Option 2)	5950 ⇒ 8150 MHz

Setting up Frequency Sweeps:

Modulation Type

Press the [MOD TYPE] key and use the ADJUST keys to select SWEEP.

Modulation Function

Press the [MOD FCN] key and use the ADJUST keys to select either sine, ramp, triangle or external modulation function.

Sweep Rate

Press [MOD RATE] to display the modulation rate. This value may be set using the SELECT/ADJUST arrow keys or via numeric entry followed by [Hz] unit key. The Rate may be set from 1 Hz to 120 Hz with a resolution of 1 Hz.

Sweep Deviation

Press [MOD DEV] to display and set to the Sweep deviation. This turns on the 'DEVIATION' LED. The value may be set using numeric entry plus one of the hertz unit keys, or the SELECT/ADJUST arrow keys. The deviation may be set to sweep an entire band or any part thereof.

Modulation On/Off

Press the [ON/OFF] key to turn the modulation "ON".

I/Q Modulation (Option 3)

This option extends the signal generator's standard modulation suite with In-phase/Quadrature (IQ) modulation capabilities. This allows modulation of the front panel Type-N output for frequencies above 400 MHz and supports modulation bandwidths of over 100 MHz. I/Q modulation is not applied to the rear panel doubler option or BNC outputs.

To avoid output amplifier compression, the maximum output power setting is +10 dBm during I/Q modulation. This guarantees that the modulator output does not exceed the full scale output of the amplifier when both I&Q are at full scale.

This option provides four BNC connectors on the rear panel. One pair is used for the external inputs, while the second pair provides outputs of the I/Q waveforms. For external operation, the input signals are replicated on the outputs. For internally generated noise modulation, the baseband noise waveform is available on the I output with the Q output being held at zero.

The inputs are terminated with 50 , and support a signal bandwidth from DC to 100 MHz. A ± 500 mV level on either input produces full scale output (full scale determined by the amplitude setting). Any combination of I and Q input levels that when added in quadrature have a level of 500 mV will likewise result in full-scale output.

Figure 3 depicts the relationship between I and Q levels when added in quadrature and the resulting output magnitude

Circle with 500 mV corresponding to a full-scale output Mag = √I² + Q² The output is instantaneously set by: Mag / (500mV) • Amplitude Setting

Figure 3: IQ Relationship

The inputs are designed to allow full-scale modulation. Each input is monitored and if either exceeds 525 mV (105 %) the front panel EXT overload LED is turned on and remains on until the condition is removed.

When the noise function is selected the instrument produces a spectral output with a rectangular profile. The width of the profile is determined by the ENBW setting and may range from 1 Hz to 50 kHz.

There are two ways to operate the IQ modulator: From the rear panel, user supplied, I&Q inputs or from an internal generated noise source (which is only applied to the I modulation input). IQ modulation operates only for carrier frequencies above 400 MHz.

Setting up External IQ Modulation:

Note that Option 3 must be installed.

Modulation Type

Press the [MOD TYPE] key and use the ADJUST keys to select I/Q (OPT).

Modulation Function

Press the [MOD FCN] key and use the ADJUST keys to select EXT.

Modulation Rate

When the external modulation function is selected there is no rate parameter and the unit displays the message “rate etrn”.

Fixed Modulation Deviation

When the external modulation function is selected, there is no corresponding deviation parameter. The unit displays the message “dev predefined”. (The scale is fixed at ±0.5V providing full scale on the I or Q outputs).

User modulation waveforms should be applied to the rear panel I & Q BNC inputs. The sources should be able to provide ±500 mV full scale into a 50 load. The front panel red EXT LED will indicate an overload if the inputs exceed about ±525 mV.

Modulation On/Off

Press the [ON/OFF] key to turn the modulation "ON".

Setting up Internal Noise IQ Modulation:

Note that Option 3 must be installed)

Modulation Type

Press the [MOD TYPE] key and use the ADJUST keys to select I/Q (OPT).

Modulation Function

Press the [MOD FCN] key and use the ADJUST keys to select NOISE..

Modulation Effective Noise Bandwidth (ENBW)

Press the [MOD RATE] to display the noise modulation equivalent noise bandwidth (ENBW). The value may be set using the SELECT/ADJUST arrow keys or via a numeric entry completed with one of the [Hz] unit keys. The baseband noise function is available on the rear panel I-OUT BNC.

Fixed Modulation Deviation

Pressing [MOD DEV] displays the message “crest fact. 14 dB”. The crest factor is fixed, and indicates that the ratio of the peak value to RMS value of the noise waveform is 14 dB (or 5×). This factor is not adjustable.

Modulation On/Off

Press the [ON/OFF] key to turn the modulation "ON".

IQ Noise Modulation Example

The RF output is being amplitude modulated by a bipolar noise signal applied to the I-channel only. In the frequency domain the output will appear as a flat band of noise centered on the carrier frequency with brick-wall filtered skirts. The width of the noise around the carrier frequency is twice the ENBW.

Waveform 13: Spectrum of I/Q modulation by internal noise source.

Secondary (Shift) Parameters

The shifted keys are used to access parameters or functions that are less frequently required. Table 14 gives a summary of the keys.

Table 14: Shifted Key Functions

Label	Primary Key	Function Description
NET	•	Configure Ethernet interface
CAL	+/-	Adjust the timebase, and selects the PLL filter mode
INIT	0	Load default instrument settings
TIMEBASE	1	Displays the timebase configuration
STATUS	2	View TCP/IP (Ethernet), error, or instrument status, as well as running Self-Test
LOCAL	3	Go to local. Enables front panel keys if the unit is in remote mode.
GPIB	4	Configure GPIB interface
RS-232	5	Configure RS-232 interface
DATA	6	Display the most recent data received over any remote interface
REL Φ=0	7	Defines the current phase to be 0 degrees and displays phase parameter (of 0)
PRBS	8	Allows access to the parameters associated with the Pseudo-Random Binary Sequence generator
STEP SIZE	9	Set the incremental value used by the ADJUST keys

Some of the keys in the Numeric Entry section of the front panel have secondary functions associated with them. The names of these functions are printed above the key. For example, the [4] key has the label "RS-232" in light blue text above it.

REL Φ=0

[SHIFT] [7] sets the phase display to 0^ . The phase of the output is not changed.

PRBS

[SHIFT] [8] allows setting of the PRBS (pseudo-random binary sequence) bit length (from 5 to 19) for pulse modulation with noise.

STEP SIZE

[SHIFT] [9] allows setting of the STEP SIZE for the ADJUST and keys for any displayed parameter (such as frequency, phase, amplitude, modulation rate, etc.) (The default step size is ±1 at the blinking digit.)

Timebase

[SHIFT] [1] shows the installed timebase. This can be the standard ovenized crystal oscillator (OCXO) or an optional rubidium oscillator.

Table 15: Timebase Status Menu

Parameter	Example Display	Description
Oscillator	‘Osc. ovenized’	Indicates which type of timebase is installed.
Rb lock	‘Rb stable’	If a rubidium timebase is installed, this item indicates if the rubidium has stabilized.

NET

The NET menu, [SHIFT] [.], enables the user to configure the TCP/IP based remote interfaces (the IP address, subnet mask, and default router). To see the current TCP/IP parameters use the STATUS menu. Before connecting the instrument to your LAN, check with your network administrator for the proper configuration of devices on your network.

The NET menu (summarized in Table 16) has several options. Press the SELECT ◀ and ▷ keys to cycle through the options. Use the ADJUST △ and ▽ keys to change an option. Use the numeric keypad to enter an IP address when appropriate. Note that changes to the TCP/IP configuration do not take effect until the interface is reset or power is cycled.

Table 16: NET Menu Options for TCP/IP Configuration

Parameter	Example Display	Description
TCP/IP	‘TCPIP enabled’	Enable or disable all TCP/IP access
DHCP	‘DHCP enabled’	Enable or disable the DHCP client to automatically obtain an appropriate TCP/IP configuration from a DHCP server
Static IP	‘Static IP enabled’	Enable or disable a static IP configuration.
IP	‘IP 192.168.0.5’	IP address to use if static IP is enabled.
Subnet	‘Subnet 255.255.0.0’	Subnet mask to use if static IP is enabled.
Default gateway	‘Def Gty 192.168.0.1’	Default gateway or router to use for routing packets not on the local network if static IP is enabled
Bare socket interface	‘Bare enabled’	Enable or disable raw socket access on TCP/IP port 5025.
Telnet interface	‘Telnet enabled’	Enable or disable telnet access on TCP/IP port 5024.
VXI-11 Interface	‘Net instr enabled’	Enable or disable the VXI-11 net instrument remote interface.
Link speed	‘Speed 100 Base-T’	Set the Ethernet link speed.
Reset	‘Reset no’	Select ‘Reset yes’ and press ‘ENTER’ to reset the TCP/IP interface to use the latest TCP/IP configuration settings.

TCP/IP Configuration Methods

In order to function properly on an Ethernet based local area network (LAN), the unit needs to obtain a valid IP address, a subnet mask, and a default gateway or router address.

There are three methods for obtaining these parameters: DHCP, Auto-IP, and Static IP. Check with your network administrator for the proper method of configuration of instruments on your network.

If the DHCP client is enabled, the unit will try to obtain its TCP/IP configuration from a DHCP server located somewhere on the local network. If the Auto-IP protocol is enabled, the unit will try to obtain a valid link-local IP configuration in the 169.254.x.x address space. If the static IP configuration is enabled, the unit will use the given TCP/IP configuration. When all three methods are enabled, the TCP/IP configuration will be determined in the following order of preference: DHCP, Auto-IP, and static IP. Given that Auto-IP is virtually guaranteed to succeed, it should be disabled if a static IP configuration is desired.

Please see the Status details on page 48 for details on viewing the TCP/IP address obtained via DHCP or Auto-IP methods.

TCP/IP Based Remote Interfaces

Three TCP/IP based remote interfaces are supported: raw socket, telnet, and VXI-11 net instrument. Raw socket access is available on port 5025. Telnet access is available on port 5024. The VXI-11 interface enables IEEE 488.2 GPIB-like access to the unit over TCP/IP. It enables controlled reads and writes and the ability to generate service requests. Most recent VISA instrument software libraries support this protocol.

Link Speed

The physical Ethernet layer supports 10 Base-T and 100 Base-T link speeds. The default link speed is set to 100 Base-T, but it can be set to 10 Base-T.

Reset the TCP/IP Interface

Note that changes to the TCP/IP configuration do not take effect until the TCP/IP interface is either reset or the instrument is power cycled. To reset the TCP/IP interface, navigate through the NET menu options until “reset no” is displayed. Press the ADJUST key to display “reset yes” and then press ENTER. Any active connections will be aborted. The TCP/IP stack will be re-initialized and configured using the latest configuration options.

GPIB

The GPIB menu enables the user to configure the GPIB remote interface. The GPIB menu has several options. Press the SELECT ◀ and ▷ keys to cycle through the options. Use the ADJUST △ and ▽ keys to change an option. Note that changes to the GPIB configuration do not take effect until the interface is reset or the instrument is power cycled. The GPIB menu parameters are summarized in Table 17:

Table 17: GPIB Menu Options

Parameter	Example Display	Description
GPIB	‘GPIB enabled’	Enable or disable all GPIB access
Address	‘Address 27’	GPIB address
Reset	‘Reset no’	Select ‘reset yes’ and press ‘ENTER’ to reset the GPIB interface.

GPIB Address

In order to communicate properly on the GPIB bus, the signal generator must be configured with a unique address. Use the Address menu option to set the unit's GPIB address. Then reset the interface to make sure the new address is active.

Reset the GPIB Interface

Note that changes to the GPIB configuration do not take effect until the GPIB interface is either reset or the instrument is power cycled. To reset the GPIB interface, navigate through the GPIB menu options until “reset no” is displayed. Press the ADJUST △ key to display “reset yes” and press ENTER.

RS-232

The RS-232 menu enables the user to configure the RS-232 remote interface. The RS-232 menu has several options. Press the SELECT ◀ and ▷ keys to cycle through the options. Use the ADJUST △ and ▽ keys to change an option. Note that changes to the RS-232 configuration do not take effect until the interface is reset or the instrument is power cycled. The RS-232 menu parameters are summarized in Table 18.

Table 18: RS-232 Menu Options

Parameter	Example Display	Description
RS-232	‘RS-232 enabled’	Enable or disable all RS-232 access
Baud rate	‘Baud 11500’	The baud rate to use for RS-232 connections
Reset	‘Reset no’	Select ‘yes’ and press ‘ENTER’ to reset the RS-232 interface.

RS-232 Configuration

In order to communicate properly over RS-232, the instrument and the host computer both must be configured to use the same configuration. The following baud rates are supported: 115200 (default), 57600, 38400, 19200, 9600, and 4800. The rest of the communication parameters are fixed at 8 data bits, 1 stop bit, no parity, and RTS/CTS hardware flow control.

Use the baud rate menu option to set the unit's baud rate. Then reset the interface to make sure the new baud rate is active.

Reset the RS-232 Interface

Note that changes to the RS-232 configuration do not take effect until the RS-232 interface is either reset or the instrument is power cycled. To reset the RS-232 interface, navigate through the RS-232 menu options until “reset no” is displayed. Press the ADJUST key display “reset yes” and press ENTER.

DATA

The DATA function enables the user to see the hexadecimal ASCII characters received by the instrument from the most recently used remote interface. This functionality is useful when trying to debug communication problems. Use the ADJUST and keys to scroll through the data. The decimal point indicates the last character received.

STATUS

The STATUS function enables the user to view status information. The instrument has four status menus: TCP/IP status, error status, instrument status, and self test. Use the ADJUST and keys to select the desired status. Then press the SELECT and keys to view each item of status.

TCP/IP Status

TCP/IP status contains status information on the current IP configuration. Table 19 summarizes the TCP/IP status information.

Table 19: TCP/IP Status Menu

Parameter	Example Display	Description
Ethernet mac address	‘Phy Adr 00.19.b3.02.00.01’	This is the Ethernet mac address assigned to this unit at the factory.
Link status	‘Connected’	Indicates if the Ethernet hardware has established a link to the network.
IP address	‘IP 192.168.0.5’	The current IP address.
Subnet mask	‘Subnet 255.255.0.0’	The current subnet mask.
Default gateway	‘Def Gty 192.168.0.1’	The current default gateway or router.

Error Status

The error status menu enables the user to view the number and cause of execution and parsing errors. Table 20 summarizes the error status items. See section Error Codes on page 84 for a complete list of error codes.

Table 20: Error Status Menu

Parameter	Example Display	Description
Error count	‘Error cnt 1’	Indicates the number of errors detected.
Error code	‘111 Parse Error’	Provides the error number and description of the error.

When an error is generated the front panel error LED is turned on. The ERR LED remains on until the status is interrogated, the unit is re-initialized using INIT, or the unit receives the remote command *CLS.

Instrument Status

The instrument status menu enables the user to view the instrument configuration including reports rear panel options.

Table 21: Instrument Status Menu

Parameter	Example Display	Description
Serial Number	‘Serial 001013’	Unit serial number
Version	‘Version 1.00.10A’	Firmware version
Options	‘Option 3 yes’	Indicates which rear options, if any, are installed.

Self Test

The instrument self test runs a series of tests to check the operation of the unit. It tests communication to various peripherals on the motherboard including the GPIB chip, the PLL chips, the DDS chips, the octal DACs, the FPGA, and the serial EEPROM. If errors are encountered, they will be reported on the front-panel display when detected. The errors detected are stored in the instrument error buffer and may be accessed via the error status menu after the self test completes. See section Error Codes on page 84 for a complete list of error codes.

LOCAL

When the unit is in remote mode, the REM LED is highlighted and front-panel instrument control is disabled. Pressing the [3] (LOCAL) key re-enables local front-panel control.

INIT

Executing the INIT function forces the instrument to default settings. This is equivalent to a Recall 0 or executing the *RST remote command. See Factory Default Settings on page 50 for a list of the unit's default settings.

CAL

This accesses the internal timebase user calibration parameter or the RF PLL Noise Mode setting. The user calibration parameter allows adjustment of the timebase over a range of ±2 ppm (10 MHz ±20 Hz).

The RF PLL Mode has two settings RF PLL 1 and 2. RF PLL1 optimizes the noise floor of the output within 100 kHz of the carrier. This is the default setting.

RF PLL 2 optimizes the noise floor of the output for offset greater than 100 kHz from carrier. See Phase Noise Spectra vs RF PLL Modes on page xvii of the Specifications for more spectra showing the different characteristics of the two PLL modes.

Factory Default Settings

The factory default settings are listed in Table 22. Factory default settings may be restored by power cycling the unit with the [BACK SPACE] key depressed. This forces all instrument settings except for communication parameters to the factory defaults. It is similar to the INIT secondary function and the *RST remote command, which also reset the unit to factory default settings. However the Factory Reset also performs these additional actions:

1. Resets *PSC to 1
2. Forces nonvolatile copies of *SRE and *ESE to 0.
3. Resets all stored settings from 1 to 9 back to default settings

Table 22: Factory Default Settings

Parameter	Value	Step Size
Display	Frequency
Frequency	10 MHz	1 Hz
Phase	0 Degrees	1 Degree
Amplitude (BNC, NTYPE, Doubler)	0 dBm	1 dBm
	0.224 V_RMS	0.1 V_RMS
	0.632 V_PP	0.1 V_PP
Amplitude (Clock Option)	0.4 V_PP	0.1 V_PP
Offset (BNC, Clock, Rear DAC)	0 V	0.1 V
RF PLL Filter Mode	1
Modulation On/Off	Off
Modulation Type	FM
Modulation Function (AM/FM/PM)	Sine
Modulation Function (Sweep)	Triangle
Modulation Function (Pulse/Blank)	Square
Modulation Function (I/Q)	External
Modulation Rate (AM/FM/PM)	1 kHz	1 kHz
Modulation Rate (Sweep)	100 Hz	10 Hz
Modulation Input Coupling	DC
AM Depth	50 %	10 %
FM Deviation	1 kHz	1 kHz
PM Deviation	10 Degrees	10 Degrees
Sweep Deviation	1 MHz	1 MHz
AM RMS Noise Depth	10 %	10 %
FM RMS Noise Deviation	1 kHz	1 kHz
PM RMS Noise Deviation	10 Degrees	10 Degrees
Pulse/Blank Period	1000 μs	100 μs
Pulse/Blank Width	1 μs	0.1 μs
PRBS Length	9
PRBS Period	1 μs	0.1 μs

The factory default settings of the various communications interfaces are listed in Table 23. The unit may be forced to assume its factory default communication settings by power cycling the unit with the [NET(.)] key depressed.

Table 23: Factory Default Settings for Communications Parameters

Parameter	Setting
RS-232	Enabled
RS-232 Baud Rate	115200
GPIB	Enabled
GPIB Address	27
TCP/IP	Enabled
DHCP	Enabled
Auto-IP	Enabled
Static IP	Enabled
IP	0.0.0.0
Subnet Mask	0.0.0.0
Default Gateway	0.0.0.0
Bare (Raw) Socket Interface at TCP/IP port 5025	Enabled
Telnet Interface at TCP/IP port 5024	Enabled
VXI-11 Net Instrument Interface	Enabled
Ethernet Speed	100 Base-T

Remote Programming

Introduction

The instrument may be remotely programmed via the GPIB interface, the RS-232 serial interface, or the LAN Ethernet interface. Any host computer interfaced to the instrument can easily control and monitor its operation.

Interface Configuration

All of the interface configuration parameters can be accessed via the front panel through shifted functions dedicated to the interface. Table 24 identifies the shifted functions that are used to configure each interface.

Table 24: Interface Configuration

Shifted Function	Interface Configuration
NET [•]	LAN, TCP/IP interface
GPIB [4]	GPIB 488.2 interface
RS-232 [5]	RS-232 serial interface

Each interface's configuration is accessed by pressing [SHIFT] followed by one of the interface keys ([NET], [GPIB], or [RS-232]). Once a given interface configuration is activated, parameters for the interface are selected by successive SELECT ▷ key presses. For example, pressing [SHIFT], [RS-232] activates the RS-232 configuration. The first menu item is RS-232 Enable/Disable. Pressing SELECT ▷ moves the selection to RS-232 baud rate.

Once a parameter is selected, it is modified by pressing the ADJUST and keys. The only exception to this is for selections that require an internet address, such as static IP address, network mask, and default gateway address. In this case the address is modified by entering the new address with the numeric keys and pressing [ENTER].

All interfaces are enabled by default, but each interface may be disabled individually if desired. Any modifications made to an interface do not take effect until the interface is reset or the unit is power cycled.

GPIB

The IEEE 488 standard port is used for communicating over GPIB. The port is located on the rear panel of the unit. The configuration parameters for the GPIB interface are shown in Table 25.

Table 25: GPIB Configuration

Interface Parameter	Default	Meaning
GPIB Enable/Disable	Enabled	Enable or disable the interface
GPIB Address (0-30)	27	Primary GPIB address.
Reset interface (Yes/No)	No	Force a reset of the interface.

Any changes made will not take effect until the interface is reset or the unit is power cycled.

RS-232

An RS-232 communications port is also standard. The port is located on the rear panel of the unit. The configuration parameters for the RS-232 interface are shown in Table 26.

Table 26: RS-232 Configuration

Interface Parameter	Default	Meaning
RS-232 enable/disable	Enabled	Enable or disable the interface
Baud rate (4800-115200)	115200	RS-232 baud rate
Reset interface (yes/no)	No	Force a reset of the interface.

The RS-232 interface connector is a standard 9 pin, type D, female connector configured as a DCE (transmit on pin 2, receive on pin 3). The factory default communication parameters are set to: 115200 baud rate, 8 data bits, 1 stop bit, no parity, RTS/CTS hardware flow control. All of these communication parameters are fixed except for the baud rate. Any changes made to the interface configuration will not take effect until the interface is reset or the unit is power cycled.

LAN

A rear panel RJ-45 connector may be used to connect the instrument to a 10/100 Base-T Ethernet LAN. Before connecting the instrument to your LAN, check with your network administrator for the proper method of configuration of networked instruments on your network. The TCP/IP configuration options for the LAN interface are shown in Table 27.

Table 27: LAN Configuration

Interface Parameter	Default	Meaning
TCP/IP Enable/Disable	Enabled	Enable or disable all TCP/IP based interfaces.
DHCP Enable/Disable	Enabled	Enable or disable automatic network configuration via DHCP.
Auto-IP Enable/Disable	Enabled	Enable or disable automatic network configuration in the 169.254.x.x internet address space if DHCP fails or is disabled.
Static IP Enable/Disable	Enabled	Enable manual configured network configuration in the event that the automatic configuration fails or is disabled.
IP Address	0.0.0.0	Static IP address to use when manual configuration is active.
Subnet Address	0.0.0.0	Network mask to use when manual configuration is active. The network mask is used to determine which IP addresses are on the local network.
Default Gateway	0.0.0.0	Default gateway or router to use when manual configuration is active. The gateway is the IP address that packets are sent to if the destination IP address is not on the local network.
Bare Socket Enable/Disable	Enabled	Enable or disable raw socket access to the instrument via TCP port 5025.
Telnet Enable/Disable	Enabled	Enable or disable access via telnet at TCP port 5024.
Net Instr. Enable/Disable	Enabled	Enable or disable access via VXI-11 net instrument protocols.
Ethernet Speed 10/100	100 Base-T	Ethernet physical layer link speed.
Reset interface (Yes/No)	No	Force a reset of the interface.

Both automatic and static network configuration is supported. When more than one configuration is enabled, the instrument selects network configuration parameters with the following priority: DHCP, Auto-IP, and finally Manual. Since Auto-IP will virtually always succeed, it should be disabled if static configuration is desired. Any changes made to the interface configuration will not take effect until the interface is reset or the unit is power cycled.

Network Security

Network security is an important consideration for all TCP/IP networks. Please bear in mind that the unit does NOT provide security controls, such as passwords or encryption, for controlling access. If such controls are needed, you must provide it at a higher level on your network. This might be achieved, for example, by setting up a firewall and operating the instrument behind it.

Front-Panel Indicators

To assist in programming, there are three front panel indicators located under the INTERFACE section: REM, ACT, and ERR. The REM LED is on when the instrument is in remote lock out. In this mode, the front panel interface is locked out and the instrument can only be controlled via the remote interface. To go back to local mode, the user must press the LOCAL key, [3]. The ACT LED serves as an activity indicator that flashes every time a character is received or transmitted over one of the remote interfaces.

The ERR LED will be highlighted when a remote command fails to execute due to illegal syntax or invalid parameters. The user may view the cause of errors from the front panel by pressing the keys [SHIFT], [STATUS], sequentially. Next press ADJUST △ until the display reads “Error Status”. Finally, press SELECT ▷ successively, to view the total error count followed by the individual errors. The error codes are described in section Error Codes on page 84.

Command Syntax

All commands use ASCII characters, are 4-characters long, and are case-insensitive. Standard IEEE-488.2 defined commands begin with the ‘*’ character followed by 3 letters. Instrument specific commands are composed of 4 letters.

The four letter mnemonic (shown in capital letters) in each command sequence specifies the command. The rest of the sequence consists of parameters.

Commands may take either set or query form, depending on whether the '?' character follows the mnemonic. Set only commands are listed without the '?' query only commands show the '?' after the mnemonic, and query optional commands are marked with a '(?)'.

Parameters shown in { } and [ ] are not always required. Parameters in { } are required to set a value, and are omitted for queries. Parameters in [ ] are optional in both set and query commands. Parameters listed without any surrounding characters are always required.

Do NOT send () or {} or [] or spaces as part of the command.

The command buffer is limited to 768 bytes, with 25 byte buffers allocated to each of up to 3 parameters per command. If the command buffer overflows, both the input and output buffers will be flushed and reset. If a parameter buffer overflows, a command error will be generated and the offending command discarded.

Commands are terminated by a semicolon, a (ASCII 13), or a (ASCII 10). If the communications interface is GPIB, then the terminating character may optionally be accompanied by an EOI signal. If the EOI accompanies a character other than a , a will be appended to the command to terminate it. Execution of the command does not begin until a command terminator is received.

Aside from communication errors, commands may fail due to either syntax or execution errors. Syntax errors can be detected by looking at bit 5 (CME) of the event status register (*ESR?). Execution errors can be detected by looking at bit 4 (EXE) of the event status register. In both cases, an error code, indicating the specific cause of the error, is appended

to the error queue. The error queue may be queried with the LERR? command. Descriptions of all error codes can be found in the section Error Codes, starting on page 84.

Parameter Conventions

The command descriptions use parameters, such as i, f, and v. These parameters represent integers or floating point values expected by the command. The parameters follow the conventions summarized in Table 28.

Table 28: Command Parameter Conventions

Parameter	Meaning
i, j, k	An integer value
f	A floating point value representing a frequency in Hz.
p	A floating point value representing a phase in degrees.
t	A floating point value representing time in seconds.
v	A floating point value representing voltage in volts.
u	An identifier of units. Allowed units depend on the type as identified below:
	Type	Allowed Units
	Amplitude	‘dBm’, ‘rms’, ‘Vpp’
	Frequency	‘GHz’, ‘MHz’, ‘kHz’, or ‘Hz’
	Time	‘ns’, ‘us’, ‘ms’, or ‘s’

Numeric Conventions

Floating point values may be decimal ('123.45') or scientific ('1.2345e2'). Integer values may be decimal ('12345') or hexadecimal ('0x3039').

Abridged Index of Commands

Common IEEE-488.2 Commands

*CAL?	Page 60	Run auto calibration routine
*CLS	Page 60	Clear Status
*ESE(?){i}	Page 60	Standard Event Status Enable
*ESR?	Page 60	Standard Event Status Register
*IDN?	Page 60	Identification String
*OPC(?)	Page 60	Operation Complete
*PSC(?){i}	Page 61	Power-on Status Clear
*RCL i	Page 61	Recall Instrument Settings
*RST	Page 61	Reset the Instrument
*SAV i	Page 61	Save Instrument Settings
*SRE(?){i}	Page 61	Service Request Enable
*STB?	Page 62	Status Byte
*TRG	Page 62	Trigger a delay
*TST?	Page 62	Self Test
*WAI	Page 62	Wait for Command Execution

Status and Display Commands

DISP(?){i}	Page 63	Display
INSE(?){i}	Page 63	Instrument Status Enable
INSR?	Page 63	Instrument Status Register
LERR?	Page 64	Last Error
OPTN? i	Page 64	Installed Options
ORNG? [i]	Page 64	Output Over Range
TEMP?	Page 64	Temperature of the RF block
TIMB?	Page 64	Timebase

Signal Synthesis Commands

AMPC(?){v}	Page 65	Amplitude of Clock
AMPH(?){v}[u]	Page 65	Amplitude of HF (RF Doubler)
AMPL(?){v}[u]	Page 65	Amplitude of LF (BNC Output)
AMPR(?){v}[u]	Page 65	Amplitude of RF (Type-N Output)
ENBC(?){i}	Page 66	Enable Clock
ENBH(?){i}	Page 66	Enable HF (RF Doubler)
ENBL(?){i}	Page 66	Enable LF (BNC Output)
ENBR(?){i}	Page 66	Enable RF (Type-N Output)
FREQ(?){f}[u]	Page 66	Frequency
NOIS(?){i}	Page 66	Noise Mode of RF PLL Loop Filter
OFSC(?){v}	Page 66	Offset of Clock
OFSD(?){v}	Page 66	Offset of Rear DC
OFSL(?){v}	Page 67	Offset of LF (BNC Output)
PHAS(?){p}	Page 67	Phase
RPHS	Page 67	Rel Phase

Modulation Commands

ADEP(?){d}	Page 69	AM Modulation Depth
ANDP(?){d}	Page 69	AM Noise Modulation Depth
COUP(?){i}	Page 69	Modulation Coupling
FDEV(?){f}[u]	Page 69	FM Deviation
FNDV(?){f}[u]	Page 69	FM Noise Deviation
MFNC(?){i}	Page 70	Modulation Function for AM/FM/ΦM
MODL(?){i}	Page 70	Modulation Enable
PDEV(?){p}	Page 70	ΦM Deviation
PDTY(?){d}	Page 70	Pulse/Blank Duty Factor
PFNC(?){i}	Page 70	Pulse Modulation Function
PNDV(?){p}	Page 71	ΦM Noise Deviation
PPER(?){t}[u]	Page 71	Pulse/Blank Period
PRBS(?){i}	Page 71	PRBS Length for Pulse/Blank Modulation
PWID(?){t}[u]	Page 71	Pulse/Blank Width
QFNC(?){i}	Page 71	IQ Modulation Function
RATE(?){f}[u]	Page 72	Modulation Rage for AM/FM/ΦM
RPER(?){t}[u]	Page 72	PRBS Period for Pulse/Blank Modulation
SDEV(?){f}[u]	Page 72	Sweep Deviation
SFNC(?){i}	Page 72	Sweep Modulation Function
SRAT(?){f}[u]	Page 72	Modulation Sweep Rate
TYPE(?){i}	Page 73	Modulation Type

List Commands

LSTC? i	Page 74	List Create
LSTD	Page 74	List Delete
LSTE(?){i}	Page 74	List Enable
LSTI(?){i}	Page 74	List Index
LSTP(?) i {,}	Page 74	List Point
LSTR	Page 75	List Reset
LSTS?	Page 75	List Size

Interface Commands

EMAC?	Page 76	Ethernet MAC Address
EPHY(?){i}	Page 76	Ethernet Physical Layer Configuration
IFCF(?)i{,j}	Page 76	Interface Configuration
IFRS i	Page 77	Interface Reset
IPCF? i	Page 77	Active TCP/IP Configuration
LCAL	Page 77	Go to Local
LOCK?	Page 77	Request Lock
REMT	Page 77	Go to Remote
UNLK?	Page 77	Release Lock
XTRM i{,j,k}	Page 77	Interface Terminator

Detailed Command List

Common IEEE-488.2 Commands

\*CAL? Auto calibration

This command currently does nothing and returns 0.

\*CLS Clear Status

Clear Status immediately clears the ESR and INSR registers as well as the LERR error buffer.

\*ESE(?){i} Standard Event Status Enable

Set (query) the Standard Event Status Enable register {to i}. Bits set in this register cause ESB (in STB) to be set when the corresponding bit is set in the ESR register.

\*ESR? Standard Event Status Register

Query the Standard Event Status Register. Upon executing a *ESR? query, the returned bits of the *ESR register are cleared. The bits in the ESR register have the following meaning:

Bit Meaning

0 OPC - operation complete

1 Reserved

2 QYE - query error

3 DDE - device dependent error

4 EXE - execution error

5 CME - command error

6 Reserved

7 PON - power-on

Example

*ESR? A return of '176' would indicate that PON, CME, and EXE are set.

\*IDN? Identification String

Query the instrument identification string.

Example

*IDN? Returns a string similar to ‘Stanford Research Systems, SG384, s/n004025, ver1.00.0B’

\*OPC(?) Operation Complete

The set form sets the OPC flag in the ESR register when all prior commands have completed. The query form returns '1' when all prior commands have completed, but does not affect the ESR register.

\*PSC(?){i} Power-on Status Clear

Set (query) the Power-on Status Clear flag {to i}. The Power-on Status Clear flag is stored in nonvolatile memory in the unit, and thus, maintains its value through power-cycle events.

If the value of the flag is 0, then the Service Request Enable and Standard Event Status Enable Registers (*SRE, *ESE) are stored in non-volatile memory, and retain their values through power-cycle events. If the value of the flag is 1, then these two registers are cleared upon power-cycle.

Example

*PSC 1 Set the Power-on Status Clear to 1.
*PSC? Returns the current value of Power-on Status Clear.

\*RCL i Recall Instrument Settings

Recall instrument settings from location i. The parameter i may range from 0 to 9. Locations 1 to 9 are for arbitrary use. Location 0 is reserved for the recall of default instrument settings.

Example

*RCL 3 Recall instruments settings from location 3.

\*RST Reset the Instrument

Reset the instrument to default settings. This is equivalent to *RCL 0. It is also equivalent to pressing the keys [SHIFT], [INIT], [ENTER on the front panel. See Factory Default Settings on page 50 for a list of default settings.

Example

*RST Resets the instrument to default settings

\*SAV i Save Instrument Settings

Save instrument settings to location i. The parameter i may range from 0 to 9. However, location 0 is reserved for current instrument settings. It will be overwritten after each front panel key press.

Example

*SAV 3 Save current settings to location 3.

\*SRE(?){i} Service Request Enable

Set (query) the Service Request Enable register {to i}. Bits set in this register cause the SG384 to generate a service request when the corresponding bit is set in the STB register.

\*STB? Status Byte

Query the standard IEEE 488.2 serial poll status byte. The bits in the STB register have the following meaning:

Bit Meaning

0 INSB - INSR summary bit
1 Reserved
2 Reserved
3 Reserved
4 MAV - message available
5 ESB - ESR summary bit
6 MSS - master summary bit
7 Reserved

Example

*STB? A return of ‘113’ would indicate that INSB, MAV, ESB, and MSS are set. INSB indicates that an enabled bit in INSR is set. MAV indicates that a message is available in the output queue. ESB indicates that an enabled bit in ESR is set. MSS reflects the fact that at least one of the summary enable bits is set and the instrument is requesting service.

\*TRG Trigger

When the instrument is configured for list operation, this command initiates a trigger. Instrument settings at the current list index are written to the instrument and the index is incremented to the next list entry.

\*TST? Self Test

Runs the instrument self test and returns 0 if successful. Otherwise it returns error code 17 to indicate that the self test failed. Use the LERR? command to determine the cause of the failure.

\*WAI Wait for Command Execution

The instrument will not process further commands until all prior commands including this one have completed.

Example

*WAI Wait for all prior commands to execute before continuing.

Status and Display Commands

DISP(?){i} Display

Set (query) the current display value {to i}. The parameter i selects the display type.

i Display
0 Modulation Type
1 Modulation Function
2 Frequency
3 Phase
4 Modulation Rate or Period
5 Modulation Deviation or Duty Cycle
6 RF Type-N Amplitude
7 BNC Amplitude
8 RF Doubler Amplitude
9 Clock Amplitude
10 BNC Offset
11 Rear DC Offset
12 Clock Offset

Example

DISP 2 Show carrier frequency

INSE(?){i} Instrument Status Enable

Set (query) the Instrument Status Enable register {to i}. Bits set in this register cause INSB (in STB) to be set when the corresponding bit is set in the INSR register.

INSR? Instrument Status Register

Query the Instrument Status Register. Upon executing a INSR? query, the returned bits of the INSR register are cleared. The bits in the INSR register have the following meaning:

Bit Meaning

0 20MHZ_UNLK - 20 MHz PLL unlocked.
1 100MHZ_UNLK - 100 MHz PLL unlocked.
2 19MHZ_UNLK - 19 MHz PLL unlocked.
3 1GHZ_UNLK - 1 GHz PLL unlocked.
4 4GHZ_UNLK - 4 GHz PLL unlocked.
5 NO_TIMEBASE - installed timebase is not oscillating.
6 RB_UNLOCK – the installed Rubidium oscillator is unlocked.
7 Reserved
8 MOD_OVLD - external modulation overloaded.
9 IQ_OVLD - external IQ modulation overloaded.
10-15 Reserved

Example

INSR? A return of '257' would indicate that an external modulation overload was detected and the 20 MHz PLL came unlocked.

LERR? Last Error

Query the last error in the error buffer. Upon executing a LERR? query, the returned error is removed from the error buffer. See the section Error Codes later in this chapter for a description of the possible error codes returned by LERR?. The error buffer has space to store up to 20 errors. If more than 19 errors occur without being queried, the 20^th error will be 254 (Too Many Errors), indicating that errors were dropped.

OPTN? i Installed Options

Query whether option i is installed. Returns 1 if it is installed, otherwise 0. The parameter i identifies the option.

i Option
1 Rear clock outputs
2 RF doubler and DC outputs
3 IQ modulation inputs and outputs
4 Rubidium timebase

ORNG? [i]

Output Over Range (New in firmware v1.10)

Query whether output i is over its specified range. The instrument returns one if the given output is over range, otherwise 0. The parameter i identifies the output as follows:

i Output
0 BNC output
1 Type-N outputs
2 Rear RF doubler output

If omitted, i defaults to 1.

TEMP? Temperature

Query the current temperature of the RF output block in degrees C.

TIMB? Timebase

Query the current timebase. The returned value identifies the timebase.

Value Meaning

0 Crystal timebase

1 OCXO timebase

2 Rubidium timebase

3 External timebase

Signal Synthesis Commands

Signal synthesis commands enable the user to set the frequency, amplitude, and phase of the outputs. Basic configuration can be achieved by following the steps as outlined in Table 29.

Table 29: Basic Signal Configuration

Action	Relevant Commands
Set frequency	FREQ
Set amplitude	AMPL, AMPR, AMPC, AMPH
Set offset	OFSL, OFSC, OFSD
Adjust phase	PHAS, RPHS

All of these commands are described in detail below.

AMPC(?){v} Amplitude of Clock

Set (query) the amplitude of the rear clock output {to v} in V_pp . Unlike the other amplitude commands, units are always V_pp .

AMPH(?){v}[u] Amplitude of HF (RF Doubler)

Set (query) the amplitude of the rear RF doubler {to v}. If omitted, units default to dBm.

Example

AMPH -5.0 Set the rear RF doubler amplitude to -5.0 dBm. AMPH 0.1 RMS Set the rear RF doubler amplitude to 0.1 V rms. AMPH? Query the rear RF doubler amplitude in dBm. AMPH? VPP Query the rear RF doubler amplitude in V pp.

AMPL(?){v}[u] Amplitude of LF (BNC Output)

Set (query) the amplitude of the low frequency BNC output {to v}. If omitted, units default to dBm.

Example

AMPL -1.0 Set the BNC output amplitude to -1.0 dBm.

AMPL 0.1 RMS Set the BNC output amplitude to 0.1 V_rms .

AMPL? Query the BNC output amplitude in dBm.

AMPR(?){v}[u] Amplitude of RF (Type-N Output)

Set (query) the amplitude of the Type-N RF output {to v}. If omitted, units default to dBm.

Example

AMPR -3.0 Set the Type-N RF output amplitude to -3.0 dBm.

AMPR 0.1 RMS Set the Type-N RF output amplitude to 0.1 V_rms .

AMPR? Query the Type-N RF output amplitude in dBm.

ENBC(?){i} Enable Clock

Set (query) the enable state of the rear clock output {to i}. If i is 0, the clock output is stopped in a low state. If i is 1, the clock is enabled and oscillating at the carrier frequency. Note that the query returns the current state of the output. It may return 0 even if a 1 was sent if the output is not active at the current frequency (i.e. F_carrier > 4.05 GHz).

ENBH(?){i} Enable HF (RF Doubler)

Set (query) the enable state of the rear RF doubler output {to i}. If i is 0, the RF doubler is disabled and turned off. If i is 1, the rear RF doubler is enabled and operating at the programmed amplitude for the output. Note that the query returns the current state of the output. It may return 0 even if a 1 was sent if the output is not active at the current frequency (i.e. F_carrier < 4.05 GHz).

ENBL(?){i} Enable LF (BNC Output)

Set (query) the enable state of the low frequency BNC output {to i}. If i is 0, the BNC output is disabled and turned off. If i is 1, the rear RF doubler is enabled and operating at the programmed amplitude for the output. Note that the query returns the current state of the output. It may return 0 even if a 1 was sent if the output is not active at the current frequency (i.e. F_carrier > 62.5 MHz ).

ENBR(?){i} Enable RF (Type-N Output)

Set (query) the enable state of the Type-N RF output {to i}. If i is 0, the Type-N RF output is disabled and turned off. If i is 1, the Type-N RF output is enabled and operating at the programmed amplitude for the output. Note that the query returns the current state of the output. It may return 0 even if a 1 was sent if the output is not active at the current frequency (i.e. F_carrier < 950 kHz ).

FREQ(?){f}[u] Frequency

Set (query) the carrier frequency {to f}. If omitted, units default to Hz.

Example

FREQ 100e6 Set the frequency to 100 MHz.

FREQ 100 MHz Also sets the frequency to 100 MHz.

FREQ ? Returns the current frequency in Hz.

FREQ? MHz Returns the current frequency in MHz

NOIS(?){i} Noise Mode of RF PLL Loop Filter

Set (query) the RF PLL loop filter mode for the instrument.

i RF PLL Mode ____

0 Mode 1—minimize noise at small offsets from carrier.

1 Mode 2—minimize noise at large offsets from carrier.

This command is identical to changing the PLL mode from the front panel via the shifted CAL function.

OFSC(?){v} Offset of Clock

Set (query) the offset voltage of the rear clock output {to v} in volts.

OFSD(?){v} Offset of Rear DC

Set (query) the offset voltage of the rear DC output {to v} in volts.

OFSL(?){v} Offset of LF (BNC Output)

Set (query) the offset voltage of the low frequency BNC output {to v} in volts.

PHAS(?){p} Phase

Set (query) the phase of the carrier{to p}. The phase will track to ±360^ , but it may only be stepped by 360^ in one step. Thus, if the phase is currently 360^ , setting the phase to -90^ will fail because the phase step is larger than 360^ . On the other hand, setting the phase to 370^ will succeed but the reported phase will then be 10^ .

Example

PHAS 90.0 Set the phase to 90 degrees. PHAS -10.0 Set the phase to -10 degrees.

RPHS Rel Phase

Make the current phase of the carrier 0^ .

Modulation Commands

Modulation commands enable the user to configure different type of modulations of the carrier. Basic configuration can be achieved by following the steps outlined in Table 30.

Table 30: Basic Modulation Configuration

Modulation	Configuration	Relevant Commands
On/Off	Enable modulation	MODL
External	AC/DC input coupling	COUP
AM	Select AM modulation	TYPE 0
	Modulation function	MFNC
	Mod. rate / Noise bandwidth	RATE
	Deviation	ADEP, ANDP
FM	Select FM modulation	TYPE 1
	Modulation function	MFNC
	Mod. rate / Noise bandwidth	RATE
	Deviation	FDEV, FNDV
ΦM	Select ΦM modulation	TYPE 2
	Modulation function	MFNC
	Mod. rate / Noise bandwidth	RATE
	Deviation	PDEV, PNDV
Sweep	Select frequency sweep	TYPE 3
	Modulation function	SFNC
	Modulation rate	SRAT
	Deviation	SDEV
Pulse/Blank	Select pulse/blank mod.	TYPE 4 or TYPE 5
	Modulation function	PFNC
	Pulse period	PPER
	Pulse width	PWID or PDTY
	PRBS period	RPER
	PRBS length	PRBS
IQ	Select IQ modulation	TYPE 6
	Modulation function	QFNC
	Noise bandwidth	RATE

All of these commands are described in detail below.

ADEP(?){d} AM Modulation Depth

Set (query) the AM modulation depth {to d} in percent.

Note: see ANDP command if noise is the selected modulation function.

Example

ADEP 90.0 Set the depth to 90 %.

ADEP? Query the current depth in percent.

ANDP(?){d} AM Noise Modulation Depth

Set (query) the AM noise modulation depth {to d} in percent. The value controls the rms depth of the modulation, not the peak deviation as the ADEP command does.

Note: see ADEP command for all modulation functions other than noise.

Example

ANDP 10.0 Set the rms noise depth to 10 %.

ANDP? Query the current rms noise depth in percent.

COUP(?){i} Modulation Coupling

Set (query) the coupling of the external modulation input {to i}. If i is 0, the input is AC coupled. If i is 1, the input is DC coupled. This setting has no affect on the input if pulse modulation is active. In that case the coupling is always DC.

FDEV(?){f}[u] FM Deviation

Set (query) the FM deviation {to f}. If omitted, units default to Hz.

Note: see FNDV command if noise is the selected modulation function.

Example

FDEV 10e3 Set the FM deviation to 10 kHz.

FDEV? Query the current FM deviation in Hz.

FDEV 1 kHz Set the FM deviation to 1 kHz.

FNDV(?){f}[u] FM Noise Deviation

Set (query) the FM noise deviation {to f}. If omitted, units default to Hz. The value controls the rms deviation of the modulation, not the peak deviation as the FDEV command does.

Note: see FDEV command for all modulation functions other than noise.

Example

FNDV 10e3 Set the rms FM noise deviation to 10 kHz.

FNDV? Query the current rms FM noise deviation in Hz.

FNDV 1 kHz Set the rms FM noise deviation to 1 kHz.

MFNC(?){i} Modulation Function for AM/FM/ΦM

Set (query) the modulation function or AM/FM/ M {to i}. The parameter i may be set to one of the following values:

i Modulation Function
0 Sine wave
1 Ramp
2 Triangle
3 Square
4 Noise
5 External

Note: see SFNC, PFNC, and QFNC commands for sweeps, pulse/blank, and IQ modulations respectively.

MODL(?){i} Modulation Enable

Set (query) the enable state of modulation {to i}. If i is 0, modulation is disabled. If i is 1, modulation is enabled. This command may fail if the current modulation type is not allowed at current settings. For example, pulse modulation is not allowed at frequencies where the RF doubler is active.

PDEV(?){p} ΦM Deviation

Set (query) the M deviation {to p } in degrees.

Note: see PNDV command if noise is the selected modulation function.

Example

PDEV 45.0 Set the M deviation to 45.0 degrees.

PDEV? Query the current M deviation.

PDTY(?){d} Pulse/Blank Duty Factor

Set (query) the duty factor for pulse/blank modulation {to d} in percent. This value controls pulse modulation when the selected waveform is square (see PFNC). Use PWID? to determine the actual pulse width in time.

Example

PDTY 10 Set the duty factor to 10 %.

PDTY? Query the current duty factor.

PFNC(?){i} Pulse Modulation Function

Set (query) the modulation function for pulse/blank modulation {to i}. The parameter i may be set to one of the following values:

i Modulation Function
3 Square
4 Noise (PRBS)
5 External

Note: see MFNC, SFNC, and QFNC commands for AM/FM/ M, sweeps, and IQ modulations respectively.

PNDV(?){p} ΦM Noise Deviation

Set (query) the M noise deviation {to p} in degrees. The value controls the rms deviation of the modulation, not the peak deviation as the PDEV command does.

Note: see PDEV command for all modulation functions other than noise.

Example

PNDV 10.0 Set the rms M noise deviation to 10.0 degrees.

PNDV? Query the current rms M noise deviation.

PPER(?){t}[u] Pulse/Blank Period

Set (query) the pulse/blank modulation period {to t}. If omitted, units default to seconds. This value controls pulse modulation when the selected waveform is square (see PFNC).

Example

PPER 1e-3 Set the pulse period to 1 ms.

PPER? Query the current pulse period in seconds.

PRBS(?){i} PRBS Length for Pulse/Blank Modulation

Set (query) the PRBS length for pulse/blank modulation {to i}. The parameter i may range from 8 to 19. It defines the number of bits in the PRBS generator. A value of 8, for example, means the generator is 8 bits wide. It will generate a sequence of pseudo random bits which repeats every 2^8-1 bits. This value controls pulse modulation when the selected waveform is noise (see PFNC).

Example

PRBS 10 Set the PRBS length to 10.

PRBS? Query the current PRBS length.

PWID(?){t}[u] Pulse/Blank Width

Set (query) the pulse/blank modulation width (duty cycle) {to t}. If omitted, units default to seconds. This value controls pulse modulation when the selected waveform is square (see PFNC).

Example

PWID 1e-6 Set the pulse width to 1 s.

PWID? Query the current pulse width in seconds.

QFNC(?){i} IQ Modulation Function

Set (query) the modulation function for IQ modulation {to i}. The parameter i may be set to one of the following values:

i	Modulation Function
4	Noise
5	External

Note: see MFNC, SFNC, and PFNC commands for AM/FM/ M, sweeps, and pulse/blank modulations respectively.

RATE(?){f}[u] Modulation Rate for AM/FM/ΦM

Set (query) the modulation rate for AM/FM/ M {to f}. If omitted, units default to Hz. This command also controls the noise bandwidth for AM/FM/ M and IQ modulation if a noise function is selected for the given type of modulation.

Note: use the SRAT command to control the sweep rates.

Example

RATE 400 Set the modulation rate to 400 Hz.

RATE 10 kHz Set the rate to 10 kHz.

RATE? Query the current rate in Hz.

RATE? kHz Query the current rate in kHz.

RPER(?){t}[u] PRBS Period for Pulse/Blank Modulation

Set (query) the PRBS period for pulse/blank modulation{to t}. If omitted, units default to seconds. This value controls pulse modulation when the selected waveform is noise (see PFNC).

Example

RPER 1e-3 Set the bit period to 1 ms.

RPER? Query the current bit period in seconds.

SDEV(?){f}[u] Sweep Deviation

Set (query) the deviation for sweeps {to f}. If omitted, units default to Hz. The limits for sweep deviations are controlled by the edges of the band within which the synthesizer is operating. Sweep deviations may be as large as 1 GHz in the 2 to 4 GHz band.

Example

SDEV 100e6 Set the sweep deviation to 100 MHz.

SDEV? Query the current sweep deviation in Hz.

SDEV 1 MHz Set the sweep deviation to 1 MHz.

SFNC(?){i} Sweep Modulation Function

Set (query) the modulation function for sweeps {to i}. The parameter i may be set to one of the following values:

i Modulation Function

0 Sine wave

1 Ramp

2 Triangle

5 External

Note: see MFNC, PFNC, and QFNC commands for AM/FM/ M, pulse/blank, and IQ modulations respectively.

SRAT(?){f}[u] Modulation Sweep Rate

Set (query) the modulation rate for sweeps {to f}. If omitted, units default to Hz. Note: use the RATE command to control the modulation rate of AM/FM/ M.

Example

SRAT 10

Set the sweep rate to 10 Hz.

SRAT?

Query the current rate in Hz.

TYPE(?){i} Modulation Type

Set (query) the current modulation type {to i}. The parameter i may be set to one of the following values:

i Modulation Type
0 AM
1 FM
2 ΦΜ
3 Sweep
4 Pulse
5 Blank
6 IQ (if option 3 is installed)

Example

TYPE 2 Set the modulation type to phase modulation.

List Commands

For detailed information on creating and defining lists, see the section List Mode later in this chapter. Basic steps for using lists are summarized in Table 31.

Table 31: Basic List Configuration

Action	Relevant Commands
Create list	LSTC
Set instrument state for each list entry	LSTP
Enable list	LSTE
Trigger list	*TRG or GPIB bus trigger
Delete list	LSTD

All of these commands are described in detail below.

LSTC? i List Create

Create a list of size i. If successful, 1 is returned, otherwise 0 is returned. The list is initialized to the no change state.

Example

LSTC? 20 Create a list of size 20. Returns 1 if successful, otherwise 0.

LSTD List Delete

Delete the current list and free any memory dedicated to it.

Example

LSTD Destroy a previously created list.

LSTE(?){i} List Enable

Set (query) the list enable state {to i}. If i is 1, the list is enabled. If i is 0 it is disabled. A list must be enabled before it can be triggered.

Example

LSTE 1 Enable a previously created list.
LSTE? Query the current enable state of the list.

LSTI(?){i} List Index

Set (query) the current list index pointer {to i}. The list index identifies the entry whose state will be loaded into the instrument upon the next valid trigger.

Example

LSTI 10 Set the list index to 10. LSTI? Query the current list index.

LSTP(?) i {,} List Point

Set (query) the instrument state stored in entry i of the list {to }. Details on the format and meaning of instrument states are discussed above in the section List Instrument States.

Example

LSTP 5, 100e6,N,N,N,N,N,N,N,N,N,N,N,N,N,N,N Set list entry 5 in the list to change the frequency to 100 MHz but leave all other settings unchanged.

LSTP? 5 Query instrument state stored in list entry 5.

LSTR List Reset

Reset the list index to zero.

LSTS? List Size

Query the current list size. This is the size requested when the list was created with the LSTC? command.

Interface Commands

EMAC? Ethernet MAC Address

Query the Ethernet MAC address.

EPHY(?){i} Ethernet Physical Layer Configuration

Set (query) the Ethernet link speed {to i}. The parameter i may be one of the following:

i Link Speed
0 10 Base T
1 100 Base T

Example

EPHYS 1 Configure link for 100 Base T operation.

IFCF(?)i{,j} Interface Configuration

Set (query) interface configuration parameter i {to j}. The parameter i may be one of the following:

i Configuration Parameter
0 RS-232 Enable/Disable
1 RS-232 Baud Rate
2 GPIB Enable/Disable
3 GPIB Address
4 LAN TCP/IP Enable/Disable.
5 DHCP Enable/Disable
6 Auto-IP Enable/Disable
7 Static IP Enable/Disable
8 Bare Socket Enable/Disable
9 Telnet Enable/Disable
10 VXI-11 Net Instrument Enable/Disable
11 Static IP Address
12 Subnet Address/Network Mask
13 Default Gateway

Set j to 0 to disable a setting and 1 to enable it. Valid RS-232 baud rates include 4800, 9600, 19200, 38400, 57600, and 115200. Valid GPIB addresses are in the range 0–30. Parameters 10–12 require an IP address in the form ‘a.b.c.d’ where each letter is a decimal integer in the range 0–255.

Example

IFCF 6,0 Disable Auto-IP

IFCF 1,19200 Set RS-232 baud rate to 19200

IFCF 3,16 Set primary GPIB address to 16

IFCF 11,192.168.10.5 Set IP address to 192.168.10.5

IFCF 12,255.255.255.0 Set network mask to 255.255.255.0

IFCF 13,192.168.10.1 Set default gateway to 192.168.10.1

IFRS i Interface Reset

Reset interface i. The parameter i identifies the interface to reset:

i Interface
0 RS-232
1 GPIB
2 LAN TCP/IP

When an interface is reset all connections on that interface are reset to the power-on state.

IPCF? i Active TCP/IP Configuration

Query active TCP/IP configuration parameter i. The parameter i may be one of the following:

i Configuration
0 Link
1 IP Address
2 Subnet Address/Network Mask
3 Default Gateway

The link parameter indicates whether the unit is physically connected to the LAN/Ethernet network. A value of 1 indicates the unit is connected. The rest of the parameters indicate the current TCP/IP configuration that was selected by the appropriate configuration process: DHCP, Auto-IP, or Static IP.

LCAL Go to Local

Go back to local control of the instrument. This enables the front panel key pad for instrument control. This command is only active on raw socket, telnet and RS-232 connections. The other interfaces have built in functionality for implementing this functionality.

LOCK? Request Lock

Request the instrument lock. The unit returns 1 if the lock is granted and 0 otherwise. When the lock is granted, no other instrument interface, including the front panel interface, may alter instrument settings until the lock is released via the UNLK command.

REMT Go to Remote

Enable remote control of the instrument. In this mode, the front panel key pad is disabled, so that control of the instrument can only occur via the remote interface. This command is only active on raw socket, telnet and RS-232 connections. The other interfaces have built in functionality for implementing this functionality.

UNLK? Release Lock

Release the instrument lock previously acquired by the LOCK? command. Returns 1 if the lock was released, otherwise 0.

XTRM i{,j,k} Interface Terminator

Set the interface terminator that is appended to each response to i, j, k. The default terminator is 13, 10, which is a carriage return followed by a line feed.

Status Byte Definitions

The instrument reports on its status by means of the serial poll status byte and two event status registers: the standard event status (*ESR) and the instrument event status (INSR). These read-only registers record the occurrence of defined events inside the unit. If the event occurs, the corresponding bit is set to one. Bits in the status registers are latched. Once an event bit is set, subsequent state changes do not clear the bit. All bits are cleared when the registers are queried, with a *ESR?, for example. The bits are also cleared with the clear status command, *CLS. The bits are not cleared, however, with an instrument reset (*RST) or a device clear.

Each of the unit's event status registers has an associated enable register. The enable registers control the reporting of events in the serial poll status byte (*STB). If a bit in the event status register is set and its corresponding bit in the enable register is set, then the summary bit in the serial poll status byte (*STB) will be set. The enable registers are readable and writable. Reading the enable registers or clearing the status registers does not clear the enable registers. Bits in the enable registers must be set or cleared explicitly. To set bits in the enable registers, write an integer value equal to the binary weighted sum of the bits you wish to set.

The serial poll status byte (*STB) also has an associated enable register called the service request enable register (*SRE). This register functions in a similar manner to the other enable registers, except that it controls the setting of the master summary bit (bit 6) of the serial poll status byte. It also controls whether the unit will issue a request for service on the GPIB bus.

Serial Poll Status Byte

Bit	Name	Meaning
0	INSB	An unmasked bit in the instrument status register (INSR) has been set.
1	Reserved
2	Reserved
3	Reserved
4	MAV	The interface output buffer is non-empty
5	ESB	An unmasked bit in the standard event status register (*ESR) has been set.
6	MSS	Master summary bit. Indicates that the instrument is requesting service because an unmasked bit in this register has been set.
7	Reserved

The serial poll status byte may be queried with the *STB? command. The service request enable register (*SRE) may be used to control when the instrument asserts the request-for-service line on the GPIB bus.

Standard Event Status Register

Bit	Name	Meaning
0	OPC	Operation complete. All previous commands have completed. See command *OPC.
1	Reserved
2	QYE	Query error occurred.
3	DDE	Device dependent error occurred.
4	EXE	Execution error. A command failed to execute correctly because a parameter was invalid.
5	CME	Command error. The parser detected a syntax error.
6	Reserved
7	PON	Power on. The unit has been power cycled.

The standard event status register may be queried with the *ESR? command. The standard event status enable register (*ESE) may be used to control the setting of the ESB summary bit in the serial poll status byte.

Instrument Status Register

Bit	Name	Meaning
0	20MHZ_UNLK	The 20 MHz PLL has come unlocked.
1	100MHZ_UNLK	The 100 MHz PLL has come unlocked.
2	19MHZ_UNLK	The 19 MHz PLL has come unlocked.
3	1GHZ_UNLK	The 1 GHz PLL has come unlocked.
4	4GHZ_UNLK	The 4 GHz PLL has come unlocked.
5	NO_TIMEBASE	An installed optional timebase is not oscillating.
6	RB_UNLK	An installed Rubidium timebase is unlocked.
7	Reserved
8	MOD_OVLD	An external modulation overload was detected.
9	IQ_OVLD	An external IQ modulation overload was detected.
10-15	Reserved

The instrument status register may be queried with the INSR? command. The instrument status enable register (INSE) may be used to control the setting of the INSB summary bit in the serial poll status byte.

List Mode

The instrument supports a powerful list mode, only available via the remote interface, which enables the user to store a list of instrument states in memory and quickly switch between states by sending GPIB bus triggers or the *TRG command.

List Instrument States

At the heart of the list configuration is the instrument state which should be loaded upon the reception of each valid trigger. The instrument state is downloaded to the unit via the command: LSTP i {,}. The parameter i is the index identifying the list entry to which the instrument state, , should be stored. The instrument state, , consists of an ordered, comma-separated list of 15 values. The order and description of each value is summarized in Table 32.

Also listed in the table are related, non-list, commands that also change the given instrument state. For example, frequency is the first parameter. Entering a value here would change the carrier frequency to the given value just as the FREQ command would do.

The parameter for each state is set with a floating point value or integer in the default units as specified by the related commands. For example, entering a 100e6 in the first position would set the frequency to 100 MHz.

Although, all parameters in must be specified, each parameter may be specified as 'N' to leave the parameter unchanged. Thus, to leave all parameters unchanged, set the state as follows:

$$ < \text { All unchanged } > = N, N, N, N, N, N, N, N, N, N, N, N, N, N $$

This is the default for all entries when a list is created. To change just one item, simply specify that one item and leave all others unchanged. For example, to only change the BNC output amplitude use the following state:

$$ < \text { BNC ampl }: - 2 \mathrm{dBm} > = \mathrm{N}, \mathrm{N}, - 2. 0 0, \mathrm{N}, \mathrm{N}, \mathrm{N}, \mathrm{N}, \mathrm{N}, \mathrm{N}, \mathrm{N}, \mathrm{N}, \mathrm{N}, \mathrm{N} $$

Performing scans of frequency or amplitude consists of storing successive instrument list states in which only the frequency is changed, or only the amplitude is changed, respectively. To scan frequency and amplitude simultaneously, simply specify both frequency and amplitude for each state. For example, to change the frequency to 10 MHz and the BNC output to -2 dBm use the following state:

$$ < \text { Freq. and BNC ampl } > = 1 0 e 6, N, - 2. 0 0, N, N, N, N, N, N, N, N, N, N $$

If a given setting happens to be invalid when the triggered state occurs, the parameter will be ignored. This might happen, for instance, if one tries to enable pulse modulation with the frequency set to 7 GHz.

Table 32: List State Definitions

Position	Instrument State	Related Commands
1	Frequency	FREQ
2	Phase	PHAS
3	Amplitude of LF (BNC output)	AMPL
4	Offset of LF (BNC output)	OFSL
5	Amplitude of RF (Type-N output)	AMPR
6	Front panel display	DISP
7	Enables/Disables
	Bit 0: Enable modulation	MODL
	Bit 1: Disable LF (BNC output)	ENBL
	Bit 2: Disable RF (Type-N output)	ENBR
	Bit 3: Disable Clock output	ENBC
	Bit 4: Disable HF (RF doubler output)	ENBH
8	Modulation type	TYPE
9	Modulation function
	AM/FM/ ΦM	MFNC
	Sweep	SFNC
	Pulse/Blank	PFNC
	IQ	QFNC
10	Modulation rate
	AM/FM/ΦM modulation rate	RATE
	Sweep rate	SRAT
	Pulse/Blank period	PPER, RPER
11	Modulation deviation
	AM	ADEP, ANDP
	FM	FDEV, FNDV
	ΦM	PDEV, PNDV
	Sweep	SDEV
	Pulse/Blank	PWID
12	Amplitude of clock output	AMPC
13	Offset of clock output	OFSC
14	Amplitude of HF (RF doubler output)	AMPH
15	Offset of rear DC	OFSD

Enables/Disables

The enables/disables setting at position 7 in the state list is different from the others in that multiple commands are aggregated into one value and the polarities of the disables are opposite to that of their corresponding commands. Modulation enable is assigned to bit 0. The output disables are assigned to bits 1 to 4. The enable/disables value is then calculated as the binary weighted sum of all the bits.

For example, to enable modulation and disable the clock and RF doubler outputs, we need to set bits 0, 3, and 4. The binary weighted sum is given as 2^0 + 2^3 + 2^4 = 1 + 8 + 16 = 25 . Thus, a value of 25 in position 7 would enable the modulation and disable the clock and RF doubler outputs.

Modulation List States

Virtually all modulation parameters may be specified as part of a list state, but not simultaneously. In order to compress the size of the list, many parameters share the same position as indicated in Table 19. Thus, in order to untangle which parameters are being specified, the modulation type must be specified. Furthermore, if modulation rate or deviation is specified, then both the modulation type and modulation function must also be specified.

For example, to set AM sine wave modulation depth to 25 %, specify the list state as follows:

= N,N,N,N,N,N,N,0,0,N,25.0,N,N,N,N

Similarly, to set FM sine wave modulation deviation to 100 kHz, specify the list state as follows:

= N,N,N,N,N,N,N,1,0,N,100e3,N,N,N,N

Specify a frequency sweep of 100 MHz at a 10 Hz rate with a 750 MHz carrier and modulation enabled as follows:

= 750e6,N,N,N,N,N,1,3,1,10.0,100e6,N,N,N,N

Specify pulse modulation with a 1 ms period and 10 s width as follows:

= N,N,N,N,N,N,N,4,3,1e-3,10e-6,N,N,N,N

Note that although the modulation type and modulation function must usually be specified together, the modulation itself need not necessarily be enabled. Thus, one could configure the modulation in one list entry and enable it in another entry.

Examples

Example 1: Scan frequency from 100 MHz to 1 GHz in 100 MHz steps.

LSTC? 10

LSTP 0,100e6,N,N,N,N,N,N,N,N,N,N,N,N,N,N,N,LSTP 1,200e6,N,N,N,N,N,N,N,N,N,N,N,N,N,N,LSTP 2,300e6,N,N,N,N,N,N,N,N,N,N,N,N,N,N,LSTP 3,400e6,N,N,N,N,N,N,N,N,N,N,N,N,N,N,LSTP 4,500e6,N,N,N,N,N,N,N,N,N,N,N,N,N,N,LSTP 5,600e6,N,N,N,N,N,N,N,N,N,N,N,N,N,LSTP 6,700e6,N,N,N,N,N,N,N,N,N,N,N,N,N,LSTP 7,800e6,N,N,N,N,N,N,N,N,N,N,N,N,N,LSTP 8,900e6,N,N,N,N,N,N,N,N,N,N,N,N,N,LSTP 9,1000e6,N,N,N,N,N,N,N,N,N,N,N,N,N,N,LSTE 1

Example 2: Scan RF Type-N output from 10 dBm to -10 dBm in 5 dBm steps.

LSTC? 5

LSTP 0,N,N,N,N,10.0,N,N,N,N,N,N,N,N,N,N,LSTP 1,N,N,N,N,5.0,N,N,N,N,N,N,N,N,N,N,LSTP 2,N,N,N,N,0.0,N,N,N,N,N,N,N,N,N,LSTP 3,N,N,N,N,-5.0,N,N,N,N,N,N,N,N,N,N,LSTP 4,N,N,N,N,-10.0,N,N,N,N,N,N,N,N,N,N,LSTE 1

Example 3: Configure pulse modulation with 1 ms period and scan the width from 100 s to 900 s in 100 s steps.

LSTC? 9

LSTP 0,N,N,N,N,N,N,1,4,3,1e-3,100e-6,N,N,N,N

LSTP 1,N,N,N,N,N,N,N,4,3,N,200e-6,N,N,N,N

LSTP 2,N,N,N,N,N,N,N,4,3,N,300e-6,N,N,N,N

LSTP 3,N,N,N,N,N,N,N,4,3,N,400e-6,N,N,N,N

LSTP 4,N,N,N,N,N,N,N,4,3,N,500e-6,N,N,N,N

LSTP 5,N,N,N,N,N,N,4,3,N,600e-6,N,N,N,N

LSTP 6,N,N,N,N,N,N,4,3,N,700e-6,N,N,N,N

LSTP 7,N,N,N,N,N,N,4,3,N,800e-6,N,N,N,N

LSTP 8,N,N,N,N,N,N,4,3,N,900e-6,N,N,N,N

LSTE 1

Example 4: Configure AM modulation at1 kHz rate and scan the depth from 25 % to 100 % in 25 % steps.

LSTC? 4

LSTP 0,N,N,N,N,N,N,1,0,0,1e3,25,N,N,N,N

LSTP 1,N,N,N,N,N,N,N,0,0,N,50,N,N,N,N

LSTP 2,N,N,N,N,N,N,N,0,0,N,75,N,N,N,N

LSTP 3,N,N,N,N,N,N,N,0,0,N,100,N,N,N,N

LSTE 1

Error Codes

The instrument contains an error buffer that may store up to 20 error codes associated with errors encountered during power-on self tests, command parsing, or command execution. The ERR LED will be highlighted when a remote command fails for any reason. The errors in the buffer may be read one by one by executing successive LERR? commands. The user may also view the errors from the front panel by pressing the keys [SHIFT], 'STATUS', sequentially, followed by ADJUST △ until the display reads 'Error Status.' Finally, press SELECT ▷ successively to view the error count and individual errors. The errors are displayed in the order in which they occurred. The ERR LED will go off when all errors have been retrieved.

The meaning of each of the error codes is described below.

Execution Errors

0 No Error

No more errors left in the queue.

10 Illegal Value

A parameter was out of range.

11 Illegal Mode

The action is illegal in the current mode. This might happen, for instance, if the user tries to turn on IQ modulation with the 'MODL 1' command and the current frequency is below 400 MHz.

12 Not Allowed

The requested action is not allowed because the instrument is locked by another interface.

13 Recall Failed

The recall of instrument settings from nonvolatile storage failed. The instrument settings were invalid.

14 No Clock Option

The requested action failed because the rear clock option is not installed.

15 No RF Doubler Option

The requested action failed because the rear RF doubler option is not installed.

16 No IQ Option

The requested action failed because the rear IQ option is not installed.

17 Failed Self Test

This value is returned by the *TST? command when the self test fails.

Query Errors

30 Lost Data

Data in the output buffer was lost. This occurs if the output buffer overflows or if a communications error occurs and data in output buffer is discarded.

32 No Listener

This is a communications error that occurs if the unit is addressed to talk on the GPIB bus, but there are no listeners. The unit discards any pending output.

Device Dependent Errors

40 Failed ROM Check

The ROM checksum failed. The firmware code is likely corrupted.

42 Failed EEPROM Check

The test of EEPROM failed.

43 Failed FPGA Check

The test of the FPGA failed.

44 Failed SRAM Check

The test of the SRAM failed.

45 Failed GPIB Check

The test of GPIB communications failed.

46 Failed LF DDS Check

The test of the LF DDS communications failed.

47 Failed RF DDS Check

The test of the RF DDS communications failed.

48 Failed 20 MHz PLL

The test of the 20 MHz PLL failed.

49 Failed 100 MHz PLL

The test of the 100 MHz PLL failed.

50 Failed 19 MHz PLL

The test of the 19 MHz PLL failed.

51 Failed 1 GHz PLL

The test of the 1 GHz PLL failed.

52 Failed 4 GHz PLL

The test of the top octave PLL failed.

53 Failed DAC

The test of the internal DACs failed.

Parsing Errors

110 Illegal Command

The command syntax used was illegal. A command is normally a sequence of four letters, or a '*' followed by three letters.

111 Undefined Command

The specified command does not exist.

112 Illegal Query

The specified command does not permit queries

113 Illegal Set

The specified command can only be queried.

114 Null Parameter

The parser detected an empty parameter.

115 Extra Parameters

The parser detected more parameters than allowed by the command.

116 Missing Parameters

The parser detected missing parameters required by the command.

117 Parameter Overflow

The buffer for storing parameter values overflowed. This probably indicates a syntax error.

118 Invalid Floating Point Number

The parser expected a floating point number, but was unable to parse it.

120 Invalid Integer

The parser expected an integer, but was unable to parse it.

121 Integer Overflow

A parsed integer was too large to store correctly.

122 Invalid Hexadecimal

The parser expected hexadecimal characters but was unable to parse them.

126 Syntax Error

The parser detected a syntax error in the command.

127 Illegal Units

The units supplied with the command are not allowed.

128 Missing Units

The units required to execute the command were missing.

Communication Errors

170 Communication Error

A communication error was detected. This is reported if the hardware detects a framing, or parity error in the data stream.

171 Over run

The input buffer of the remote interface overflowed. All data in both the input and output buffers will be flushed.

Other Errors

254 Too Many Errors

The error buffer is full. Subsequent errors have been dropped.

Example Programming Code

The following program can be used as sample code for communicating with the instrument over TCP/IP. The program is written in the C++ language and should compile correctly on a Windows based computer. It could be made to work on other platforms with minor modifications. In order to use the program, you will need to connect the unit to your LAN and configure it with an appropriate IP address. Contact your network administrator for details on how to do this. To identify the unit's current IP address from the front panel press [SHIFT], [STATUS], then repeat press until the 'tcp ip status' menu appears. Finally press the [] [] to sequence to the 'ip' address.

Copy the program into a file named "sg_ctrl.cpp". To avoid typing in the program manually, download the electronic version of this manual from the SRS website (www.thinksrs.com). Select the program text and copy/paste it into the text editor of your choice. Compile the program into the executable "sg_ctrl.exe". At the command line type something like the following:

sg_ctrl 192.168.0.5

where you will replace "192.168.0.5" with the IP address of the unit. You should see the something like the following:

Connection Succeeded

Stanford Research Systems, SG384, s/n001013, ver1.00.10A

Closed connection

The program connects to the unit at the supplied IP address sets several parameters and then closes. If successful, the frequency should be set to 50 MHz and the amplitudes of Type-N and BNC outputs will be set to -10 and -5 dBm, respectively.

/* sg_ctrl.c : Sample program for controlling the SG384 via TCP/IP */
#include "Winsock2.h"
#include <stdio.h>

/* prototypes */
void init_tcpip(void);
int sg_connect(unsigned long ip);
int sg_close(void);
int sg_write(char *str);
int sg_write_bytes(const void *data, unsigned num);
int sg_read(char *buffer, unsigned num);

SOCKET sSG384;    /* sg384 tcpip socket */
unsigned sg_timeout = 6000;    /* Read timeout in milliseconds */

int main(int argc, char * argv[])
{
    char buffer[1024];

    /* Make sure ip address is supplied on the command line */
    if (argc < 2) {
    printf("Usage: sg_ctrl IP_ADDRESS\n");
    exit(1);
    }

    /* Initialize the sockets library */
    init_tcpip();

    /* Connect to the sg384 */
    if (sg_connect(inet_addr(argv[1])) ) {
    printf("Connection Succeeded\n");

    /* Get identification string */
    sg_write("*idn?\n");
    if (sg_read(buffer,sizeof(buffer)) )
    printf(buffer);
    else 
    printf("Timeout\n");
    /* Reset instrument */
    sg_write("*rst\n");
    /* Set frequency to 50 MHz */
    sg_write("freq 50e6\n");
    /* Set amplitude of Type-N output to -10 dBm */
    sg_write("ampr -10.0\n");
    /* Set amplitude of BNC output to -5 dBm */
    sg_write("ampl -5.0\n");
    /* Make sure all commands have executed before closing connection */
    sg_write("*opc?\n");
    if (!sg_read(buffer,sizeof(buffer)) )
    printf("Timeout\n");
    /* Close the connection */
    if (sg_close())
    printf("Closed connection\n");
    else 
    printf("Unable to close connection");
    }
    else 
    printf("Connection Failed\n");

return 0;
} 

void init_tcpip(void)
{
    WSADATA wsadata;
    if (WSAStartup(2, &wsadata) != 0) {
    printf("Unable to load windows socket library\n");
    exit(1);
    }
}

int sg_connect(unsigned long ip)
{
    /* Connect to the sg384 */
    struct sockaddr_in intrAddr;
    int status;

    sSG384 = socket(AF_INET,SOCK_STREAM,0);
    if (sSG384 == INVALID_SOCKET)
    return 0;

    /* Bind to a local port */
    memset(&intrAddr,0,sizeof(intrAddr));
    intrAddr.sin_family = AF_INET;
    intrAddr.sin_port = htons(0);
    intrAddr.sin_addr.S_un.S_addr = htonl(INADDR_ANY);
    if (SOCKET_ERROR == bind(sSG384,(const struct sockaddr *)&intrAddr,sizeof(intrAddr))) {
    closesocket(sSG384);
    sSG384 = INVALID_SOCKET;
    return 0;
    }

    /* Setup address for the connection to sg on port 5025 */
    memset(&intrAddr,0,sizeof(intrAddr));
    intrAddr.sin_family = AF_INET;
    intrAddr.sin_port = htons(5025);
    intrAddr.sin_addr.S_un.S_addr = ip;
    status = connect(sSG384,(const struct sockaddr *)&intrAddr,sizeof(intrAddr));
    if (status) {
    closesocket(sSG384);
    sSG384 = INVALID_SOCKET;
    return 0;
    }
    return 1;
}

int sg_close(void)
{
    if (closesocket(sSG384) != SOCKET_ERROR)
    return 1;
    else
    return 0;
}

int sg_write(char *str)
{
    /* Write string to connection */
    int result;

    result = send(sSG384,str,(int)strlen(str),0);
    if (SOCKET_ERROR == result)
    result = 0;
    return result;
} 

int sg_write_bytes(const void *data, unsigned num)
{
    /* Write string to connection */
    int result;

    result = send(sSG384, (const char *)data, (int)num, 0);
    if ( SOCKET_ERROR == result )
    result = 0;
    return result;
}

int sg_read(char *buffer, unsigned num)
{
    /* Read up to num bytes from connection */
    int count;
    fd_set_setRead, overwrite, 도 Except;
    TIMEVAL tm;

    /* Use select() so we can timeout gracefully */
    tm.tv_sec = sg_timeout / 1000;
    tm.tv_usec = (sg_timeout % 1000) * 1000;

    FD_ZERO(&setRead);
    FD_ZERO(&ReadWrite);
    FD_ZERO(&setExcept);
    FD_SET(sSG384, &setRead);
    count = select(0, &setRead, &setWrite, &setExcept, &tm);
    if ( count == SOCKET_ERROR ) {
    printf("select failed: connection aborted\n");
    closesocket(sSG384);
    exit(1);
    }
    count = 0;
    if ( FD_ISSET(sSG384, &setRead) ) {
    /* We've received something */
    count = (int)recv(sSG384, buffer, num - 1, 0);
    if ( SOCKET_ERROR == count ) {
    printf("Receive failed: connection aborted\n");
    closesocket(sSG384);
    exit(1);
    }
    else if (count ) {
    buffer[count] = '\0';
    }
    else {
    printf("Connection closed by remote host\n");
    closesocket(sSG384);
    exit(1);
    }
    }
    return count;
} 

SG380 Series Operation Verification

Overview

The operation of a SG380 series RF signal generator may be evaluated by running a series of tests designed to measure the accuracy of its inputs and outputs and comparing the results with their associated specifications. While the verification tests presented here are not as extensive as the tests performed at the factory, one can nevertheless have confidence that a unit that passes these tests is functioning properly and within specification.

The verification tests can be divided into three broad categories: output driver tests, frequency synthesis tests, and timebase calibration tests. A brief test procedure for each of the option boards is also included. The output driver tests are designed to test the integrity and accuracy of the front panel outputs by measuring the output power of the BNC and Type-N outputs. The frequency synthesis tests verify the overall frequency generation at various points in the spectrum from DC to 6 GHz. Lastly, the timebase calibration tests evaluate the accuracy and stability of the installed timebase.

Please allow the instrument under test to warm up for 1 hour before testing it to a specification.

Equipment Required

In addition to the SG380 series RF signal generator under test, the following equipment will be required to carry out the performance tests:

• Agilent U2004A power meter: 9 kHz to 6 GHz
• Agilent E4440A PSA Spectrum Analyzer
• Agilent DSO-X-2014A oscilloscope
• Agilent 34410A DVM
• SRS DS345 function generator
• SRS FS725 rubidium frequency standard
• SRS SR620 time interval counter

Equivalent equipment may be substituted as desired as long as they have similar or superior specifications. Standard BNC and shielded SMA and Type-N cables will be required to connect the test equipment to the SG380 series generators. Additionally accessories required include 50 terminators and various adapters.

SG380 Series Self Test

The SG380 series RF signal generators include a self test that checks the functional operation of many important internal components. If any of the tests fail, the unit will briefly display “Failed” after the test.

The SG380 series self test may be executed from the front panel by performing the following steps:

1. Press the keys [SHIFT], [0], and [Hz] to reset the instrument to default settings.
2. Press the keys [SHIFT], [2], ADJUST [△], and [Hz] to run the self test.

The self test may also be run by sending the commands *RST;*TST? over a remote interface. If the unit passes it will return 0 over the remote interface. If it fails, it will return 17. Further information about the specific tests that failed may be accessed from the front panel by pressing the keys [SHIFT], [2] and pressing ADJUST [△] until the display reads "Error Status." Press SELECT [▷] successively to view each error code. The error codes are detailed in the Remote Programming section of the operation manual.

Output Power Tests

The output power tests are intended to test the integrity of the SG380 series output blocks. They test the output power of the front panel BNC and Type-N outputs at various frequencies.

BNC Output Power Test

The BNC output power test requires the setup shown in Figure 4. The power meter plus adapter should be connected directly to the BNC output with no intervening cable.

Agilent U2004A Power Meter BNC to Type-N Adapter SG38X BNC Type-N

Figure 4: BNC output power test setup

To verify the integrity of the BNC output, perform the following procedures:

1. Before attaching the power meter to the SG380 series unit under test, calibrate and zero the power meter.
2. Attach the power meter to the SG380 series unit under test.
3. Set the calibration frequency for the power meter to the test frequency given in Table 33.
4. On the SG380 series generator, press the keys [SHIFT], [0], and [Hz] to reset the instrument to default settings.

5. Press [FREQ] to select frequency. Then enter the test frequency given in Table 33.

6. Press [AMPL] until the display shows "bnc". Then enter the power setting given in Table 33.

7. Record the power reported by the power meter. Verify that it is within the stated limits.
8. Repeat step 3 followed by steps 5 through 7 for each frequency and power setting in Table 33.

Table 33: Power level requirements for the BNC output

Frequency	Power Setting (dBm)	Measured Power (dBm)	Limits (dB)
10 MHz	10.0		±2
	5.0		±2
	0.0		±2
	-5.0		±2
	-10.0		±2
50 MHz	10.0		±2
	5.0		±2
	0.0		±2
	-5.0		±2
	-10.0		±2

Type-N Output Power Test

The Type-N output power test requires the setup shown in Figure 5. The power meter should be attached directly to the Type-N output of the SG380 series unit under test with no intervening cable

graph LR
    A["Agilent U2004A\nPower Meter"] --> B["SG38X"]
    B --> C["BNC\nType-N"]

Figure 5: Type-N output power test setup

To verify the integrity of the Type-N output perform the following procedures:

1. Before attaching the power meter to the SG380 series unit under test, calibrate and zero the power meter.
2. Attach the power meter to the SG380 series unit under test.
3. Set the calibration frequency for the power meter to the test frequency given in Table 34.
4. On the SG380 series generator, press the keys [SHIFT], [0], and [Hz] to reset the instrument to default settings.
5. Press [FREQ] to select frequency. Then enter the test frequency given in Table 34.

6. Press [AMPL] until the display shows “ntype”. Then enter the power setting given in Table 34.

7. Record the power reported by the power meter. Verify that it is within the stated limits.

8. Repeat step 3, followed by steps 5 through 7 for each frequency and power setting in Table 34.

Table 34: Power level requirements for the Type-N output

Frequency	Power Setting (dBm)	Measured Power (dBm)	Limits (dB)
50 MHz	10.0		±2
	5.0		±2
	0.0		±2
	-5.0		±2
	-10.0		±2
100 MHz	10.0		±2
	5.0		±2
	0.0		±2
	-5.0		±2
	-10.0		±2
250 MHz	10.0		±2
	5.0		±2
	0.0		±2
	-5.0		±2
	-10.0		±2
500 MHz	10.0		±2
	5.0		±2
	0.0		±2
	-5.0		±2
	-10.0		±2
1000 MHz	10.0		±2
	5.0		±2
	0.0		±2
	-5.0		±2
	-10.0		±2
2000 MHz	10.0		±2
	5.0		±2
	0.0		±2
	-5.0		±2
	-10.0		±2
4000 MHz	10.0		±2
	5.0		±2
	0.0		±2
	-5.0		±2
	-10.0		±2
6000 MHz	10.0		±2
	5.0		±2
	0.0		±2
	-5.0		±2
	-10.0		±2

The measurements at 4000 MHz only apply to the SG384 and SG386. The measurements at 6000 MHz only apply to the SG386.

Frequency Synthesis Tests

Basic functionality of the SG380 series generators is verified by testing the generation of several specific frequencies from DC to 6 GHz.

Frequency Generation Tests

Frequency generation tests verify that basic frequency synthesis of the device under test is operating correctly. This is accomplished by measuring the output frequency of the SG380 series generator at several specific frequencies from DC to 6 GHz. The specific frequencies selected in the test guarantee that all crystals within the device under test are functioning properly and that all phase locked loops are locked and stable. The Agilent E4440A PSA spectrum analyzer is used to verify frequency synthesis. This test requires the setup shown in Figure 6.

graph LR
    A["Agilent E4440A Spectrum Analyzer"] -->|Ext Ref IN| B["SG38X"]
    A -->|10 MHz OUT| B
    B --> C["BNC"]
    B --> D["Type-N"]

Figure 6: Setup for frequency generation tests.

To verify the frequency generation of the device under test perform the following procedures:

1. Connect the equipment as shown in Figure 6
2. Verify that the spectrum analyzer is locked to the 10 MHz external reference frequency.
3. Align the spectrum analyzer by pressing the keys [System], [Alignment], [Align All Now].
4. On the SG380 series generator, press the keys [SHIFT], [0], and [Hz] to reset the instrument to default settings.
5. Press [AMPL] until the display shows "ntype". Then press [0], [dBm] to set the amplitude to 0 dBm.
6. Press [FREQ] to select frequency. Then enter the test frequency given in Table 35.
7. Verify that the measured frequency is within the limits given in Table 35.
8. Repeat steps 6 and 7 for all the frequencies given in Table 35

Note that frequencies above 2025 MHz do not apply to the SG382. Similarly, frequencies above 4050 MHz do not apply to the SG384. All test frequencies apply to the SG386.

Table 35: Test frequencies for frequency synthesis

Test Freq. (MHz)	Measured Freq. (MHz)	Limit (Hz)
50		±2
99		±2
177		±2
250		±2
333		±2
498		±2
723		±2
1000		±2
1522		±2
2013		±2
2845		±2
3350		±2
3999		±2
4650		±2
5319		±2
6000		±2

Modulation Output Test

This is test verifies the operation of the modulation engine and the modulation output. It does not test to any specifications. This test requires the setup shown in Figure 7

graph LR
    A["Agilent DSO-X-2014A Oscilloscope"] --> B["Modulation Out"]
    B --> C["BNC"]
    B --> D["Type-N"]
    B --> E["SG38X"]

Figure 7: Setup for modulation output test.

To verify the operation of the modulation output, use the following procedure:

1. Connect the equipment as shown in Figure 7.
2. Set the scope to trigger on Ch 1, rising edge
3. Set the vertical scale to 500 mV/div
4. Set the timebase to 500 us/div
5. On the SG380 series generator, press the keys [SHIFT], [0], and [Hz] to reset the instrument to default settings.
6. Press [MOD FCN] and then press ADJUST [] two times. The display should read “func triangle.”
7. Press [ON/OFF] to turn the modulation on.

The waveform on the scope should look similar to that shown in Figure 8. It should be a 1 kHz triangle wave centered about 0 V with a peak to peak deviation of 2 V. Verify that the waveform has no discontinuities.

Figure 8: Modulation output waveform.

Modulation Input Test

This is test verifies the operation of the modulation engine and modulation input. It does not test to any specifications. This test requires the setup shown in Figure 9

graph TD
    A["DS345 Function Generator"] -->|Function| B["Mod Out"]
    C["Agilent DSO-X-2014A Oscilloscope"] -->|Mod Out| B
    B -->|Mod In| D["SG38X"]
    D -->|BNC Type-N| B

Figure 9: Setup for modulation input test.

To verify the operation of the modulation input, use the following procedure:

1. Connect the equipment as shown in Figure 9.
2. Set the scope to trigger on Ch 1, rising edge
3. Set the vertical scale to 500 mV/div
4. Set the timebase to 500 us/div
5. Reset the DS345 to default settings by pressing [SHIFT], [RCL]
6. Set the DS345 for triangle waves by pressing FUNCTION [▽] twice.
7. Set the DS345 for a 1 Vpp output by pressing the keys [AMPL], [1], [Vpp].

8. On the SG380 series generator, press the keys [SHIFT], [0], and [Hz] to reset the instrument to default settings.

9. Select external modulation by pressing [MOD FCN] and then pressing ADJUST [▽] until the “EXT” LED is highlighted. The display should read “func etrn. ac dc”

10. Press [ON/OFF] to turn the modulation on.

The waveform on the scope should look similar to that shown in Figure 10. It should be a 1 kHz triangle wave centered about 0 V with a peak to peak deviation of 2 V. Verify that the waveform has no discontinuities.

Figure 10: Modulation input test waveform.

Timebase Calibration

The accuracy of the internal timebase may be tested against a house reference if it is known that the house reference has a superior stability and accuracy than the timebase installed in the SG380 series generator. Use the setup shown in Figure 11 to test the accuracy of the timebase.

graph TD
    A["10 MHz Reference"] --> B["SR620"]
    A --> C["SG38X"]
    B --> D["EXT A B REF"]
    C --> E["BNC"]
    C --> F["Type-N"]
    style A fill:#f9f,stroke:#333
    style B fill:#ccf,stroke:#333
    style C fill:#cfc,stroke:#333

Figure 11: Setup for timebase calibration

The accuracy and stability of the SG380 series timebase depends on the type of timebase installed. An optional timebase, if installed, can be identified on the rear panel of SG380 series generator under the serial number with the label “Rubidium Timebase”

If the standard OCXO timebase is installed, an FS725 Rb frequency standard may be used as the 10 MHz reference. If a rubidium timebase is installed, a cesium based reference will be required as a reference.

SR620 Configuration

Use the following procedure to set up the SR620:

1. With the power off hold down the [CLR] button in the DISPLAY section and turn the power on. This resets the SR620 to default settings.
2. Press [SEL] in the CONFIG section until "CAL" is flashing
3. Press [SET] in the CONFIG section until "cloc Source" is displayed
4. Press SCALE[△] in the SCOPE AND CHART section until “cloc Source rear” is displayed
5. Press MODE [▽] button until the selected mode is FREQ.
6. Press [SEL] in the CONFIG section until "OUT" is flashing
7. Press [SET] in the CONFIG section until "Gate Scale" is displayed
8. Press SCALE[△] in the SCOPE AND CHART section until 100 is displayed.
9. Press the DISPLAY [] to return to the normal display
10. Press the GATE/ARM [△] button once to set the gate to 10 s
11. If a rubidium timebase is installed in the SG380 series generator, press the GATE/ARM [] button once more to set the gate to 100 s
12. Press the SAMPLE SIZE [▽] button three times to set the sample size to 1.
13. Turn the trigger level knob above the channel A input counter clockwise until AUTO is highlighted.
14. Press the channel A [INPUT] button once to switch to 50 Ω termination.

Timebase Calibration Test

It is critical that the timebase be fully warmed up before measurements are taken. Allow at least 1 hour of warm-up for installed timebase to stabilize.

Record the timebase frequency reported by the SR620. Compare it to the stated one-year accuracy shown in Table 36 for the installed timebase.

Table 36: Timebase calibration test

Timebase	Freq. (MHz)	Measured Freq. (MHz)	Limit (Hz)
Standard	10		±0.5
Opt 4: Rubidium	10		±0.01

Calibration

The SG380 series internal timebase may be calibrated from the front panel using the measurements taken above. The process is iterative. Use the following procedure to calibrate the internal timebase:

1. Press [SHIFT], [+/-] to activate the CAL secondary function. Then press Press the SELECT [▷] until the display shows “tcal.”
2. Press the ADJUST [] and [] keys to adjust the timebase frequency up or down respectively.
3. Measure the new frequency with the SR620.
4. Repeat steps 2 and 3 until the desired frequency accuracy is achieved.

Option Board Verifications

The SG380 series RF signal generators may be outfitted with up to 3 options installed on the rear panel. Option 1 provides clock outputs. Option 2 provides an RF doubler for RF out to 8 GHz. Option 3 provides external IQ modulation capability.

Option 1: Clock Output Test

This test verifies the operation of option-1 clock outputs. This test requires the setups shown in Figure 12 and Figure 14. The first test merely demonstrates overall operation. The second test verifies calibration of the outputs.

Agilent DSO-X-2014A Oscilloscope Ch 1 Ch 2 +Clock Out Clock Out 50 Ω Terminators BNC Type-N SG38X

Figure 12: Clock output operation test.

To verify overall operation of the option 1 clock outputs, use the following procedure:

1. Connect the equipment as shown in Figure 12.
2. Set the scope to trigger on Ch 1, rising edge
3. Set the vertical scale to 200 mV/div for both Ch 1 and Ch 2.
4. Set the timebase to 20 ns/div
5. On the SG380 series generator, press the keys [SHIFT], [0], and [Hz] to reset the instrument to default settings.

The waveform on the scope should look similar to that shown in Figure 13. It should be a 10MHz square wave centered about 0V with a peak to peak deviation of 0.4V . Verify that the waveform has 50% duty cycle and that the two waveforms are 180^ out of phase. Please note that this scope is not fast enough to resolve the actual transition times of the clock outputs. A much higher bandwidth scope would be required for that measurement.

Figure 13: Clock output waveform.

Agilent 34410A Digital Voltmeter 50 Ω Terminator + Clock Out BNC Type-N SG38X

Figure 14: Clock output level test.

To verify calibration of the option 1 clock outputs, use the following procedure:

1. Connect the equipment as shown in Figure 14.
2. On the SG380 series generator, press the keys [SHIFT], [0], and [Hz] to reset the instrument to default settings.
3. Press the keys [FREQ], [1], and [Hz] to set the frequency to 1 Hz.
4. Press the key [AMPL] until the display shows "cloc."
5. Press [0], [.], [4], [Vpp] to set the amplitude the first entry in Table 37
6. Record and verify the output levels meet the limits specified in Table 37
7. Repeat steps 5 and 6 for the other amplitudes given in Table 37.

Table 37: Amplitude level requirements for the option 1 clock outputs

Set Ampl. (Vpp)	Level (V)	Measured Level (V)	Limits (V)
0.400	-0.200		±0.05
	+0.200		±0.05
1.000	-0.500		±0.05
	+0.500		±0.05

Option 2: RF Doubler Test

This test verifies the signal generation of the option-2 RF doubler. It uses the Agilent E4440A spectrum Analyzer to verify the frequency generation of the doubler. This test requires the setup shown in Figure 15.

graph TD
    A["Agilent E4440A\nSpectrum Analyzer"] --> B["Opt 2 RF"]
    B --> C["SG38X\nBNC\nType-N"]
    B --> D["10 MHz OUT"]
    A -->|Ext Ref IN| A

Figure 15: RF doubler frequency test.

To verify the frequency generation of the option-2 RF under test perform the following procedures:

1. Connect the equipment as shown in Figure 15
2. Verify that the spectrum analyzer is locked to the 10 MHz external reference frequency.
3. Align the spectrum analyzer by pressing the keys [System], [Alignment], [Align All Now].
4. On the SG380 series generator, press the keys [SHIFT], [0], and [Hz] to reset the instrument to default settings.
5. Press [FREQ] to select frequency. Then enter the test frequency given in Table 38. Note that for the SG386, only frequencies above 6 GHz apply.
6. Verify that the measured frequency is within the limits given in Table 38.
7. Repeat steps 6 and 7 for all the frequencies given in Table 38

Note that frequencies above 2025 MHz do not apply to the SG382. Similarly, frequencies above 4050 MHz do not apply to the SG384. All test frequencies apply to the SG386

Table 38: Test frequencies for option 2 frequency synthesis

Test Freq. (MHz)1	Measured Freq. (MHz)	Limit (Hz)
4000		±2
4500		±2
5000		±2
5500		±2
6000		±2
6500		±2
7000		±2
7500		±2
8000		±2

^1 Test frequencies less than or equal to 6 GHz do not apply to the SG386

Option 2: DAC Output Test

This test verifies the operation of the option-2 DAC output. This test requires the setup shown in Figure 16.

graph LR
    A["Agilent 34410A<br>Digital Voltmeter"] --> B["Opt-2 DAC Out"]
    B --> C["BNC"]
    B --> D["Type-N"]
    C --> E["SG38X"]
    D --> E

Figure 16: Option-2 DAC output test.

To verify the operation of the option-2 DAC output, perform the following procedures:

1. Connect the equipment as shown in Figure 16
2. On the SG380 series generator, press the keys [SHIFT], [0], and [Hz] to reset the instrument to default settings.
3. Press [DC OFFS] successively until the display reads "rear dc."
4. Enter the test voltage given in Table 39.
5. Verify that the measured voltage is within the limits given in Table 39.
6. Repeat steps 4 and 5 for all the voltages given in Table 39

Table 39: Test voltages for option 2 DAC output

Set Voltage (V)	Measured Voltage (V)	Limit (V)
-10.0		±0.02
-5.0		±0.02
0.0		±0.02
5.0		±0.02
10.0		±0.02

Option 3: IQ Modulation

This test verifies the operation of the option-3 IQ modulator. This test requires the setup shown in Figure 17

graph LR
    A["Agilent E4440A Spectrum Analyzer"] -->|Ext Ref IN| B["SG38X"]
    B -->|1 MHz OUT| C["BNC"]
    B -->|1 MHz OUT| D["Type-N"]

Figure 17: Option 3 IQ modulator test.

To verify the operation of the IQ modulator use the following procedure:

1. Connect the equipment as shown in Figure 17
2. Verify that the spectrum analyzer is locked to the 10 MHz external reference frequency.
3. Align the spectrum analyzer by pressing the keys [System], [Alignment], [Align All Now].
4. On the SG380 series generator, press the keys [SHIFT], [0], and [Hz] to reset the instrument to default settings.
5. Press [FREQ], [1], [GHz] to set the frequency to 1 GHz
6. Press [TYPE] and then press ADJUST [] until the IQ (Opt) LED is highlighted. The display should read “iq.”
7. Press [DC OFFS] successively until the display reads "bnc"
8. Press [0], [.], [5], [Vpp] to set the DC offset to 0.5 V.
9. Measure the amplitude of the 1 GHz signal on the Agilent spectrum analyzer.
10. Press [ON/OFF] to enable external IQ modulation.
11. Measure the amplitude of the 1 GHz signal on the Agilent spectrum analyzer.
12. Disconnect the BNC cable from the rear panel I input.
13. Measure the amplitude of the 1 GHz signal on the Agilent spectrum analyzer.

The difference between the values recorded in step 9 and step 11 should be less than 1 dB. The difference between the values recorded in step 11 and step 13 should be greater than 40 dB.

Conclusions

The tests described in this document are designed to test the basic functionality of the unit. They are not intended to be a substitute for the complete performance test which is performed at the factory. Nevertheless, one can have reasonable confidence that instruments that pass the tests described in this document are operating correctly. As always, if an instrument fails to pass a test, verify that the setup has been duplicated correctly, and that the individual procedures have been followed as specified. Instruments that have failed to meet specifications may be returned to SRS for repair.

Circuit Description

Overview

There are three RF Signal Generators in the SG380 Series: The SG382 (DC to 2.025 GHz), the SG384 (DC to 4.050 GHz) and the SG386 (DC to 6.075 GHz).

Each signal generator has extensive modulation capabilities including AM, FM, M , Sweeps, Pulse, and (optional) IQ modulation. The units' low phase noise (-116 dBc/Hz at 20 kHz offset at 1 GHz) and high resolution (1 Hz at all frequencies) are provided by a unique synthesis technique that allows essentially zero channel spacing together with a high phase comparison frequency without the noise or spurs associated with conventional fractional-N synthesis.

Several options improve or extend the performance of the Signal Generators. Option 1 provides complimentary clock outputs with 35 ps transition times. Option 2 is a frequency doubler that provides a rear panel SMA output up to 8.1 GHz (available on the SG384 and SG386). Option 3 provides high bandwidth, rear panel I/Q modulation inputs. Option 4 improves the timebase accuracy with a rubidium oscillator.

The three models (SG382, SG384 and SG386) share a common design approach. All units use the same power supply and motherboard (which includes timebase and frequency references, DDS synthesizers, VCXO filters, modulation generator, and computer interfaces).

The RF Block for the SG382 and SG384 is identical, using a 1900 MHz to 4100 MHz VCO and digital dividers to synthesize RF frequencies. The top octave is not used (or calibrated) in the SG382, whose maximum frequency is 2.025 GHz.

The RF Block for the SG386 is different from that used in the SG382 and SG384. The VCO in the SG386 covers from 3 GHz to 6 GHz, and the output amplifier uses a pHEMT gain block instead of the InGaP gain block which is used in the SG382 and SG384.

For brevity, the circuit description which follows will refer to the SG384. Differences between the units will be detailed as required.

Block Diagram

(Schematic 1: Block Diagram)

Important sections of the instrument, and the interconnections between them, are illustrated in the block diagram. We will follow the RF signal path first, and then we will discuss the various support functions.

The RF path starts in the upper left corner with the Timebase and ends in the lower right corner with the Output Amplifiers and Attenuators. The timebase consists of a 20 MHz VCXO that is phase locked to an internal OCXO, to an internal rubidium timebase (Option 4), or to an external 10 MHz reference. A 100 MHz VCXO is phase locked to the 20 MHz timebase. The 100 MHz is divided by four to provide 25 MHz to the CPU and FPGA. The 100 MHz is also the sample clock for a 48-bit DDS (here after referred to as the LF DDS). The frequency resolution of the LF DDS is extended to 64 bits via the FSK pin of the LF DDS. The output frequency of the instrument is proportional to the frequency output of this LF DDS and so this establishes the instrument's frequency resolution.

The output of the LF DDS cannot serve directly as the reference for the RF synthesizer because spurs on the LF DDS output would appear on the RF output, increased in magnitude by 6 dB per octave between the LF DDS output and the instrument's RF output. Hence, one of three VCXOs is used to filter the LF DDS output to remove the spurs. Two of the VCXOs can be tuned by ±100 ppm (around 19.5541 MHz or 19.6617 MHz), while the third VCXO can be tuned by ±10 ppm around 19.607843 MHz (collectively referred to hereafter as 19+ MHz VCXO). These frequencies were chosen to maximize the phase comparison frequency in the RF synthesizer's PLL, as well as optimizing performance at canonical frequencies. The LF DDS is programmed to operate in one of these three ranges and the corresponding VCXO is phase locked to the LF DDS. The output of the phase locked VCXO, whose frequency can now be set with 64 bits of resolution, becomes the timebase for the RF synthesizer.

The selected 19+ MHz VCXO is multiplied up by ×51 to a frequency near 1 GHz by the PLL synthesizer in the RF Reference / Baseband DDS section of the block diagram. The 1 GHz output serves as the sample clock to a 32-bit DDS (hereafter referred to as the RFDDS). The output of the RFDDS becomes the reference frequency for the RF synthesizer. The RFDDS is programmed to divide by an integer when it is used as a reference for an unmodulated RF output. Dividing by an integer eliminates DDS spurs, as the DDS repeats the exact same sequence for every cycle of its divided output and so “spurs” collect together as harmonics which do not cause clock jitter or spurious frequency outputs. When generating frequency or phase modulated outputs the RFDDS provides agile modulation of the RF reference frequency via the 16-bit words from the FPGA modulation processor, which are updated at 125 MHz.

The output of the 1 GHz, 32-bit, RFDDS is filtered and passed differentially to the RF synthesizer in the RF Block to serve as the PLL frequency reference, f_ref . A wideband VCO (1900-4100 MHz for the SG382 and SG384, or 3 GHz to 6 GHz for the SG386) is divided by N and phase locked to the reference divided by R, to produce and output a frequency of f_ref × N / R . The output of this synthesizer clocks binary dividers to provide square wave outputs in the 5 octaves below the RF VCO frequency. The square waves are low-pass filtered to provide sine wave outputs over the same frequency range. An RF multiplexer selects one of the sine waves, or the original reference sine wave (in the case that the RF output is less than 62.5 MHz (less than 93.75 MHz for the SG386), as the

source to the RF output stages. Another RF multiplexer selects the corresponding square wave to serve as the source for the rear panel clock and doubler options.

The selected RF sine wave is passed to the RF Output Amplifiers and Attenuators block. An I/Q modulator is inserted into the signal path when I/Q modulation is being used, otherwise the RF output is passed directly to a series of RF attenuators and amplifiers which provide an output amplitude range from -107 dBm to +16.5 dBm. A voltage variable attenuator is used to provide amplitude modulation. The amplified and attenuated RF sine wave, in the frequency range of 950 kHz to 2, 4 or 6 GHz, is output via the front panel type-N connector.

There is another signal path for output signals between dc and 62.5 MHz (93.75 MHz for the SG386). The 32-bit RFDDS on the mother board provides signals in this range directly. The differential signals are passed to the output block and can be amplified or attenuated to a range from 1mV_rms to 1V_rms and offset with a dc voltage. The amplified and offset output is passed out the front panel BNC connector via 50 .

There are several modulation paths. As previously described, frequency and phase modulation is provided by the FPGA via the RFDDS's parallel port. The source for the modulation waveform can be a table in the FPGA, data stored in a larger memory external to the FPGA, or up-sampled and digitally filtered data streaming from an ADC which digitizes the rear panel modulation input. An analog copy of the modulation waveform is output via a rear panel BNC.

Analog signals to provide I/Q modulation can originate from a table in the FPGA, or data stored in a larger memory external to the FPGA, up-sampled to 125 MHz, digitally filtered, and output via dual 14-bit DACs. I/Q modulation can also be provided directly via rear panel BNC inputs (Option 3). Copies of the I&Q modulation waveforms can be output via rear panel BNCs (Option 3).

Amplitude modulation can originate from a table in the FPGA, data stored in a larger memory external to the FPGA, or up-sampled data streaming from an ADC which digitizes the rear panel modulation input. RF outputs above 62.5 MHz (93.75 MHz for the SG386) are amplitude modulated via a voltage variable attenuator in the RF output stages. Outputs below 62.5 MHz (93.75 MHz for the SG386) are amplitude modulated via the 16-bit parallel port on the RFDDs. An analog copy of the modulation waveform is output via a rear panel BNC.

A Coldfire™ microcontroller is used to control all aspects of the instrument's operation and to interface to external computers via the Ethernet, GPIB or RS-232. The microcontroller also responds to front panel key presses and updates front panel displays.

The front panel display is fully static (there is one latched bit per display segment or indicator lamp.) This approach eliminates the possibility of a display refresh spur in the RF output. The front panel display is written to and read from serially when a change is made or a key is pressed.

The system power supply is enclosed in a separate enclosure within the instrument for safety and shielding. A universal input power supply converts the line voltage to +24 V _oc which is always present to provide power to the OCXO or optional rubidium timebase. An inverter operates to provide ±15, ±5, and +3.3 V when the unit is switched “on” to power the rest of the instrument.

Detailed Circuit Description

Several sub-assemblies will be described:

1. The front panel display
2. The front panel display EMI filter
3. The mother board
4. The RF synthesizer
5. The RF output amplifiers and attenuators
6. The power supply
7. Option 1 (high speed clock outputs)
8. Option 2 (4-8 GHz RF output)
9. Option 3 (I/Q modulation inputs & outputs)
10. Option 4 (Rubidium Timebase)

Front-Panel Display

(Schematic 2: Front Panel Display)

The front panel consists of 16 seven-segment displays, 47 LED lamps, and 33 key conductive rubber keypads. The front panel display is fully static in that there is one latched bit for each LED segment or lamp. Data is written to the display serially via the SPI (Serial Peripheral Interface Bus). When a key is pressed, the input to the corresponding latch is pulled high, and a KEYPRESS interrupt is sent to the CPU. Key press data is latched when the CPU responds with a -CS_FRONT. As data is being written to the display, latched key press data is also read back over the SPI.

The lamp currents (which set brightness) are equal to the +3.3 V supply, minus the \~2 V LED voltage, divided by resistance of the current limiting network (100 Ω). The LED display segment current (which sets segment brightness) is equal to +3.3 V supply, minus the \~1.5 V LED voltage, minus the 0.7 V base-emitter voltage of Q1A (for example), divided by resistance of the current limiting network (680 Ω). The intensity of a digit can be increased by turning on the other transistor in the pair (Q1B, for example) by setting Q7 of U43 low and asserting –INTENSIFY, which will cause the voltage on the common anode of U16 to increase by about 0.6 V.

Front-Panel Display EMI Filter

(Schematic 3: Display EMI Filter)

The Front panel Display is shielded from the main box via a metal panel. The SPI interface and power connections are filtered by a separate PCB. These help to eliminate EMI and reduce the display interference in the main system's sensitive electronics.

Motherboard

The motherboard is the large PCB nearest to and approximately the same size as the bottom cover of the instrument. There are eight pages of schematics for the motherboard. Circuits include 10 MHz & 20 MHz timebases, three 19+ MHz VCXOs, Coldfire CPU with Ethernet, GPIB, and RS-232 interfaces, FPGA modulation processor, modulation DACs and external modulation ADC, 1 GHz VCO, an RF reference DDS, and interfaces to the RF Block and the rear panel options.

Timebases

(Schematic 4: Mother Board 1, Frequency Refs)

The timebase reference is a 20 MHz VCXO consisting of the 3^rd overtone crystal, Y100, and the Colpitts oscillator, Q100. The crystal is designed to operate with a 20 pF load which is the series combination of C110, the tank L103/C111, and the varactor D100. To provide gain, both C110 and the parallel combination of L103 & C111 must have a capacitive reactance. The L103/C111 tank has an inductive reactance below 8.9 MHz which prevents the oscillator from operating at the fundamental frequency of the crystal. The crystal is operated just above its series resonance, and so has an inductive reactance that resonates with the load capacitance. The operating frequency is controlled by the dc voltage applied to the varactor.

The oscillator's circulating current is cascoded into the emitter of Q101 through to the collector, which is held at dc ground by L105 and amplitude limited by the dual Schottky, U105. The output is amplified and buffered by the low noise amplifier, U107, which provides a (nearly) square wave output with amplitude of about 2.4 Vpp at 20 MHz. This signal is ac coupled and converted to a 3.3 V CMOS level square wave by U114, which is powered by a low noise source, U112.

The 20 MHz square wave can be phase locked to an external timebase reference or to an internal OCXO or optional rubidium oscillator by the PLL synthesizer, U106. The 10 MHz RF input to the PLL synthesizer is selected by the multiplexer U109. Another multiplexer, U103, improves isolation between the internal OCXO or rubidium reference and the external timebase reference.

The presence of an internal reference is detected by the diodes U100 and the corresponding peak detection circuit. The presence of an external reference is detected by the diodes U104 and the corresponding peak detection circuit. The CPU operates the multiplexers to select the external reference whenever it is available, the internal OCXO or rubidium next, or a fixed programming voltage to adjust the 20 MHz VCXO as a last resort.

The PLL synthesizer's charge pump output is conditioned by the loop filter U110B. The loop filter has a bandwidth of about 140Hz . The multiplexer U108 selects between the

charge pump output (when the PLL is active) or a fixed programming voltage, CAL_VCO (when no better reference is available). A lock detect signal is provided to the CPU.

The 20 MHz is divided by two by U115, which drives transformer T100 differentially. The output of the transformer is low pass filtered (with a notch at 30 MHz) to provide the 10 MHz sine wave timebase output on a rear panel BNC.

A 100 MHz VCXO, U119, is phase locked to the 20 MHz reference by U116, a CMOS PLL frequency synthesizer. The differential outputs from the VCXO are used to clock a 48-bit DDS, and converted to CMOS logic levels and divided by 4 to generate 25 MHz clocks for the CPU and FPGA sections.

LF DDS and 19 MHz Reference

(Schematic 5: Mother Board 2, 19 MHz Ref)

The singular purpose of this page of schematics is to produce a low noise “19MHZ_REF” square wave which serves as the reference frequency for the rest of the RF synthesizer chain. A DDS (hereafter referred to as the LF DDS) is used to provide a frequency reference of 19 MHz and a resolution of 1:10^18 . Spurs and noise outside of the PLL loop bandwidth are rejected from the DDS output by phase locking a narrowband VCXO to the LF DDS. Spurs at all frequencies are reduced by applying a PRBS (pseudo-random binary sequence) to the FSK (frequency-shift key) input of the LF DDS with a repetition rate of about 98 kHz.

There are three nearly identical VCXOs. Each uses a crystal resonator in a Colpitts oscillator. The middle VCXO (19.607843 MHz) uses a ^1 overtone crystal and so has less phase noise and a narrower tuning range than the other VCXOs. The configuration of the middle VCXO is identical to the 20 MHz timebase described above. The circulating oscillator current is cascoded into the emitter of Q204. The collector load (L204 and back-to-back Schottky diodes U204) shape the signal current into a nearly square wave with no dc offset.

One of the three VCXOs is selected to be phase locked to the LF DDS. The selected VCXO has its output amplifier (U209, U210 or U211) enabled. An output multiplexer (U206, U207 or U208) connects the selected VCXO output to the input of U213, which shapes the selected signal into a CMOS level square wave.

The 100 MHz timebase serves as the clock to a LF DDS (U215) which is programmed to generate frequencies over three ranges: 19.5541 MHz±100ppm, 19.607843 MHz ±10 ppm and 19.6617 MHz ±100 ppm. The frequency resolution of the 48-bit LF DDS is extended to 64-bits by toggling between two frequency tuning words with a duty cycle that has 16 bits of resolution. The differential output of the LF DDS is transformer coupled to a low pass filter (L217-222 and C252-254) that has a cutoff frequency of 24 MHz.

Spurs and broadband noise are rejected from the output of the LF DDS by phase locking one of three VCXOs to the LF DDS output. The selected VCXO is phase locked by a CMOS PLL synthesizer, U217. One of two loop filters is used: U216A, a loop filter with 400 Hz bandwidth, is used when the selected VCXO is one of the fundamental mode oscillators. U216B, a loop filter with 200 Hz bandwidth, is used when the 3^rd overtone oscillator is selected.

Microcontroller and Interface

(Schematic 6: Mother Board 3, CPU)

A Coldfire™ MCF52235 microcontroller is used to control the instrument and to interface to external computers via Ethernet, GPIB or RS-232. The microcontroller uses a 32-bit data path, has 256k of program flash ROM, 32k of RAM, an octal 12-bit ADC, and operates at 60 MHz from a 25 MHz clock input.

The microcontroller's ADCs are used to detect various PLL lock states, detect 10 MHz references, measure the control voltages applied to various VCOs, sense RF block temperature, measure the detected RF output, and measure miscellaneous systems voltages.

One of the microcontroller's UARTs is translated to RS-232 levels by U311 and made available on the rear panel for control by remote computers. The microcontroller's Ethernet controller is connected directly to a RJ-45 connector, U302, which is accessible on the rear panel to connect the instrument to a local area network. An 8-bit bidirectional port is used to interface the microcontroller to a GPIB controller, U316, whose connector is also on the instrument's rear panel.

The microcontroller's SPI (serial peripheral interface bus) is expanded to 16 ports by the decoders U308 and U309. The eight devices which are selected by U309 (PLL synthesizers, RF and Option control) are designated as “quiet” SPI devices. The SPI data and clock signals are only presented to these devices when one in the group is being addressed. Doing so reduces crosstalk disturbances which can add spurs to RF outputs. The AND gates in U312 gate “off” the QSCK and QMOSI signals unless the U309 decoder is enabled.

SPI devices include:

0) Idle, 1) spare, 2) FPGA modulation processor, 3) 19 MHz DDS, 4) RF DDS, 5) cal ROM flash, 6) front panel display, 7) miscellaneous control bits, 8) 20 MHz PLL, 9) 100 MHz PLL, 10) 19 MHz PLL, 11) 1 GHz PLL, 12) 4 GHz PLL, 13) RF block control, 14) Option 1&2 control, 15) system DAC.

Modulation Processor

(Schematic 7: Mother Board 4, Modulation Processor)

A Xilinx XC3S400A in a 320-pin BGA is used as a modulation processor in the SG384. The FPGA is attached to two large memories via a 16-bit data bus. The E28F320J3D75A, U402, is a Numonyx 32 MBit flash MEMORY which is used to store FPGA configurations and user arbitrary waveforms. The CY62167DV30, U400, is a Cypress 16 MBit, 55 ns static RAM used to store and play modulation waveforms.

Several FPGA configurations are stored in the flash MEMORY. Each configuration allows the FPGA to perform a variety of modulation tasks depending on the instrument configuration. For example, when EXT FM is selected, the FPGA reads digitized data from the ADC (U502) which digitizes the rear panel modulation input, then offsets, scales, and up-samples that data, and applies the result to the RF DDS's (U605) parallel input to frequency modulate the RF synthesizer's frequency reference. Another example: When the instrument is set to provide a wide span frequency ramp (Sweep, triangle, with a set modulation rate and modulation deviation) the FPGA is configured as a DDS to provide addresses that walk though a ramp of frequency values at a precise rate and provides interpolated frequency values to the parallel input of the RF DDS (U605). The FPGA will also control the values on the data bus LVL_DAC[0..13] which controls the analog signals ±RF_ATTN so as to level the amplitude of the RF output during the frequency sweep. A final example (this is a hardware provision for a future product): A user provided I/Q modulation pattern can be loaded into the static RAM. Data pairs are read from the RAM at a precise symbol rate, interpolated and up-sampled to about 125 MSPS, digitally filtered (by a root-raised cosine filter, for example), and the result applied to the dual 14-bit DAC (U513). The analog outputs from the dual DAC are filtered and applied differentially to the I/Q modulator in the RF block.

The FPGA has three clock sources whose use depends on the FPGA configuration. The PDCLK (which originates at RF DSS, U605, operating at the RF DDS frequency/4 or about 250 MHz) is used whenever the FPGA provides data to the RF DDS's parallel port. Timing is very critical in this case. The parallel data to the FPGA must arrive within a ±1 ns window with respect to the PDCLK. One of the FPGA's DCMs (Digital Clock Managers) is used to adjust the phase of the parallel output data to meet this timing requirement. The FPGA is able to measure the timing relationship between the PDCLK and the LSB of the parallel data (MD0) via IP_L32N and IP_L32P (at the upper right-hand corner of U401 on sheet 4 of 8.

The SYNC_CLK is used as the FPGA clock source when the FPGA is controlling the modulation via the profile inputs on the RF DDS (U605). Changes to the profile pins must arrive within a ± 1 ns window with respect to the SYNC_CLK. One of the FPGA's DCMs (Digital Clock Managers) is used to adjust the phase of the parallel output data to meet this timing requirement. The FPGA is able to measure the timing relationship between the SYNC_CLK and the LSB of the parallel data (MD0) via IP_L32N and IP_L28N (at the upper right-hand corner of U401 on sheet 4 of 8.

The ±25 MHZ_FPGA source is used as the FPGA clock for pulse and blanking modulation. A DCM is used to multiply the 25 MHz clock to 200 MHz to provide 5 ns resolution for the pulse or blanking period and width. The FPGA can blank the RF and baseband outputs via the differential LVDS signals ± RF_BLANK and ± BB_BLANK.

The FPGA is initially programmed via the SPI from the CPU. Configurations are uploaded to the FPGA and stored in the flash ROM during system programming at the factory. A 6-pin JTAG connector, J400, allows direct access to the FPGA for development purposes.

Modulation ADC and DACs

(Schematic 8: Mother Board 5, Modulation ADC / DACs)

There is a rear panel modulation input BNC, J500, which allows user supplied signals to modulate amplitude, frequency, or phase of the SG384 outputs. The same input can also be used for pulse and blank modulation.

In EXT PULSE or EXT BLANK modulation modes, the rear panel modulation input is discriminated by U501 to provide a digital input, EXT_TRIG, to the FPGA. Depending on the operating mode and frequency, the FPGA will use EXT_TRIG to control ±RF_BLANK and/or ±BB_BLANK to pulse or blank the signal generator's outputs.

For EXT AM, FM or M , the rear panel modulation input is limited by D501 & D502, buffered by U500A, ac or dc coupled through U503, and low-pass filtered by a 1 MHz, 5^th order, Bessel filter (L503/L504/C511-C514). The filtered signal is buffered by U504 and digitized by U502, a 12-bit ADC operating at about 31.25 MSPS. The data from the DAC is provided to the FPGA on the 12-bit parallel data bus, ADC[0..11]. The data is offset, scaled (and linearized in the case of amplitude modulation of RF outputs) and upsampled to modulate the amplitude, frequency or phase of the signal generator outputs.

There are four high speed (125 MSPS), high resolution (14-bit) DACs that are controlled by the FPGA. The DACs have several purposes:

1. To mimic the modulation waveform on the rear panel modulation output BNC. 2. To level the RF amplitude during sweeps. 3. To level the baseband output during sweeps, or, to provide the I-component for I/Q modulation. 4. To level the doubler output during sweeps, or, to provide the Q-component for I/Q modulation.

All of the DACs have a similar configuration. The clock to each DAC is resynchronized to the PDCLK (from U605) to minimize sample jitter. The data to the DACs is loaded in parallel from the FPGA. The differential outputs are filtered by a Bessel low-pass filter (fc = 1 MHz for two of the DACs and fc = 10 MHz for the I/Q DACs). The filter outputs are buffered by differential line drivers with a fixed gain of ×2 and a 49.9 Ω source impedance.

RF DDS

(Schematic 9: Mother Board 6, RF Reference)

The RF DDS has two functions: To provide a reference frequency to the RF synthesizer (located in the RF block), or, in the case that the output is below 62.5 MHz (93.75 MHz for the SG386), to synthesize the output directly. The RF DDS is an AD9910 (U605), which integrates a 1 GSPS NCO with a 14-bit DAC. The SFDR of the part is better than -65 dBc for output frequencies below 100 MHz. This is quite adequate for direct outputs (below 62.5 MHz) but would be unsatisfactory when multiplied up to higher frequencies. (For example, a spur would increase in magnitude by 40 dB when a reference is “multiplied” up from 40 MHz to 4 GHz.)

There is a neat trick to eliminate DDS spurs: If the DDS is programmed to divide by an integer, then the output will sample the exact same DAC levels on each cycle, and so each cycle will be the same as the others. Fourier tells us that a repetitive waveform can be represented by a fundamental sine and its harmonics; hence a repetitive waveform has only a fundamental and harmonics but no spurs. This is easily seen when observing a DDS output on a spectrum analyzer. As the FTW (Frequency Tuning Word) approaches a value that corresponds to division by an integer all of the spurs gather up to fit beneath either the fundamental or its harmonics.

The requirement to divide by an integer requires further thought. For a 32-bit DDS, one cycle or 360^ corresponds to 2^32 = 4,294,967,296 in the phase accumulator. Division by an integer is simple if the integer is a power of 2. For example, to divide by 16 the FTW would be 4,294,967,296/16 = 268,435,456. However, to divide by 10, the FTW would be 4,294,967,29.6. Since the FTW must be an integer, there will be a truncation error of 0.6 bits per sample, a corresponding frequency error, and spurs in the output.

To fix this (in the case of division by 10) the DDS would be programmed to use a FTW of 429,496,729 for 9 sample clocks and 429,496,735 for 1 sample clock. Doing so accumulates exactly 2^32 in the phase accumulator after 10 sample clocks and so provides exact division by 10 with no spurs. This trick allows the RF DDS to generate a reference frequency for the RF synthesizer that has no significant spurs and so can be “multiplied” by the RF synthesizer without adding spurs to the RF output.

The clock to the RF DDS comes from a 1 GHz VCO which is phase locked to ×51 the selected 19+ MHz reference to provide precision clock rates in the ranges of 997.259 MHz ±100 ppm, 1,000.000 MHz ±10 ppm, or 1002.7467 MHz ±100 ppm. The charge pump output from the PLL synthesizer, U604, is filtered by U603, a low-noise, high bandwidth op-amp. The loop bandwidth is about 6 kHz.

The RF DDS is programmed to divide by an integer between 10 and 50 to provide output frequencies between 20 MHz and 100 MHz. The differential outputs are filtered and buffered before being sent to the RF Block to serve as the reference frequency input to the RF synthesizer.

The RF DDS has a 16-bit parallel port to allow for agile amplitude, frequency and phase modulation. The data is passed to the RF DDS from the FPGA modulation processor. The data on the parallel input, which is synchronized to the PDCLK, can directly modulate the amplitude or phase, or may be scaled and added to the FTW for FM. The DDS may also be rapidly modulated via the profile input ports, in which case the data is synchronized to the SYNC_CLK.

The data presented to the parallel port can only be used to modulate one parameter. In the case of frequency sweeps below 62.5 MHz (93.75 MHz for the SG386), the parallel data provides frequency tuning data to the RF DDS. A separate path is used to amplitude level low frequency sweeps: The differential ±BB_LEVEL signal converted to a single-ended signal by U600 and used to level the amplitude of the RF_DDS synthesizer as seen at the front panel BNC output.

RF Block and Rear-Panel Options Interface

(Schematic 10: Mother Board 7, Interface)

The common mode voltage on the differential output from the RF DDS is eliminated by U700, which integrates the difference between the common mode output voltage and ground. The integrated voltage is applied to the 100 terminations so as to eliminate the common mode voltage.

The differential DAC output is then filtered by a Chebyshev low-pass (L700, 701, 706, 707, etc) with a cutoff frequency of 150 MHz. The output of the filter is terminated and buffered by the differential amplifier, U702. A multiplexer, U701, passes the filtered RF DDS output to the RF block as either ±RF_REF (when the set frequency is above 62.5 MHz or 93.75 MHz for the SG386) or ±BB_OUT (when the set frequency is below 62.5 MHz or 93.75 MHz for the SG386).

The connector, J701, is used to pass signals between the motherboard and the rear panel options. Option 1 provides clock outputs at the set frequency. The RF signal required for this function comes directly from the RF block via an SMA cable, but power supplies and control signals (for controlling the amplitude and offset of the clock outputs) are provided via J701.

Option 2 provides a doubler to output a signal from 4 GHz (6 GHz for the SG386) to 8 GHz on a rear panel SMA connector. The RF signal required for this function comes directly from the RF block via an SMA cable, but power supplies and control signals (for controlling the amplitude of the doubler output) are provided via J701. Option 2 also provides a DC bias output on a rear panel SMA connector.

Option 3 provides rear panel analog inputs that can be used to directly modulate the I/Q modulator. The multiplexers U705 and U708 select between the internal I/Q modulation sources or the external I/Q modulation sources (which are provided by Option 3). This option also provides rear panel analog outputs which are copies of the I/Q modulation.

Power Conditioning

(Schematic 11: Mother Board 8, Power Supplies)

An enclosed power supply is used to provide regulated power to the motherboard via the large header, J800. Whenever the unit is plugged into the line, the un-switched +24 V will be present. This supply is used to maintain power to the timebase (an OCXO or an optional rubidium oscillator) even when the front panel power button is “off”. When the unit is switched “on” the other supplies ( ±15 , ±5 , +3.3V) become active. The inverter that generates those other supply voltages is operated at exactly 100 kHz, synchronized by the 100 ns wide, 200 kHz PS_SYNC pulses sourced from the CPU, U300.

The grounds and power supplies are all filtered and bypassed as they come onto the motherboard. In addition, there are several regulators which provide other voltages used in the system: +20, +8.5, +3.00 (which is used as a voltage reference throughout the system), +2.5, +1.8, +1.2, and -8.5 V.

An interrupt signal, -PWR_IRQ, is generated if the +24 V supply falls below +22 V or if the power switch is turned to “off”. This interrupt tell the CPU to “stand down” (in particular to not start new writes to memory) as the power supplies are about to turn “off”.

Motherboard to RF Block Jumper

(Schematic 12: Mother Board to RF Jumper)

This card provides the interface as well as filtering the signals to minimize any interference that could impair the signal quality. Single ended control signals implement a single order RC filter; differential signals implement a common mode choke; finally, power lines implement an LC filter.

RF Output Block

The RF Output Block refers to the milled aluminum block (and its covers) which house the type-N and BNC connectors which present the main front panel outputs of the instrument. This block establishes solid RF grounds, shields the enclosed circuitry from magnetic flux generated by the power supply and from RF signals generated by the motherboard, as well as reducing the EMI from and the susceptibility of the enclosed circuitry.

There are two circuit boards inside the RF block. Facing from the front of the instrument, the PCB on the right holds the RF synthesizer and provides connections to the motherboard via a 34-pin jumper board. The PCB on the left connects to the RF synthesizer and amplifies or attenuates the signal from the RF synthesizer. Signals on the type-N connector cover an amplitude range from -107 dBm to +13 dBm for signals from 950 kHz to 2.025, 4.050, or 6.075 GHz. The output board also provides outputs on the BNC with an amplitude range from 1 mV_rms to 1 V_rms from dc to 62.5 MHz (93.75 MHz for the SG386).

RF Synthesizer

(Schematic 13: SG384 Synthesizer 1, 2-4 GHz and Control) (Schematic 15: SG386 Synthesizer 1, 3-6 GHz and Control)

Control signals, frequency references, and power supplies are passed from the motherboard via a small jumper board to the RF synthesizer on J101. Many of the control signals flow through to the output amplifier/attenuator board via J100. The ±8.5 V power supplies are re-regulated to ±5 _SYN supplies by U100 and U111. Differential blanking signals, ± RF_BLANK and ± BB_BLANK are converted to CMOS levels by U117 and U118. Serial SPI data is clocked into the shift registers U112 and U113 to provide various control signals.

For output frequencies below 62.5 MHz (93.75 MHz for the SG386) the RF DDS direct output, ±BB_OUT, is used as the source frequency output. The differential signals are passed to the output board for conditioning before being applied to the output BNC connector. The differential signals are also buffered by U119 to provide sine wave outputs for type-N connector and discriminated by U120 to provide square wave outputs for the rear panel Option 1 & Option 2.

The RF synthesizer consists of a 1900-4100 MHz VCO (3 GHz to 6 GHz for the SG386), U105, which is phase locked by U107 to the RF reference ( ± RF_REF) from the motherboard. The differential RF reference is transformer coupled into the 100 MHz Butterworth low-pass filter (L102, C125 & C126) which is terminated by R116. The 3 MP reference is ac coupled into the PLL synthesizer's reference input into via C123. The charge pump output of the PLL synthesizer is conditioned by the loop filter, U104. The loop bandwidth is about 100 kHz for the typical phase comparison frequency of 25 MHz. The bandwidth of the loop filter, which is set to be roughly proportional to the phase comparison frequency, is adjustable by the switches U108A-D.

The output of the RF VCO is ac coupled into a high speed PECL fanout, U106. There are two sets of outputs from U106. The first output, ± TOP_OCT, is the differential top octave output for the frequency synthesizer. The other output is used as feedback to the PLL synthesizer and to control the 50/50 symmetry of the top octave output.

The symmetry control is maintained by the differential integrator, U109. If +TOP_OCT spends more time high than -TOP_OCT, the inverting input to the integrator will ramp up, causing the non-inverting output of the integrator to ramp down, reducing the dc voltage at the non-inverting input of the fanout buffer, causing +TOP_OCT to ramp down, returning the symmetry of ±TOP_OCT to 50/50.

RF Dividers and Selectors

(Schematic 14: SG384 Synthesizer 2, Dividers and LPF) (Schematic 16: SG386 Synthesizer 2, Dividers and LPF)

The ±TOP_OCT PECL signals are fanned out by U200. Both outputs of the fanout are source-terminated with 50 Ω and can be made active by grounding the string of three series 50 Ω resistors on the open emitter outputs. (Pulling up these resistors to +3.3V turns “off” the corresponding open-emitter output.)

For outputs between 2 GHz and 4 GHz (3 GHz and 6 GHz for the SG386), -EN_RF0 is set low, enabling the top-half of the fanout U200. One of the differential outputs is selected by the RF multiplexer, U216, to drive the rear panel Option 1 & Option 2 via J201 (the SMA connector in the side of the RF Block). The other differential output of the fanout is used for the top octave output. This signal is given some high frequency pre-emphasis by the stubbed attenuator (R205-207), amplified by U201, then low-pass filtered by U202 (to remove the harmonics of the square wave) to provide a 2 GHz-4 GHz sine wave for RF multiplexer, U211, which passes the sine wave to the output amplifier/attenuator board via the RF feed-thru, J200.

For outputs in the five octaves below the RF VCO, the control line -EN_1ST_DIV is set low, enabling the bottom half of the fanout, U200. (The top half is disabled by setting -EN_RF0 high.) This also enables the digital divider, U206, which will provide outputs via the gate U205 for outputs between 1 GHz and 2 GHz (1.5 GHz and 3 GHz for the SG386). Other dividers (U209, 212, 215, 218) are enabled for lower octaves. As before, each differential square wave source has a 50 source impedance, with one-half of the differential pair being passed directly to the RF multiplexer, U216, while the other half is low-pass filtered to provide a sine to the other RF multiplex, U211. Unused dividers are disabled to eliminate sub-harmonic distortion.

The RF multiplexers (U211 & U216) are non-reflective multiplexers and so unselected inputs are terminated via 50 Ω to ground. These RF multiplexers operate with a VEE of -5 V DC and so it is necessary to translate the control signals to swing between ground and -5 V DC . A triple 1:2 analog switch, U213, is used to translate CMOS control signals to the 0 V/ -5V levels.

RF I/Q Modulator, Amplifiers and Attenuators

(Schematic 17: SG384 Output 1, Attenuation & Controls) (Schematic 20: SG386 Output 1, Attenuation & Controls)

The PCB on the left side of the RF Block I/Q modulates, amplitude modulates, amplifies, and attenuates the selected RF signal before passing it out the front panel connectors. This PCB receives power, control and differential modulation signals from the RF synthesizer PCB via J101. The selected RF signal is passed from the RF synthesizer to this PCB via the RF feed-thru, J100.

The signal path toward the type-N connector begins at J100. If the carrier frequency is between 400 MHz and 4.05 GHz (6 GHz for the SG386), the signal at J100 may be multiplexed to the I/Q modulator, U110. If the signal is outside of this range, or if I/Q modulation is not enabled, the SPDT switches, U103 and U104, bypass the I/Q modulator.

The carrier signal is ac coupled into the I/Q modulator via C116. The modulator converts the input signal into two phase-shifted square waves, I & Q. The each square wave can be amplitude modulated the corresponding differential modulation inputs, ±I_MOD and ±Q_MOD. The amplitude modulated components are summed together and appear at the RF output. The RF output is attenuated (to match its input carrier level), given high frequency pre-emphasis (via the stubs in the pi-attenuator legs) and low pass filtered (to remove harmonics) and directed back into the RF signal path by the SPDT switch, U104.

Two RF voltage variable attenuators (VVA), U111 & U112, are used to amplitude level or amplitude modulate the RF signal. The attenuation is controlled by a dc voltage applied to the V1 input of each VVA. The attenuation increases as V1 becomes more negative. The attenuation characteristic is not linear, which requires compensation to the control voltage, especially for deep amplitude modulation.

The attenuator control voltage is sourced from ± RF_ATTN, which is converted to a single-ended voltage by U114 and low-pass filtered (for noise reduction) by L106 and C128. These attenuators are used to provide attenuation between the digital attenuator steps and to correct for the differential non-linearity of the digital attenuators. They are also used to amplitude level sweeps and for amplitude modulation.

The first of three RF gain blocks is U109. The gain of this amplifier is +15 dB. It is an ac amplifier which requires a dc current bias be applied to its output. It is important that the dc bias network be high impedance over the operating range (1 MHz to 6 GHz) and that it not have any significant resonances. This is achieved with three series inductors, with staggered self resonant frequencies, and with parallel damping resistors. This method is used on all the gain blocks in the signal chain.

The output from the first gain block is ac coupled into the first of five digital attenuators, U107. The digital attenuators are controlled in 0.5 dB steps from 0 dB to 31.5 dB. They are powered from +5 V and are controlled by the SPI interface. The power supplies and SPI signals are filtered from stage-to-stage to reduce signal and noise feed-through.

RF Output Attenuators

(Schematic 18: SG384 Output 2, RF Stage)

(Schematic 21: SG386 Output 2, RF Stage)

To achieve an amplitude dynamic range of 120 dB (from -107 dBm to +13 dBm) over 6 GHz requires extraordinary care in the design, layout and grounding of the circuit. In particular, it is important that there be no signal paths which “go around” the intended signal path. For example, if -100 dB of a signal can go around the attenuator chain via a control line or power line, then the effective attenuation range will be limited.

RF grounding is reestablished in each of the four stages shown on Sheet 2 of 3, with both the power supplies and serial control lines being filtered at each stage before being passed to the next. Physically, the circuit layout is within a series of “rooms”, with good ground connections, and shielded from other parts of the circuit by the milled aluminum block.

The RF signal chain continues with the output of the attenuator on the previous page being applied to the first attenuator, U201, on the next page. The signal chain continues with an amplifier, two attenuators, another amplifier, and a final output attenuator. The final amplifier, U206, has higher gain and can provide more output power than the other gain blocks. It also requires more bias current.

BNC Output

(Schematic 19: SG384 Output 3, BNC)

(Schematic 22: SG386 Output 3, BNC)

The differential outputs, ± BB_OUT, are passed from the RF DDS on the motherboard to the output board via the RF synthesizer board. These differential signals can be blanked by the dual differential switches U301 & U302 by BB_BLANK_CTL.

±BB_OUT are converted to a single-ended signal by U303, whose output is low-pass filtered (to reduce noise bandwidth and reduce high frequency spurs) by L303, C305 & C306. The signal is then attenuated by the digitally controlled attenuator, U304, which can provide 0 to 31 dB of attenuation in 1 dB steps. (Finer steps are provided by the RF DDS, whose amplitude can be set with 16-bit of resolution.) A fixed 30 dB of attenuation is provided by R302/306/307 under the control of the switch U305. The high bandwidth switches, U301, U302 and U305, are operated from ±3 V, and so their control lines are level shifted by U100 and U101 to ±3 V.

An output amplifier, U300B, buffers the attenuator output and provides a gain of × 3 . A final output driver, U300A, sums in an offset voltage, BB_OFFSET, and drives the output BNC via a 49.9 resistor. The BNC output is sampled for measurement by the CPU via the filtered signal BB_MON.

Power Supply

(Schematic 23: Power Supply)

The power supply for the unit is contained in a separate shielded enclosure. The unit accommodates universal input voltages (90-264 V_AC , 47-63 Hz) and provides a variety of dc voltages to the motherboard (+24, +15, +5, +3.3, -5, -15 V.) The unit will lock its dc-dc converter to a 200 kHz sync signal provided by the motherboard. The unit also has a thermostatically controlled fan whose speed increases with increasing temperature.

An OEM power supply (CUI Inc VSBU-120-24) provides up to 5 A at +24 V from the line voltage input. This power supply is “on” whenever the line voltage is present, supplying +24 V to the motherboard to power the timebase (either the standard ovenized crystal or optional rubidium oscillator.) The +24 V supplied to the motherboard is filtered by L1 & C1 to remove ripples from the OEM power supply. The OEM supply also provides +24 V for a dc-dc converter to generate the other regulated voltages used in the system. The dc-dc converter and fan are “on” only when the front panel power button is pressed “in”.

The dc-dc converter is disabled when the -DISABLE (pin 8 on the motherboard interface) is held low. When -DISABLE is released the switching power supply controller, U7, generates complementary square waves at about 100kHz to drive the MOSFETs (Q2 & Q3) into conduction during alternate half-cycles. The MOSFETs drive the primary of a transformer. The secondary voltages are rectified, filtered, and regulated to provide the +15, +5, +3.3, -5, \& -15V system voltages.

The regulated outputs have Schottky diodes on their outputs which prevent the power supplies from being pulled to the wrong polarity by loads which are connected to other supplies with opposite polarities. This is most important during start-up and to avoid SCR action in CMOS ICs in the case that one of the supplies should fail.

A thermostatic fan speed control helps to regulate the operating temperature of the entire instrument. This circuit uses an LM45 (10mV/deg C) as a temperature sensor. The output from the temperature sensor is offset, multiplied, and limited to a 0-15 V range. This voltage is driven a 12 V medium speed fan via the emitter follower, Q1.

Rear-Panel Options

There are three options that extend the performance of the instrument. All rear panel options interface to the mother board via the Option Jumper PCB (Schematic 24: Rear Panel Option Jumper).

Clock Output (Options 1)

(Schematic 25: Option #1 Clock Outputs)

These options are located on small boards attached to the rear panel and connected to the motherboard by a small vertical board which supplies power and control signals. The SPI is used to transfer serial data to a quad DAC and an octal shift register. A square wave at the RF frequency comes to the option PCB directly from the RF block via a coax cable with SMA connectors. This signal is the source for the rear panel clock and doubler outputs.

The RF square wave is terminated and fanned out by U110. One differential pair is used to drive the RF doubler and the other provides a clock to a laser diode driver, U109, which in turn drives the rear panel differential clock outputs.

The clock outputs have adjustable amplitude and offset which are controlled by two 12-bit DACs in U100. Since the power supply rails for the laser diode need to move with respect to ground as the offset is changed, the RF inputs need to be ac coupled. However, since the clocks need to work down to dc, the levels need to be dc restored after the ac coupling. The signal is ac coupled via C113 & C114 and the four transistors, Q102A&B and Q103A&B, provide the dc restoration. Gains and time constants are set so that all the parts work together as a high speed level shifter.

The laser diode driver switches a constant current source between the ± OUT. The magnitude of this current source (and so the amplitude of the clock output) is adjusted by the voltage at the MODSET input. This voltage is set by the AMPL_CTL output from the DAC, level shifted by the current mirror, U101B and Q100A&B.

The offset of the clock output is controlled by V_HIGH, which has been offset and scaled by U101A from the DAC output OFFS_CTL. The pull-up resistors for ± OUT are connected to a potential equal to 2.33× V_HIGH as sourced by the regulator U106. The regulator only works properly when sourcing current, which would be a problem for negative offsets. The transistor pair Q104A&B assure that the regulator will source current by turning “on” for negative offsets.

The ± OUT from the laser diode driver are coupled to the rear panel clock outputs via a -8.5 dB attenuator (R113-R121) which also allows for the insertion of an output offset. The layout is important to maintain high bandwidth as the transition times of the clock outputs are about 35 ps or 12 GHz. The clock outputs are sensed by R117 and R111 and offset, scaled, filtered and returned to the motherboard's CPU's ADC via the multiplexer, U105. This allows the microcontroller to do a system check on power-up as well as course offset and amplitude calibration.

RF Doubler (Option 2)

(Schematic 26: Option #2 4-8 GHz Doubler)

The rear panel Option 2 can provide RF sine wave outputs from 4.05 GHz (6.075 GHz for the SG386) to 8.10 GHz with amplitudes from +7 dBm to -20 dBm. When enabled (by asserting EN_DBL), the RF gain blocks are biased “on”, enabling the RF output.

The signal path starts with the RF differential square wave, ± RF. The +RF is low-pass filtered (to remove the square waves odd harmonics) and ac coupled into the gain block U205. The gain block increases the signal by 15 dB to drive the doubler, U209, which is a passive doubler with about 16 dB of insertion loss. The output of the doubler is ac coupled into the voltage variable attenuator (VVA), U210, whose attenuation level is controlled by the voltage applied to its V1 input.

The differential signal, ± DBL_LEVEL is converted to a single-ended signal by U213, whose output is low-pass filtered by L210 and C226, and applied to the VVA's control input. The VVA is used to set output levels with higher resolution than allowed by the digital attenuator which follows, and to level output amplitudes during sweeps.

The output of the VVA is ac coupled into the gain block U206, which provides about 12 dB of gain. The output of that amplifier is ac coupled into the digital attenuator, U211, whose attenuation can be set in 0.5 dB steps from 0 dB to 31.5 dB. The attenuator is controlled by 6 bits from a shift register (U216) which is operating between 0 V and -5 V to level shift the control bits to the proper level for the digital attenuator. Serial data, clock and register strobe are level shifted from CMOS levels to 0 V & -5 V by the triple 2:1 analog switch, U215. Serial data out of the shift register is level shifted by R229 & R230 and buffered by U214 to return the data loop to the CPU for testing purposes.

The output from the digital attenuator is ac coupled into the gain block U207, which provides about 12 dB of gain. The output from this gain block is ac coupled to the SMA output connector, J201. The RF is detected by U204, at the final gain block for power-on testing and to calibrate the differential non-linearity of the digital attenuator.

Option 2 also provides a ± 10V_DC bias output on a rear panel SMA connector via a 50 resistor. This output is controlled by the DAC output DC_OUT which may be set from the front panel. User loads should not exceed 20mA on this output.

I/Q Modulator (Option 3)

(Schematic 27: Option #3 I/Q Modulator)

Option 3 provides for rear panel I/Q modulation inputs. These inputs allow the user to modulate the amplitudes of the in-phase and quadrature components of RF carriers between 400 MHz and 6.075 GHz with analog signals.

The I & Q channels use the same circuit configuration. The quadrature component, ±0.5 V or 1 Vpp, is applied to the rear panel BNC connector, J2. The input signal is terminated into 50 by the parallel combination of the 52.3 input termination in parallel with the 1125 input impedance to the differential amplifier U4. The differential outputs drive a differential transmission line returning to the motherboard via 49.9 resistors and J4.

Overloads are detected at the output of the differential amplifier by the fast window comparator, U2A&B. If an overload is detected at either the I or Q inputs, the differential signal ± OVLD_I/Q will be asserted and passed to the motherboard via J4 for detection by the CPU.

This option also provides rear panel I/Q modulation outputs. The modulation signals may originate from the rear panel modulation input (Option 3) or from the internal, dual, arbitrary modulation generator (to be implemented in future products). The modulation signals from the motherboard, ±I_OUT and ±Q_OUT are received by U1 and U5 and converted to single-ended signals which drive the BNC outputs via 49.9 Ω resistors. These outputs are intended to drive 50 Ω loads to ±0.5 V or 1 Vpp.

Timebase Options

(Schematic 28: Timebase Adaptor Interface)

The standard timebase is an OCXO (SRS p/n SC-10-24-1-J-J-J-J). A rubidium frequency standard (SRS p/n PRS10) may be ordered as Option 4. Both timebases are held by the same mechanical bracket and connected to the system using the same adapter PCB.

The adapter PCB schematic is quite simple: J1 is the connector to the OCXO option, J2 is the connector to the rubidium option, and J3 is the connector to the main PCB. The op amp U1 is used to scale the 0-4.095 V DC frequency calibration voltage (CAL_OPT) to 0-10 V DC for the OCXO or 0-5 V _DC for the rubidium. The logic inverter, U2, is used to invert the logic levels for the RS-232 communication between the microcontroller on the main PCB and the PRS10 rubidium frequency standard.

Appendix A : Rational Approximation Synthesis

The SG380 Series RF synthesizers use a new approach to synthesizer design that provides low phase noise outputs with virtually infinite frequency resolution and agile modulation characteristics. The technique is called Rational Approximation Frequency Synthesis. Some details of the technique will help users to understand the performance capabilities of the instruments.

Phase Lock Loop Frequency Synthesizers

Phase lock loop (PLL) frequency synthesizers are a cornerstone technology used in every modern communication device and signal generator. The classical PLL block diagram is shown in Diagram 1.

graph LR
    A["f_REF"] --> B["÷ R"]
    B --> C["PHASE DETECTOR"]
    C --> D["LOOP FILTER"]
    D --> E["VCO"]
    E --> F["f_OUT"]
    G["f_COMP"] --> C
    H["÷ N"] --> E

Diagram 1: Classical "Integer-N" PLL Frequency Synthesizer

The purpose of the PLL synthesizer is to generate precise output frequencies that are locked to a reference frequency. As shown in Fig 1, the reference frequency, f_REF , is divided by the integer R and the voltage controlled oscillator (VCO) output, f_OUT , is divided by the integer N. A phase detector compares the phase of the divided frequencies. The phase detector output is low-pass filtered and used to control the frequency of the VCO so that f_OUT / N is equal to f_REF / R , hence f_OUT = N × f_REF / R .

A numerical example will help to illustrate the operation and design trade-offs of the PLL. Suppose f_REF = 10 MHz and R = 1000. If N = 10,000 then the output frequency, f_OUT = N × f_REF / R = 100 MHz . As N is changed from 10,000 to 10,001 to 10,002__T will change from 100.00 MHz to 100.01 MHz to 100.02 MHz. This PLL synthesizer has a phase comparison frequency, and a channel spacing, of f_REF / R = 10 kHz .

Phase Noise

Diagram 2 shows a typical phase noise plot for a 100 MHz PLL synthesizer. The phase noise plot shows the noise power in a 1 Hz sideband as a function of frequency offset from the carrier. There are three dominate sources of phase noise: The reference, the phase detector, and the VCO. The frequency reference dominates the noise close to the carrier but falls off quickly at large offsets. The phase detector noise floor is relatively flat vs. frequency but decreases with increasing phase comparison frequency. In fact, the phase detector noise decreases by about 10 dB / decade, hence is about 30 dB lower for phase comparisons at 10 MHz vs. 10 kHz. Finally, the VCO phase noise will dominate at offset frequencies beyond the loop bandwidth. A high phase comparison frequency, hence low R & N divisors, is required for a low phase noise design.

In a properly designed PLL the output noise tracks the reference at low offsets, matches the phase detector noise at intermediate offsets, and is equal to the VCO noise at offsets beyond the PLL loop bandwidth. Careful attention to the loop filter design is also required to achieve the total noise characteristic shown in Diagram 2.

In addition to broadband noise there will be discrete spurious frequencies in the phase noise spectrum. A dominant spur is often seen at the phase comparison frequency. It is easier to reduce this spur in a filter when the phase comparison frequency is high.

Diagram 2: Typical Phase Noise Spectrum for a 100 MHz PLL Frequency Synthesizer

Increasing Frequency Resolution

A frequency resolution of 10 kHz, or channel spacing of 10 kHz, is adequate in many communications applications but a higher resolution is desired in test and measurement applications. The simplest way to increase the frequency resolution is to increase the value of the R divider. In the above example, if R were increased from 1000 to 10,000 the frequency resolution (channel spacing) would be increased from 10 kHz to 1 kHz. However, there are several serious drawbacks to this strategy. As the R divider is increased the phase comparison frequency is decreased leading to higher phase detector noise, a reduction in the loop bandwidth, and increased settling times. Increasing R will achieve high frequency resolution at the cost of a noisy output that takes a long time to settle.

A Note on Fractional-N Synthesis

Another strategy to increase resolution without decreasing the phase comparison frequency is to use a Fractional-N synthesizer. In these synthesizers the value of N is modulated so that its average value can be a non-integer. If N averages to 10,000.1 then the output frequency, f_OUT = N × f_REF / R = 100.001 MHz . The frequency resolution has been improved to 1 kHz. However, modulating the N value creates spurs in the VCO output. Dithering techniques are able to spread most of the spur energy into broadband noise, but the remaining noise and spurs is problematic in some applications.

About YIG Oscillators

One work-around to the trade-off between high resolution and reduced phase comparison frequency (and so higher phase noise) is to use a YIG oscillator. YIGs are extremely good VCOs due to the extremely high Q of their resonator which consists of a sub-millimeter yttrium-iron-garnet sphere tuned by a magnetic field. However, YIGs have their drawbacks including high power, slow tuning, susceptibility to environmental magnetic fields, and high cost. The SG380 Series of RF synthesizers achieve YIG performance from electrically tuned VCOs by arranging a very high phase comparison frequency.

A New Approach

A new approach to synthesizer design provides high frequency resolution, fast settling, and low phase noise. This new approach is called Rational Approximation Frequency Synthesis. (A rational number is a number which is equal to the ratio of two integers.) The approach has been overlooked as it relies on some surprising results of rather quirky arithmetic which abandons neat channel spacing in exchange for a much better performing PLL synthesizer.

Once again, a numerical example will be useful. Suppose we want to use our PLL synthesizer to generate 132.86 MHz. We could do that by setting R = 1000 and N = 13,286. With f_REF = 10 MHz we have f_OUT = N × f_REF / R = 132.86 MHz. The phase comparison frequency is 10 kHz and so the PLL loop bandwidth, which is typically 1 / 20 of the phase comparison frequency, would be only about 500 Hz.

There's another way to synthesize 132.86 MHz (or at least very close to it.) Suppose we set R = 7 and N = 93. Then _UT = N × f_REF / R = 132.857142 MHz , which is only 21.5 ppm below the target frequency (Hence the term "Rational Approximation". Of course, increasing the reference frequency by 21.5 ppm will produce the target frequency exactly, as will be described.) Momentarily suspending the question of the general applicability of this approach, the positive benefit is clear: The phase comparison frequency is now 10 MHz / 7 = 1.42 MHz which is 142 times higher than that provided by the classical PLL with a 10 kHz channel spacing. This allows a PLL bandwidth which is also 142 times wider. The higher comparison frequency of this PLL will provide faster settling, lower phase noise, and an easily removed reference spur which is 1.42 MHz away from the carrier.

Several questions arise.

1. Is this approach generally applicable, that is, can small values for R & N always be found to produce an output close to any desired frequency?
2. Is there a method to find the smallest values for R & N?
3. Can the output frequency be made exact (not just "close to") the desired frequency.

The answer to all three questions is “Yes”. Details are well illustrated by a real-world example.

An Example

Diagram 3 shows a PLL synthesizer that can generate outputs anywhere in the octave between 2 GHz and 4 GHz. Lower frequencies are easily generated by binary division of this output. This example uses an Analog Devices dual-modulus PLL frequency synthesizer, the ADF4108. A dual modulus N counter is a high-speed divider which divides by a prescaler value, P, or by P+1 under the control of two registers named A & B. The dual modulus N-divider adds a bit of numerical quirkiness as there are restrictions on the allowed values for A & B as detailed in Diagram 3. The ADF4108 also requires that the phase comparison frequency be less than 104 MHz. The reference frequency input in this example is 200 MHz.

graph LR
    A["f_REF = 200 MHz"] --> B["÷ R"]
    B --> C["φ_DET"]
    C --> D["LOOP FILTER"]
    D --> E["f_OUT"]
    F["f_COMP < 104 MHz"] --> C
    G["÷ N = B × P + A"] --> C
    H["Dual Modulus: 3 ≤ B, 0 ≤ A ≤ B\nP = 16 FOR f_OUT > 2400 MHz\nP = 8 FOR f_OUT ≤ 2400 MHz"] --> I
    I --> J["f_OUT"]

Diagram 3: A Rational Approximation Frequency Synthesizer

One curious aspect of Rational Approximation Frequency Synthesis is that it is not obvious how to choose the values for R & N. There are mathematical techniques for rational fraction approximation however brute enumeration of the possibilities may also be used. For example, R & N can be found by starting with the lowest allowed value for R and testing to see if there is an allowed value for N which gives a result, _UT = N × f_REF / R , which is within some error band (say, ±100 ppm) of the desired frequency. Luckily, these computational requirements are modest. The required calculations can be performed on a typical microcontroller in under a millisecond.

The largest phase comparison frequencies are achieved when there are many numeric choices available to improve the chance that a particular ratio of integers can be found which will be within the error band of the desired result. This is done three ways. First, allow a large error band. (An error band of ±100 ppm is typical because a fundamental mode crystal oscillator, which is used to clean-up the reference source, can be tuned over ±100 ppm.) Second, use a high frequency reference oscillator. Third, provide a second reference, detuned slightly from the first, to provide additional numeric choices.

To ascertain how well Rational Approximation Frequency Synthesis works for the example in Diagram 3, a computer program was written to compute the R & N values for 10,000 random frequencies in the octave band between 2 GHz and 4 GHz. Using a single reference source at 200 MHz, and an allowed error band of ±100 ppm, the average phase comparison frequency was 9.79 MHz and the worst case phase comparison frequency was 400 kHz.

When a second reference frequency was available (at 201.6 MHz, as determined by trial and error while searching for the highest worst-case phase comparison frequency) the average phase comparison frequency increased to 12.94 MHz and the worse case phase comparison frequency increased to 2.35 MHz (a six-fold increase.)

Elimination of Error

Rational Approximation Frequency Synthesis provides a fast settling, low phase noise, and spur-free output, but with a troubling “error band” of typically ±100 ppm. To eliminate this error it will be necessary to provide a low noise reference that is tunable over ±100 ppm with very high resolution. A VCXO phase locked with narrow bandwidth to a DDS source may be used for this reference. A 48-bit DDS provides a frequency resolution of 1:2×10^-14 and the VCXO effectively removes all of the DDS spurs.

A tunable reference source is shown in Diagram 4. A 10 MHz timebase is multiplied in the DDS to 100 MHz. The DDS is programmed to generate an output within ±100 ppm of 18.1818 MHz. The VCXO is phase locked to the DDS output with a 100 Hz bandwidth. The clean 18.1818 MHz VCXO output is used as a source for an 11× multiplier to produce a 200 MHz reference tunable over ±100 ppm with a frequency resolution of 1:2×10^-14 . This tunable frequency reference is used as the reference for the Rational Approximation Frequency Synthesizer, eliminating the error band inherent in the technique.

graph LR
    A["10 MHz REFERENCE"] --> B["48-bit DDS WITH CLOCK MULTIPLIER"]
    B --> C["φ_DET"]
    C --> D["LOOP FILTER"]
    D --> E["18.181 MHz VCO"]
    E --> F["φ_DET"]
    F --> G["LOOP FILTER"]
    G --> H["200 MHz VCO"]
    H --> I["f_REF"]
    F --> J["BW = 1 MHz"]
    J --> K["÷ 11"]
    K --> F
    style A fill:#f9f,stroke:#333
    style H fill:#f9f,stroke:#333

Diagram 4: Tunable ( ± 100 ppm) 200 MHz Reference

Conclusion

A new method for the operation of classical integer-N PLL frequency synthesizers has been described. The method, Rational Approximation Frequency Synthesis, allows for operation at much higher phase comparison rates than the classical approach. The higher phase comparison rates allow wider PLL bandwidth to provide faster settling, lower phase noise, and spur-free outputs with virtually infinite frequency resolution.

Appendix B : Parts List

Front Display (Assemblies 320 & 321)

Ref Value Description SRS P/N

C1	4.7U - 16V X5R Ceramic, 16V, 1206, X5R 5-00611
C2	0.1U	Capacitor, 0603, X7R	5-00764
C3	0.1U	Capacitor, 0603, X7R	5-00764
C4	0.1U	Capacitor, 0603, X7R	5-00764
C5	0.1U	Capacitor, 0603, X7R	5-00764
C6	0.1U	Capacitor, 0603, X7R	5-00764
C7	0.1U	Capacitor, 0603, X7R	5-00764
C8	0.1U	Capacitor, 0603, X7R	5-00764
C9	0.1U	Capacitor, 0603, X7R	5-00764
C10	0.1U	Capacitor, 0603, X7R	5-00764
C11	0.1U	Capacitor, 0603, X7R	5-00764
D1	GREEN	LED, T-3/4, 2mm	3-00424
D2	GREEN	LED, T-3/4, 2mm	3-00424
D4	GREEN	LED, T-3/4, 2mm	3-00424
D3	GREEN	LED, T-3/4, 2mm	3-00424
D5	GREEN	LED, T-3/4, 2mm	3-00424
D6	GREEN	LED, T-3/4, 2mm	3-00424
D7	GREEN	LED, T-3/4, 2mm	3-00424
D8	GREEN	LED, T-3/4, 2mm	3-00424
D9	RED	LED, T-3/4, 2mm	3-00425

D10	GREEN LED, T-3/4, 2mm	3-00424
D11	GREEN LED, T-3/4, 2mm	3-00424
D12	GREEN LED, T-3/4, 2mm	3-00424
D13	GREEN LED, T-3/4, 2mm	3-00424
D14	GREEN LED, T-3/4, 2mm	3-00424
D15	GREEN LED, T-3/4, 2mm	3-00424
D16	GREEN LED, T-3/4, 2mm	3-00424
D17	GREEN LED, T-3/4, 2mm	3-00424
D18	GREEN LED, T-3/4, 2mm	3-00424
D19	GREEN LED, T-3/4, 2mm	3-00424
D20	GREEN LED, T-3/4, 2mm	3-00424
D21	GREEN LED, T-3/4, 2mm	3-00424
D22	GREEN LED, T-3/4, 2mm	3-00424
D23	GREEN LED, T-3/4, 2mm	3-00424
D24	GREEN LED, T-3/4, 2mm	3-00424
D25	GREEN LED, T-3/4, 2mm	3-00424
D26	GREEN LED, T-3/4, 2mm	3-00424
D27	GREEN LED, T-3/4, 2mm	3-00424
D28	GREEN LED, T-3/4, 2mm	3-00424
D29	GREEN LED, T-3/4, 2mm	3-00424
D30	GREEN LED, T-3/4, 2mm	3-00424
D31	GREEN LED, T-3/4, 2mm	3-00424
D32	GREEN LED, T-3/4, 2mm	3-00424
D33	GREEN LED, T-3/4, 2mm	3-00424
D34	GREEN LED, T-3/4, 2mm	3-00424
D35	GREEN LED, T-3/4, 2mm	3-00424
D36	GREEN LED, T-3/4, 2mm	3-00424
D37	GREEN LED, T-3/4, 2mm	3-00424
D38	GREEN LED, T-3/4, 2mm	3-00424
D39	GREEN LED, T-3/4, 2mm	3-00424
D40	GREEN LED, T-3/4, 2mm	3-00424
D41	GREEN LED, T-3/4, 2mm	3-00424
D42	GREEN LED, T-3/4, 2mm	3-00424
D43	GREEN LED, T-3/4, 2mm	3-00424
D44	GREEN LED, T-3/4, 2mm	3-00424
D45	GREEN LED, T-3/4, 2mm	3-00424
D46	GREEN LED, T-3/4, 2mm	3-00424
D47	RED	LED, T-3/4, 2mm	3-00425
JP1	9 PIN	Connector	1-01308
PC1	SG385 F/P	Fabricated component	7-02099

Q1	MBT3906DW1	Dual PNP Transistor	3-01419
Q2	MBT3906DW1	Dual PNP Transistor	3-01419
Q3	MBT3906DW1	Dual PNP Transistor	3-01419
Q4	MBT3906DW1	Dual PNP Transistor	3-01419
Q5	MBT3906DW1	Dual PNP Transistor	3-01419
Q6	MBT3906DW1	Dual PNP Transistor	3-01419
Q7	MBT3906DW1	Dual PNP Transistor	3-01419
Q8	MBT3906DW1	Dual PNP Transistor	3-01419
Q9	MBT3906DW1	Dual PNP Transistor	3-01419
Q10	MBT3906DW1	Dual PNP Transistor	3-01419
Q11	MBT3906DW1	Dual PNP Transistor	3-01419
Q12	MBT3906DW1	Dual PNP Transistor	3-01419
Q13	MBT3906DW1	Dual PNP Transistor	3-01419
Q14	MBT3906DW1	Dual PNP Transistor	3-01419
Q15	MBT3906DW1	Dual PNP Transistor	3-01419
Q16	MBT3906DW1	Dual PNP Transistor	3-01419
R1	49.9K	Resistor, 0603, Thin Film	4-02320
R2	20.0K	Resistor, 0603, Thin Film	4-02282
R3	499	Resistor, 0603, Thin Film	4-02128
R4	499	Resistor, 0603, Thin Film	4-02128
R5	100	Resistor, 0603, Thin Film	4-02061
R6	100	Resistor, 0603, Thin Film	4-02061
RN1	8 X 680	Resistor network	4-02531
RN2	8 X 680	Resistor network	4-02531
RN3	8 X 680	Resistor network	4-02531
RN4	8 X 680	Resistor network	4-02531
RN5	8 X 680	Resistor network	4-02531
RN6	8 X 680	Resistor network	4-02531
RN7	8 X 680	Resistor network	4-02531
RN8	8 X 680	Resistor network	4-02531
RN9	8 X 680	Resistor network	4-02531
RN10	8 X 680	Resistor network	4-02531
RN11	8 X 680	Resistor network	4-02531
RN12	8 X 680	Resistor network	4-02531
RN13	8 X 680	Resistor network	4-02531
RN14	8 X 680	Resistor network	4-02531
RN15	8 X 680	Resistor network	4-02531
RN16	8 X 680	Resistor network	4-02531
RN17	8X100	Resistor network	4-02497
RN18	8X100	Resistor network	4-02497
RN19	8X100	Resistor network	4-02497
RN20	8X100	Resistor network	4-02497
RN21	8X100	Resistor network	4-02497
RN22	8X100	Resistor network	4-02497
RN23	8 X 680	Resistor network	4-02531
RN24	8 X 680	Resistor network	4-02531
RN25	10KX4D	Resistor network	4-00912
RN26	10KX4D	Resistor network	4-00912
RN27	10KX4D	Resistor network	4-00912
RN28	10KX4D	Resistor network	4-00912
RN29	10KX4D	Resistor network	4-00912
RN30	10KX4D	Resistor network	4-00912
RN31	10KX4D	Resistor network	4-00912
RN32	10KX4D	Resistor network	4-00912
RN33	10KX4D	Resistor network	4-00912
U1	HDSP-A101	Seven Segment Display	3-00290
U2	HDSP-A101	Seven Segment Display	3-00290
U3	HDSP-A101	Seven Segment Display	3-00290
U4	HDSP-A101	Seven Segment Display	3-00290
U5	HDSP-A101	Seven Segment Display	3-00290
U6	HDSP-A101	Seven Segment Display	3-00290
U7	HDSP-A101	Seven Segment Display	3-00290
U8	HDSP-A101	Seven Segment Display	3-00290
U9	HDSP-A101	Seven Segment Display	3-00290
U10	HDSP-A101	Seven Segment Display	3-00290
U11	HDSP-A101	Seven Segment Display	3-00290
U12	HDSP-A101	Seven Segment Display	3-00290
U13	HDSP-A101	Seven Segment Display	3-00290
U14	HDSP-A101	Seven Segment Display	3-00290
U15	HDSP-A101	Seven Segment Display	3-00290

Parts List 134

U16	HDSP-A101 Seven Segment Display 3-00290
U17	74HC595ADT Shift Register/Latch 3-00672
U18	74HC595ADT Shift Register/Latch 3-00672
U19	74HC595ADT Shift Register/Latch 3-00672
U20	74HC595ADT Shift Register/Latch 3-00672
U21	74HC595ADT Shift Register/Latch 3-00672
U22	74HC595ADT Shift Register/Latch 3-00672
U23	74HC595ADT Shift Register/Latch 3-00672
U24	74HC595ADT Shift Register/Latch 3-00672
U25	74HC595ADT Shift Register/Latch 3-00672
U26	74HC595ADT Shift Register/Latch 3-00672
U27	74HC595ADT Shift Register/Latch 3-00672
U28	74HC595ADT Shift Register/Latch 3-00672
U29	74HC595ADT Shift Register/Latch 3-00672
U30	74HC595ADT Shift Register/Latch 3-00672
U31	74HC595ADT Shift Register/Latch 3-00672
U32	74HC595ADT Shift Register/Latch 3-00672
U33	74LVC3G34DCTR Triple non-inverting buffer 3-01852
U34	74LVC2G08DCT Single 2-input AND gate 3-01656
U35	74LVC2G04 Dual inverting buffer 3-01968
U36	74HC595ADT Shift Register/Latch 3-00672
U37	74HC595ADT Shift Register/Latch 3-00672
U38	74HC595ADT Shift Register/Latch 3-00672
U39	74HC595ADT Shift Register/Latch 3-00672
U40	74HC595ADT Shift Register/Latch 3-00672
U41	74HC595ADT Shift Register/Latch 3-00672
U42	74HC595ADT Shift Register/Latch 3-00672
U43	74HC595ADT Shift Register/Latch 3-00672
U44	74LVC1G125DBV Single tri-state buffer 3-01886
U45	74HC165 Shift register, PI/SO 3-01969
U46	74HC165 Shift register, PI/SO 3-01969
U47	74HC165 Shift register, PI/SO 3-01969
U48	74HC165 Shift register, PI/SO 3-01969
U49	74HC165 Shift register, PI/SO 3-01969
U50	ADCMP371 Comparator 3-01970
Z0	PS300-40 Fabricated component 7-0021
Z1	SG385,FR CHASSI Fabricated component 7-02106
Z2	SG385 KEYPAD Fabricated component 7-0211
Z3	SG385 LEXAN Fabricated component 7-0211
Z4	SIM-PCB S/N Label 9-01570
Z5	4-40X1/4PF Hardware 0-00150

R2	49.9	Resistor, 0603, Thin Film	4-02032
R3	49.9	Resistor, 0603, Thin Film	4-02032
R4	49.9	Resistor, 0603, Thin Film	4-02032
R5	49.9	Resistor, 0603, Thin Film	4-02032
R6	49.9	Resistor, 0603, Thin Film	4-02032
R7	49.9	Resistor, 0603, Thin Film	4-02032
R8	49.9	Resistor, 0603, Thin Film	4-02032
R9	49.9	Resistor, 0603, Thin Film	4-02032
R10	49.9	Resistor, 0603, Thin Film	4-02032
R11	49.9	Resistor, 0603, Thin Film	4-02032
R12	49.9	Resistor, 0603, Thin Film	4-02032
R14	49.9	Resistor, 0603, Thin Film	4-02032
R13	49.9	Resistor, 0603, Thin Film	4-02032
Z0 SIM-PCB S/N		Label	9-01570

Motherboard

(Assemblies 322 & 323)

Ref	Value	Description	SRS P/N
C100	1000P	Capacitor, 0603, NPO	5-00740
C101	0.1U	Capacitor, 0603, X7R	5-00764
C102	0.1U	Capacitor, 0603, X7R	5-00764
C103	10P	Capacitor, 0603, NPO	5-00692
C104	0.1U	Capacitor, 0603, X7R	5-00764
C105	.47U	CAP, 1206, X7R	5-00527
C106	1000P	Capacitor, 0603, NPO	5-00740
C107	.47U	CAP, 1206, X7R	5-00527
C108	.01U	Capacitor, 0603, X7R	5-00752
C109	.01U	Capacitor, 0603, X7R	5-00752
C110	47P	Capacitor, 0603, NPO	5-00708
C111	470P	Capacitor, 0603, NPO	5-00732
C112	.01U	Capacitor, 0603, X7R	5-00752
C113	0.1U	Capacitor, 0603, X7R	5-00764
C114	10P	Capacitor, 0603, NPO	5-00692
C115	.01U	Capacitor, Metal film 5-00052
C116	1000P	Capacitor, 0603, NPO	5-00740
C117	100P	Capacitor, 0603, NPO	5-00716
C118	0.1U	Capacitor, 0603, X7R	5-00764
C119	1.0U	Capacitor, Metal film 5-00245
C120	1000P	Capacitor, 0603, NPO	5-00740
C121	0.1U	Capacitor, 0603, X7R	5-00764
C122	.22U	Capacitor, Metal film 5-00057
C123	0.1U	Capacitor, 0603, X7R	5-00764
C124	.047U	Capacitor, Metal film 5-00054
C125	0.1U	Capacitor, 0603, X7R	5-00764
C126	0.1U	Capacitor, 0603, X7R	5-00764
C127	.01U	Capacitor, 0603, X7R	5-00752
C128	0.1U	Capacitor, 0603, X7R	5-00764
C129	.47U	CAP, 1206, X7R	5-00527
C130	.47U	CAP, 1206, X7R	5-00527
C131	.47U	CAP, 1206, X7R	5-00527
C132	39P	Capacitor, 0603, NPO	5-00706
C133	1000P	Capacitor, 0603, NPO	5-00740
C134	.47U	CAP, 1206, X7R	5-00527
C135	0.1U	Capacitor, 0603, X7R	5-00764
C136	1000P	Capacitor, 0603, NPO	5-00740
C137	330P	Capacitor, 0603, NPO	5-00728
C138	330P	Capacitor, 0603, NPO	5-00728
C139	100P	Capacitor, 0603, NPO	5-00716
C140	330P	Capacitor, 0603, NPO	5-00728
C141	.047U	Capacitor, Metal film 5-00054
C142	0.1U	Capacitor, 0603, X7R	5-00764
C143	0.1U	Capacitor, 0603, X7R	5-00764
C144	1000P	Capacitor, 0603, NPO	5-00740
C200	0.1U	Capacitor, 0603, X7R	5-00764
C201	0.1U	Capacitor, 0603, X7R	5-00764
C202	0.1U	Capacitor, 0603, X7R	5-00764
C203	0.1U	Capacitor, 0603, X7R	5-00764
C204	.01U	Capacitor, 0603, X7R	5-00752
C205	0.1U	Capacitor, 0603, X7R	5-00764
C206	.01U	Capacitor, 0603, X7R	5-00752
C207	0.1U	Capacitor, 0603, X7R	5-00764
C208	.01U	Capacitor, 0603, X7R	5-00752
C209	.01U	Capacitor, 0603, X7R	5-00752
C210	.01U	Capacitor, 0603, X7R	5-00752
C211	.01U	Capacitor, 0603, X7R	5-00752
C212	47P	Capacitor, 0603, NPO	5-00708

Front Display EMI Filter (Assembly 324)

Ref	Value	Description	SRS P/N
C1	1000P	Capacitor, 0603, NPO	5-00740
C2	1000P	Capacitor, 0603, NPO	5-00740
C3	1000P	Capacitor, 0603, NPO	5-00740
C4	22P	Capacitor, 0603, NPO	5-00700
C5	22P	Capacitor, 0603, NPO	5-00700
C6	22P	Capacitor, 0603, NPO	5-00700
C7	22P	Capacitor, 0603, NPO	5-00700
C8	22P	Capacitor, 0603, NPO	5-00700
C9	22P	Capacitor, 0603, NPO	5-00700
C10	22P	Capacitor, 0603, NPO	5-00700
C11	22P	Capacitor, 0603, NPO	5-00700
C12	22P	Capacitor, 0603, NPO	5-00700
C13	22P	Capacitor, 0603, NPO	5-00700
C14	22P	Capacitor, 0603, NPO	5-00700
C15	22P	Capacitor, 0603, NPO	5-00700
C16	22P	Capacitor, 0603, NPO	5-00700
C17	22P	Capacitor, 0603, NPO	5-00700
J2	9 PIN R/A T-H	Connector	1-01302
J3	9P FEM/T-H	Connector	1-01303
L1	2506031517Y0	Inductor BEAD 0603	6-00759
L2	2506031517Y0	Inductor BEAD 0603	6-00759
L3	2506031517Y0	Inductor BEAD 0603	6-00759
L4	2506031517Y0	Inductor BEAD 0603	6-00759
L5	2506031517Y0	Inductor BEAD 0603	6-00759
PCB1	SG385 F/P FLTER Fabricated component		7-02208
R1	49.9	Resistor, 0603, Thin Film	4-02032

Parts List 135

C213 47P Capacitor, 0603, NPO 5-00708	C333 0.1U Capacitor, 0603, X7R 5-00764
C214 47P Capacitor, 0603, NPO 5-00708	C334 0.1U Capacitor, 0603, X7R 5-00764
C215 .01U Capacitor, 0603, X7R 5-00752	C335 0.1U Capacitor, 0603, X7R 5-00764
C216 .022U Capacitor, 0603, X7R 5-00756	C336 100P Capacitor, 0603, NPO 5-00716
C217 .01U Capacitor, 0603, X7R 5-00752	C337 100P Capacitor, 0603, NPO 5-00716
C218 220P Capacitor, 0603, NPO 5-00724	C400 0.1U Capacitor, 0603, X7R 5-00764
C219 470P Capacitor, 0603, NPO 5-00732	C401 0.1U Capacitor, 0603, X7R 5-00764
C220 220P Capacitor, 0603, NPO 5-00724	C402 .01U Capacitor, 0603, X7R 5-00752
C221 0.1U Capacitor, 0603, X7R 5-00764	C403 .01U Capacitor, 0603, X7R 5-00752
C222 0.1U Capacitor, 0603, X7R 5-00764	C404 .01U Capacitor, 0603, X7R 5-00752
C223 0.1U Capacitor, 0603, X7R 5-00764	C406 .01U Capacitor, 0603, X7R 5-00752
C224 0.1U Capacitor, 0603, X7R 5-00764	C407 .01U Capacitor, 0603, X7R 5-00752
C225 0.1U Capacitor, 0603, X7R 5-00764	C409 .01U Capacitor, 0603, X7R 5-00752
C226 0.1U Capacitor, 0603, X7R 5-00764	C410 .01U Capacitor, 0603, X7R 5-00752
C227 1000P Capacitor, 0603, NPO 5-00740	C412 .01U Capacitor, 0603, X7R 5-00752
C228 1000P Capacitor, 0603, NPO 5-00740	C413 .01U Capacitor, 0603, X7R 5-00752
C229 1000P Capacitor, 0603, NPO 5-00740	C414 .01U Capacitor, 0603, X7R 5-00752
C230 0.1U Capacitor, 0603, X7R 5-00764	C415 0.1U Capacitor, 0603, X7R 5-00764
C231 0.1U Capacitor, 0603, X7R 5-00764	C416 0.1U Capacitor, 0603, X7R 5-00764
C232 0.1U Capacitor, 0603, X7R 5-00764	C417 .01U Capacitor, 0603, X7R 5-00752
C233 0.1U Capacitor, 0603, X7R 5-00764	C419 .01U Capacitor, 0603, X7R 5-00752
C234 .47U CAP, 1206, X7R 5-00527	C420 .01U Capacitor, 0603, X7R 5-00752
C235 .47U CAP, 1206, X7R 5-00527	C421 .01U Capacitor, 0603, X7R 5-00752
C236 0.1U Capacitor, 0603, X7R 5-00764	C422 .01U Capacitor, 0603, X7R 5-00752
C237 .01U Capacitor, Metal film 5-00052	C424 .01U Capacitor, 0603, X7R 5-00752
C238 10UF / 6.3V Capacitor, 0609 5-00657	C427 .01U Capacitor, 0603, X7R 5-00752
C239 0.1U Capacitor, 0603, X7R 5-00764	C429 .01U Capacitor, 0603, X7R 5-00752
C240 0.1U Capacitor, 0603, X7R 5-00764	C430 .01U Capacitor, 0603, X7R 5-00752
C241 0.1U Capacitor, 0603, X7R 5-00764	C431 .01U Capacitor, 0603, X7R 5-00752
C242 0.1U Capacitor, 0603, X7R 5-00764	C432 .01U Capacitor, 0603, X7R 5-00752
C243 0.1U Capacitor, 0603, X7R 5-00764	C433 .01U Capacitor, 0603, X7R 5-00752
C244 0.1U Capacitor, 0603, X7R 5-00764	C434 .01U Capacitor, 0603, X7R 5-00752
C245 0.1U Capacitor, 0603, X7R 5-00764	C437 .01U Capacitor, 0603, X7R 5-00764
C246 10UF / 6.3V Capacitor, 0610 5-00657	C438 .01U Capacitor, 0603, X7R 5-00764
C247 .39U - PP Polypropylene, 63V, SMD 5-00837	C439 .01U Capacitor, 0603, X7R 5-00764
C248 100P Capacitor, 0603, NPO 5-00716	C440 .01U Capacitor, 0603, X7R 5-00764
C249 .01U Capacitor, Metal film 5-00052	C500 .01U Capacitor, 0603, X7R 5-00764
C250 56P Capacitor, 0603, NPO 5-00710	C501 .01U Capacitor, 0603, X7R 5-00764
C251 .01U Capacitor, Metal film 5-00052	C502 .01U Capacitor, 0603, X7R 5-00764
C252 220P Capacitor, 0603, NPO 5-00724	C503 .01U Capacitor, 0603, X7R 5-00764
C253 220P Capacitor, 0603, NPO 5-00724	C504 .01U Capacitor, 0603, X7R 5-00764
C254 120P Capacitor, 0603, NPO 5-00718	C505 2.2UF 16V /0603 Ceramic 16V, 0603, X5R 5-00656
C255 56P Capacitor, 0603, NPO 5-00710	C506 .01U Capacitor, 0603, X7R 5-00764
C256 .39U - PP Polypropylene, 63V, SMD 5-00837	C507 2.7P Capacitor, 0603, NPO 5-00677
C258 .047U Capacitor, Metal film 5-00054	C508 .01U Capacitor, 0603, X7R 5-00764
C259 .047U Capacitor, Metal film 5-00054	C509 18P Capacitor, 0603, NPO 5-00698
C260 0.1U Capacitor, 0603, X7R 5-00764	C510 .39U - PP Polypropylene, 63V, SMD 5-00837
C261 0.1U Capacitor, 0603, X7R 5-00764	C511 100P Capacitor, 0603, NPO 5-00716
C300 .22U / 16V Capacitor, 0603, X7R 5-00836	C512 330P Capacitor, 0603, NPO 5-00728
C301 0.1U Capacitor, 0603, X7R 5-00764	C513 1000P Capacitor, 0603, NPO 5-00740
C302 0.1U Capacitor, 0603, X7R 5-00764	C514 330P Capacitor, 0603, NPO 5-00728
C303 .22U / 16V Capacitor, 0603, X7R 5-00836	C515 2.2UF 16V /0603 Ceramic 16V, 0603, X5R 5-00656
C304 .22U / 16V Capacitor, 0603, X7R 5-00836	C516 .01U Capacitor, 0603, X7R 5-00764
C305 .22U / 16V Capacitor, 0603, X7R 5-00836	C517 1UF 16V /0603 Ceramic 16V, 0603, X5R 5-00661
C306 .22U / 16V Capacitor, 0603, X7R 5-00836	C518 1UF 16V /0603 Ceramic 16V, 0603, X5R 5-00661
C307 .22U / 16V Capacitor, 0603, X7R 5-00836	C519 .01U Capacitor, 0603, X7R 5-00764
C308 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807	C520 .01U Capacitor, 0603, X7R 5-00764
C309 0.1U Capacitor, 0603, X7R 5-00764	C521 .01U Capacitor, 0603, X7R 5-00764
C310 .22U / 16V Capacitor, 0603, X7R 5-00836	C522 .01U Capacitor, 0603, X7R 5-00764
C311 0.1U Capacitor, 0603, X7R 5-00764	C523 1000P Capacitor, 0603, NPO 5-00740
C312 .22U / 16V Capacitor, 0603, X7R 5-00836	C524 6800P Capacitor, 0603, X7R 5-00750
C313 100P Capacitor, 0603, NPO 5-00716	C525 .01U Capacitor, 0603, X7R 5-00764
C314 0.1U Capacitor, 0603, X7R 5-00764	C526 .01U Capacitor, 0603, X7R 5-00764
C315 0.1U Capacitor, 0603, X7R 5-00764	C527 .01U Capacitor, 0603, X7R 5-00764
C316 0.1U Capacitor, 0603, X7R 5-00764	C528 .01U Capacitor, 0603, X7R 5-00764
C317 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807	C529 1000P Capacitor, 0603, NPO 5-00740
C318 0.1U Capacitor, 0603, X7R 5-00764	C530 6800P Capacitor, 0603, X7R 5-00750
C319 0.1U Capacitor, 0603, X7R 5-00764	C531 .01U Capacitor, 0603, X7R 5-00764
C320 0.1U Capacitor, 0603, X7R 5-00764	C532 1000P Capacitor, 0603, NPO 5-00740
C321 0.1U Capacitor, 0603, X7R 5-00764	C533 6800P Capacitor, 0603, X7R 5-00750
C323 0.1U Capacitor, 0603, X7R 5-00764	C534 .01U Capacitor, 0603, X7R 5-00764
C324 0.1U Capacitor, 0603, X7R 5-00764	C535 .01U Capacitor, 0603, X7R 5-00764
C325 0.1U Capacitor, 0603, X7R 5-00764	C536 1000P Capacitor, 0603, NPO 5-00740
C326 0.1U Capacitor, 0603, X7R 5-00764	C537 6800P Capacitor, 0603, X7R 5-00750
C327 0.1U Capacitor, 0603, X7R 5-00764	C538 .01U Capacitor, 0603, X7R 5-00764
C328 0.1U Capacitor, 0603, X7R 5-00764	C539 .01U Capacitor, 0603, X7R 5-00764
C329 0.1U Capacitor, 0603, X7R 5-00764	C540 100P Capacitor, 0603, NPO 5-00716
C330 0.1U Capacitor, 0603, X7R 5-00764	C541 680P Capacitor, 0603, NPO 5-00736
C331 0.1U Capacitor, 0603, X7R 5-00764	C542 .01U Capacitor, 0603, X7R 5-00764
C332 .01U Capacitor, 0603, X7R 5-00752	C543 .01U Capacitor, 0603, X7R 5-00764

Parts List 136

C544 0.1U Capacitor, 0603, X7R 5-00764	C723 0.1U Capacitor, 0603, X7R 5-00764
C545 100P Capacitor, 0603, NPO 5-00716	C724 0.1U Capacitor, 0603, X7R 5-00764
C546 680P Capacitor, 0603, NPO 5-00736	C725 0.1U Capacitor, 0603, X7R 5-00764
C547 0.1U Capacitor, 0603, X7R 5-00764	C800 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807
C548 0.1U Capacitor, 0603, X7R 5-00764	C801 1000P Capacitor, 0603, NPO 5-00740
C549 0.1U Capacitor, 0603, X7R 5-00764	C802 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807
C550 0.1U Capacitor, 0603, X7R 5-00764	C803 0.1U Capacitor, 0603, X7R 5-00764
C551 100P Capacitor, 0603, NPO 5-00716	C804 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807
C552 680P Capacitor, 0603, NPO 5-00736	C805 0.1U Capacitor, 0603, X7R 5-00764
C553 0.1U Capacitor, 0603, X7R 5-00764	C806 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807
C554 0.1U Capacitor, 0603, X7R 5-00764	C807 .01U Capacitor, 0603, X7R 5-00752
C555 100P Capacitor, 0603, NPO 5-00716	C808 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807
C556 680P Capacitor, 0603, NPO 5-00736	C809 0.1U Capacitor, 0603, X7R 5-00764
C557 0.1U Capacitor, 0603, X7R 5-00764	C810 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807
C558 0.1U Capacitor, 0603, X7R 5-00764	C811 0.1U Capacitor, 0603, X7R 5-00764
C559 0.1U Capacitor, 0603, X7R 5-00764	C812 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807
C600 0.1U Capacitor, 0603, X7R 5-00764	C813 0.1U Capacitor, 0603, X7R 5-00764
C601 0.1U Capacitor, 0603, X7R 5-00764	C814 10UF / 6.3V Capacitor, 0615 5-00657
C602 1000P Capacitor, 0603, NPO 5-00740	C815 0.1U Capacitor, 0603, X7R 5-00764
C603 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807	C816 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807
C604 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807	C817 0.1U Capacitor, 0603, X7R 5-00764
C605 .01U Capacitor, 0603, X7R 5-00752	C818 1000P Capacitor, 0603, NPO 5-00740
C606 .01U Capacitor, 0603, X7R 5-00752	C819 0.1U Capacitor, 0603, X7R 5-00764
C607 0.1U Capacitor, 0603, X7R 5-00764	C820 10UF / 6.3V Capacitor, 0616 5-00657
C608 10UF / 6.3V Capacitor, 0611 5-00657	C821 0.1U Capacitor, 0603, X7R 5-00764
C609 0.1U Capacitor, 0603, X7R 5-00764	C822 2200P Capacitor, 0603, X7R 5-00764
C610 0.1U Capacitor, 0603, X7R 5-00764	C823 0.1U Capacitor, 0603, X7R 5-00764
C611 0.1U Capacitor, 0603, X7R 5-00764	C824 0.1U Capacitor, 0603, X7R 5-00764
C612 0.1U Capacitor, 0603, X7R 5-00764	C825 10UF / 6.3V Capacitor, 0617 5-00657
C613 0.1U Capacitor, 0603, X7R 5-00764	C826 0.1U Capacitor, 0603, X7R 5-00764
C614 0.1U Capacitor, 0603, X7R 5-00764	C827 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807
C615 0.1U Capacitor, 0603, X7R 5-00764	C828 0.1U Capacitor, 0603, X7R 5-00764
C616 10UF / 6.3V Capacitor, 0612 5-00657	C829 .01U Capacitor, 0603, X7R 5-00752
C617 0.1U Capacitor, 0603, X7R 5-00764	C830 0.1U Capacitor, 0603, X7R 5-00764
C619 .047U Capacitor, Metal film 5-00054	C831 10U/T16 SMD TANTALUM, C-Case 5-00471
C620 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807	C832 0.1U Capacitor, 0603, X7R 5-00764
C621 10UF / 6.3V Capacitor, 0613 5-00657	C833 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807
C622 0.1U Capacitor, 0603, X7R 5-00764	D100 MMBV609 DUAL VARACTER 3-00803
C623 0.1U Capacitor, 0603, X7R 5-00764	D101 BAV99 DUAL SERIES DIODE 3-00896
C624 0.1U Capacitor, 0603, X7R 5-00764	D200 MMBV609 DUAL VARACTER 3-00803
C625 0.1U Capacitor, 0603, X7R 5-00764	D201 MMBV609 DUAL VARACTER 3-00803
C626 0.1U Capacitor, 0603, X7R 5-00764	D202 MMBV609 DUAL VARACTER 3-00803
C627 0.1U Capacitor, 0603, X7R 5-00764	D500 MMBZ5222BLT1G 2.5V Zener 3-02013
C628 0.1U Capacitor, 0603, X7R 5-00764	D501 BAV99 DUAL SERIES DIODE 3-00896
C629 10UF / 6.3V Capacitor, 0614 5-00657	D502 BAV99 DUAL SERIES DIODE 3-00896
C630 0.1U Capacitor, 0603, X7R 5-00764	D503 MMBZ5222BLT1G 2.5V Zener 3-02013
C631 100P Capacitor, 0603, NPO 5-00716	D504 BAV99 DUAL SERIES DIODE 3-00896
C632 0.1U Capacitor, 0603, X7R 5-00764	D800 RED LED, T1 Package 3-00011
C633 .9U - PP Polypropylene, 63V, SMD 5-00837	J100 26-48-1101 Connector 1-01057
C634 .01U Capacitor, Metal film 5-00052	J101 73100-0195 Panel Mount BNC 1-01158
C635 .01U Capacitor, Metal film 5-00052	J102 73100-0195 Panel Mount BNC 1-01158
C636 10P Capacitor, 0603, NPO 5-00692	J300 26 PIN Connector 1-01178
C637 .0033U Capacitor, Metal film 5-00050	J301 DEKL-9SAT-E 9 Pin D-Sub Connector 1-01031
C638 10P Capacitor, 0603, NPO 5-00692	J302 9 PIN Connector 1-01247
C639 100P Capacitor, 0603, NPO 5-00716	J303 IEEE488/STAND. Connector, IEEE488 1-00160
C640 100P Capacitor, 0603, NPO 5-00716	J400 TSW-106-08-G-S Connector 1-01146
C641 4.7UF / 50V X5R Capacitor, 1206, X7R 5-00807	J500 73100-0195 Panel Mount BNC 1-01158
C700 0.1U Capacitor, 0603, X7R 5-00764	J501 73100-0195 Panel Mount BNC 1-01158
C701 0.1U Capacitor, 0603, X7R 5-00764	J700 34 PIN Connector 1-01256
C702 0.1U Capacitor, 0603, X7R 5-00764	J701 25 PIN Connector 1-01255
C703 0.1U Capacitor, 0603, X7R 5-00764	J800 10M156(LONG) Header, 10 Pins 1-00555
C704 0.1U Capacitor, 0603, X7R 5-00764	L100 22UH-SMT Inductor,1210, Ferrite 6-00659
C705 0.1U Capacitor, 0603, X7R 5-00764	L101 2506031517YO Inductor BEAD 0603 6-00759
C706 0.1U Capacitor, 0603, X7R 5-00764	L102 2A / 1806 BEAD SMD 1806 6-00744
C707 2.7P Capacitor, 0603, NPO 5-00677	L103 .68UH Inductor, Fixed, SMT 6-00988
C708 18P Capacitor, 0603, NPO 5-00698	L104 2506031517YO Inductor BEAD 0603 6-00759
C709 7.5P Capacitor, 0603, NPO 5-00689	L105 6.8UH -1210 Inductor,1210, Ferrite 6-00667
C710 0.1U Capacitor, 0603, X7R 5-00764	L106 2506031517YO Inductor BEAD 0603 6-00759
C711 2.7P Capacitor, 0603, NPO 5-00677	L107 6.8UH -1210 Inductor,1210, Ferrite 6-00667
C712 18P Capacitor, 0603, NPO 5-00698	L108 2506031517YO Inductor BEAD 0603 6-00759
C713 7.5P Capacitor, 0603, NPO 5-00689	L109 2506031517YO Inductor BEAD 0603 6-00759
C714 0.1U Capacitor, 0603, X7R 5-00764	L110 2506031517YO Inductor BEAD 0603 6-00759
C715 100P Capacitor, 0603, NPO 5-00716	L111 .68UH Inductor, Fixed, SMT 6-00988
C716 0.1U Capacitor, 0603, X7R 5-00764	L112 2506031517YO Inductor BEAD 0603 6-00759
C717 0.1U Capacitor, 0603, X7R 5-00764	L200 22UH-SMT Inductor,1210, Ferrite 6-00659
C718 0.1U Capacitor, 0603, X7R 5-00764	L201 22UH-SMT Inductor,1210, Ferrite 6-00659
C719 0.1U Capacitor, 0603, X7R 5-00764	L202 22UH-SMT Inductor,1210, Ferrite 6-00659
C720 0.1U Capacitor, 0603, X7R 5-00764	L203 6.8UH -1210 Inductor,1210, Ferrite 6-00667
C721 0.1U Capacitor, 0603, X7R 5-00764	L204 6.8UH -1210 Inductor,1210, Ferrite 6-00667
C722 0.1U Capacitor, 0603, X7R 5-00764	L205 6.8UH -1210 Inductor,1210, Ferrite 6-00667

Parts List 137

L206 22UH -SMT Inductor,1210, Ferrite 6-00659			L711 2506031517Y0 Inductor BEAD 0603 6-00759
L207 .68UH Inductor, Fixed, SMT 6-00988			L712 2506031517Y0 Inductor BEAD 0603 6-00759
L208 22UH -SMT Inductor,1210, Ferrite 6-00659			L800 2A / 1806	BEAD SMD 1806	6-00744
L209 2506031517Y0 Inductor BEAD 0603 6-00759			L801 2A / 1806	BEAD SMD 1806	6-00744
L210 2506031517Y0 Inductor BEAD 0603 6-00759			L802 2A / 1806	BEAD SMD 1806	6-00744
L211 2506031517Y0 Inductor BEAD 0603 6-00759			L803 2A / 1806	BEAD SMD 1806	6-00744
L212 2506031517Y0 Inductor BEAD 0603 6-00759			L804 2A / 1806	BEAD SMD 1806	6-00744
L213 2506031517Y0 Inductor BEAD 0603 6-00759			L805 2A / 1806	BEAD SMD 1806	6-00744
L214 2506031517Y0 Inductor BEAD 0603 6-00759			L806 2A / 1806	BEAD SMD 1806	6-00744
L215 2506031517Y0 Inductor BEAD 0603 6-00759			L807 2A / 1806	BEAD SMD 1806	6-00744
L216 2506031517Y0 Inductor BEAD 0603 6-00759			L808 2506031517Y0 Inductor BEAD 0603 6-00759
L217 0.33uH Fixed inductor	6-01011		PC1 SG385 M/B	Fabricated component	7-02098
L218 0.33uH Fixed inductor	6-01011		Q100 MMBT5179	MMBR5179, NPN	3-00808
L219 0.33uH Fixed inductor	6-01011		Q101 MMBTH81LT1 UHF PNP Transistor	3-00809
L220 0.33uH Fixed inductor	6-01011		Q200 MMBT5179	MMBR5179, NPN	3-00808
L221 0.33uH Fixed inductor	6-01011		Q201 MMBT5179	MMBR5179, NPN	3-00808
L222 0.33uH Fixed inductor	6-01011		Q202 MMBT5179	MMBR5179, NPN	3-00808
L300 2506031517Y0 Inductor BEAD 0603 6-00759			Q203 MMBTH81LT1 UHF PNP Transistor	3-00809
L301 2506031517Y0 Inductor BEAD 0603 6-00759			Q204 MMBTH81LT1 UHF PNP Transistor	3-00809
L302 2506031517Y0 Inductor BEAD 0603 6-00759			Q205 MMBTH81LT1 UHF PNP Transistor	3-00809
L303 2506031517Y0 Inductor BEAD 0603 6-00759			Q800 MMBT5179	MMBR5179, NPN	3-00808
L304 2506031517Y0 Inductor BEAD 0603 6-00759			R100 1.00K	Resistor, 0603, Thin Film	4-02157
L305 2506031517Y0 Inductor BEAD 0603 6-00759			R101 4.99K	Resistor, 0603, Thin Film	4-02224
L307 2506031517Y0 Inductor BEAD 0603 6-00759			R102 1.00K	Resistor, 0603, Thin Film	4-02157
L308 2506031517Y0 Inductor BEAD 0603 6-00759			R103 1.00K	Resistor, 0603, Thin Film	4-02157
L309 2506031517Y0 Inductor BEAD 0603 6-00759			R104 10.0K	Resistor, 0603, Thin Film	4-02253
L310 2506031517Y0 Inductor BEAD 0603 6-00759			R105 1.00K	Resistor, 0603, Thin Film	4-02157
L400 2506031517Y0 Inductor BEAD 0603 6-00759			R106 100	Resistor, 0603, Thin Film	4-02061
L402 2506031517Y0 Inductor BEAD 0603 6-00759			R107 30.1	Resistor, 0603, Thin Film	4-02011
L403 2506031517Y0 Inductor BEAD 0603 6-00759			R108 100K	Resistor, 0603, Thin Film	4-02349
L404 2506031517Y0 Inductor BEAD 0603 6-00759			R109 1.00K	Resistor, 0603, Thin Film	4-02157
L405 2506031517Y0 Inductor BEAD 0603 6-00759			R110 10	Resistor, 0603, Thin Film	4-01965
L406 2506031517Y0 Inductor BEAD 0603 6-00759			R111 100K	Resistor, 0603, Thin Film	4-02349
L407 2506031517Y0 Inductor BEAD 0603 6-00759			R112 10.0K	Resistor, 0603, Thin Film	4-02253
L408 2506031517Y0 Inductor BEAD 0603 6-00759			R113 10	Resistor, 0603, Thin Film	4-01965
L500 2506031517Y0 Inductor BEAD 0603 6-00759			R114 24.9	Resistor, 0603, Thin Film	4-02003
L501 2506031517Y0 Inductor BEAD 0603 6-00759			R115 1.00K	Resistor, 0603, Thin Film	4-02157
L502 2506031517Y0 Inductor BEAD 0603 6-00759			R116 10.0K	Resistor, 0603, Thin Film	4-02253
L503 10UH Inductor,1210, Ferrite 6-00684			R117 1.00K	Resistor, 0603, Thin Film	4-02157
L504 22UH -SMT Inductor,1210, Ferrite 6-00659			R118 10.0K	Resistor, 0603, Thin Film	4-02253
L505 2506031517Y0 Inductor BEAD 0603 6-00759			R119 1.00K	Resistor, 0603, Thin Film	4-02157
L506 2506031517Y0 Inductor BEAD 0603 6-00759			R120 10.0K	Resistor, 0603, Thin Film	4-02253
L507 2506031517Y0 Inductor BEAD 0603 6-00759			R121 200	Resistor, 0603, Thin Film	4-02090
L508 2506031517Y0 Inductor BEAD 0603 6-00759			R122 249	Resistor, 0603, Thin Film	4-02099
L509 6.8UH -1210 Inductor,1210, Ferrite 6-00667			R123 499	Resistor, 0603, Thin Film	4-02128
L510 6.8UH -1210 Inductor,1210, Ferrite 6-00667			R124 30.1	Resistor, 0603, Thin Film	4-02011
L511 2506031517Y0 Inductor BEAD 0603 6-00759			R125 4.99K	Resistor, 0603, Thin Film	4-02224
L512 2506031517Y0 Inductor BEAD 0603 6-00759			R126 10.0K	Resistor, 0603, Thin Film	4-02253
L513 6.8UH -1210 Inductor,1210, Ferrite 6-00667			R127 10.0K	Resistor, 0603, Thin Film	4-02253
L514 6.8UH -1210 Inductor,1210, Ferrite 6-00667			R128 49.9K	Resistor, 0603, Thin Film	4-02320
L515 2506031517Y0 Inductor BEAD 0603 6-00759			R129 49.9K	Resistor, 0603, Thin Film	4-02320
L516 2506031517Y0 Inductor BEAD 0603 6-00759			R130 100	Resistor, 0603, Thin Film	4-02061
L517 2506031517Y0 Inductor BEAD 0603 6-00759			R131 49.9K	Resistor, 0603, Thin Film	4-02320
L518 2506031517Y0 Inductor BEAD 0603 6-00759			R132 10.0K	Resistor, 0603, Thin Film	4-02253
L519 .68UH Inductor,Fixed, SMT 6-00988			R133 10.0K	Resistor, 0603, Thin Film	4-02253
L520 .68UH Inductor,Fixed, SMT 6-00988			R134 10.0K	Resistor, 0603, Thin Film	4-02253
L521 2506031517Y0 Inductor BEAD 0603 6-00759			R135 100	Resistor, 0603, Thin Film	4-02061
L522 2506031517Y0 Inductor BEAD 0603 6-00759			R136 100	Resistor, 0603, Thin Film	4-02061
L523 .68UH Inductor,Fixed, SMT 6-00988			R137 10.0K	Resistor, 0603, Thin Film	4-02253
L524 .68UH Inductor,Fixed, SMT 6-00988			R138 100	Resistor, 0603, Thin Film	4-02061
L525 2506031517Y0 Inductor BEAD 0603 6-00759			R139 1.00K	Resistor, 0603, Thin Film	4-02157
L600 2506031517Y0 Inductor BEAD 0603 6-00759			R140 10.0K	Resistor, 0603, Thin Film	4-02253
L601 2506031517Y0 Inductor BEAD 0603 6-00759			R141 4.99K	Resistor, 0603, Thin Film	4-02224
L602 2506031517Y0 Inductor BEAD 0603 6-00759			R142 10.0K	Resistor, 0603, Thin Film	4-02253
L604 2506031517Y0 Inductor BEAD 0603 6-00759			R143 30.1	Resistor, 0603, Thin Film	4-02011
L605 2506031517Y0 Inductor BEAD 0603 6-00759			R144 30.1	Resistor, 0603, Thin Film	4-02061
L606 2506031517Y0 Inductor BEAD 0603 6-00759			R145 100	Resistor, 0603, Thin Film	4-02061
L607 15ONH Fixed inductor	6-00989		R146 100	Resistor, 0603, Thin Film	4-02061
L608 15ONH Fixed inductor	6-00989		R147 49.9	Resistor, 0603, Thin Film	4-02032
L700 15ONH Fixed inductor	6-00989		R148 49.9	Resistor, 0603, Thin Film	4-02032
L701 15ONH Fixed inductor	6-00989		R149 24.9	Resistor, 0603, Thin Film	4-02003
L702 2506031517Y0 Inductor BEAD 0603 6-00759			R150 24.9	Resistor, 0603, Thin Film	4-02003
L703 2506031517Y0 Inductor BEAD 0603 6-00759			R200 4.99K	Resistor, 0603, Thin Film	4-02224
L704 2506031517Y0 Inductor BEAD 0603 6-00759			R201 1.00K	Resistor, 0603, Thin Film	4-02157
L705 2506031517Y0 Inductor BEAD 0603 6-00759			R202 2.00K	Resistor, 0603, Thin Film	4-02186
L706 15ONH Fixed inductor	6-00989		R203 1.00K	Resistor, 0603, Thin Film	4-02157
L707 15ONH Fixed inductor	6-00989		R204 4.99K	Resistor, 0603, Thin Film	4-02224
L708 2506031517Y0 Inductor BEAD 0603 6-00759			R205 1.00K	Resistor, 0603, Thin Film	4-02157
L709 2506031517Y0 Inductor BEAD 0603 6-00759			R206 1.0. K	Resistor, 0603, Thin Film	4-02253
L710 2506031517Y0 Inductor BEAD 0603 6-00759			R207 1.0. K	Resistor, 0603, Thin Film	4-02253

Parts List 138

R208 10.0K Resistor, 0603, Thin Film 4-02253	R314 100 Resistor, 0603, Thin Film 4-02061
R209 100 Resistor, 0603, Thin Film 4-02061	R500 10.0K Resistor, 0603, Thin Film 4-02253
R210 100 Resistor, 0603, Thin Film 4-02061	R501 1.00K Resistor, 0603, Thin Film 4-02157
R211 100 Resistor, 0603, Thin Film 4-02061	R502 49.9K Resistor, 0603, Thin Film 4-02320
R212 1.00K Resistor, 0603, Thin Film 4-02157	R503 10.0K Resistor, 0603, Thin Film 4-02253
R213 1.00K Resistor, 0603, Thin Film 4-02157	R504 100 Resistor, 0603, Thin Film 4-02061
R214 1.00K Resistor, 0603, Thin Film 4-02157	R505 49.9K Resistor, 0603, Thin Film 4-02320
R215 10.0K Resistor, 0603, Thin Film 4-02253	R506 49.9 Resistor, 0603, Thin Film 4-02032
R216 10.0K Resistor, 0603, Thin Film 4-02253	R507 49.9K Resistor, 0603, Thin Film 4-02320
R217 10.0K Resistor, 0603, Thin Film 4-02253	R508 200 Resistor, 0603, Thin Film 4-02090
R218 100K Resistor, 0603, Thin Film 4-02349	R509 49.9 Resistor, 0603, Thin Film 4-02032
R219 1.00K Resistor, 0603, Thin Film 4-02157	R510 100K Resistor, 0603, Thin Film 4-02349
R220 100K Resistor, 0603, Thin Film 4-02349	R511 249 Resistor, 0603, Thin Film 4-02099
R221 1.00K Resistor, 0603, Thin Film 4-02157	R512 100 Resistor, 0603, Thin Film 4-02061
R222 100K Resistor, 0603, Thin Film 4-02349	R513 100 Resistor, 0603, Thin Film 4-02061
R223 1.00K Resistor, 0603, Thin Film 4-02157	R514 49.9 Resistor, 0603, Thin Film 4-02032
R224 10 Resistor, 0603, Thin Film 4-01965	R515 49.9 Resistor, 0603, Thin Film 4-02032
R225 10 Resistor, 0603, Thin Film 4-01965	R516 49.9 Resistor, 0603, Thin Film 4-02032
R226 10 Resistor, 0603, Thin Film 4-01965	R517 53.6 Resistor, 0603, Thin Film 4-02035
R227 100K Resistor, 0603, Thin Film 4-02349	R518 49.9 Resistor, 0603, Thin Film 4-02032
R228 100K Resistor, 0603, Thin Film 4-02349	R519 499 Resistor, 0603, Thin Film 4-02128
R229 100K Resistor, 0603, Thin Film 4-02349	R520 402 Resistor, 0603, Thin Film 4-02119
R230 24.9 Resistor, 0603, Thin Film 4-02003	R521 49.9 Resistor, 0603, Thin Film 4-02032
R231 10 Resistor, 0603, Thin Film 4-01965	R522 53.6 Resistor, 0603, Thin Film 4-02035
R232 24.9 Resistor, 0603, Thin Film 4-02003	R523 49.9 Resistor, 0603, Thin Film 4-02032
R233 24.9 Resistor, 0603, Thin Film 4-02003	R524 49.9 Resistor, 0603, Thin Film 4-02032
R234 24.9 Resistor, 0603, Thin Film 4-02003	R525 2.00K Resistor, 0603, Thin Film 4-02186
R235 24.9 Resistor, 0603, Thin Film 4-02003	R526 49.9 Resistor, 0603, Thin Film 4-02032
R236 10.0K Resistor, 0603, Thin Film 4-02253	R527 49.9 Resistor, 0603, Thin Film 4-02032
R237 10.0K Resistor, 0603, Thin Film 4-02253	R528 53.6 Resistor, 0603, Thin Film 4-02035
R238 10.0K Resistor, 0603, Thin Film 4-02253	R529 49.9 Resistor, 0603, Thin Film 4-02032
R239 1.00K Resistor, 0603, Thin Film 4-02157	R530 10KX4D Network, DIP, Isolated 4-00912
R240 1.00K Resistor, 0603, Thin Film 4-02157	R531 49.9 Resistor, 0603, Thin Film 4-02032
R241 1.00K Resistor, 0603, Thin Film 4-02157	R532 53.6 Resistor, 0603, Thin Film 4-02035
R242 45.3 Resistor, 0603, Thin Film 4-02028	R533 49.9 Resistor, 0603, Thin Film 4-02032
R243 45.3 Resistor, 0603, Thin Film 4-02028	R534 53.6 Resistor, 0603, Thin Film 4-02035
R244 45.3 Resistor, 0603, Thin Film 4-02028	R535 10.0K Resistor, 0603, Thin Film 4-02253
R245 249 Resistor, 0603, Thin Film 4-02099	R536 45.3 Resistor, 0603, Thin Film 4-02028
R246 499 Resistor, 0603, Thin Film 4-02128	R537 45.3 Resistor, 0603, Thin Film 4-02028
R247 249 Resistor, 0603, Thin Film 4-02099	R538 49.9 Resistor, 0603, Thin Film 4-02032
R248 499 Resistor, 0603, Thin Film 4-02128	R539 53.6 Resistor, 0603, Thin Film 4-02035
R249 249 Resistor, 0603, Thin Film 4-02099	R540 2.00K Resistor, 0603, Thin Film 4-02186
R250 499 Resistor, 0603, Thin Film 4-02128	R541 49.9 Resistor, 0603, Thin Film 4-02032
R251 10.0K Resistor, 0603, Thin Film 4-02253	R542 53.6 Resistor, 0603, Thin Film 4-02035
R252 100K Resistor, 0603, Thin Film 4-02349	R543 45.3 Resistor, 0603, Thin Film 4-02028
R253 20.0K Resistor, 0603, Thin Film 4-02282	R544 45.3 Resistor, 0603, Thin Film 4-02028
R254 10.0K Resistor, 0603, Thin Film 4-02253	R545 49.9 Resistor, 0603, Thin Film 4-02032
R255 2.80K Resistor, 0603, Thin Film 4-02200	R546 53.6 Resistor, 0603, Thin Film 4-02035
R256 1.00K Resistor, 0603, Thin Film 4-02157	R547 2.00K Resistor, 0603, Thin Film 4-02186
R257 200 Resistor, 0603, Thin Film 4-02090	R548 2.00K Resistor, 0603, Thin Film 4-02186
R258 49.9K Resistor, 0603, Thin Film 4-02320	R549 1.00K Resistor, 0603, Thin Film 4-02157
R259 200 Resistor, 0603, Thin Film 4-02090	R550 499 Resistor, 0603, Thin Film 4-02128
R260 10.0K Resistor, 0603, Thin Film 4-02253	R551 100 Resistor, 0603, Thin Film 4-02061
R261 100 Resistor, 0603, Thin Film 4-02061	R600 49.9 Resistor, 0603, Thin Film 4-02032
R262 200 Resistor, 0603, Thin Film 4-02090	R601 49.9 Resistor, 0603, Thin Film 4-02032
R263 4.99K Resistor, 0603, Thin Film 4-02224	R602 1.00K Resistor, 0603, Thin Film 4-02157
R264 4.99K Resistor, 0603, Thin Film 4-02224	R603 1.00K Resistor, 0603, Thin Film 4-02157
R265 200 Resistor, 0603, Thin Film 4-02090	R604 10.0K Resistor, 0603, Thin Film 4-02253
R266 4.02K Resistor, 0603, Thin Film 4-02215	R605 1.00K Resistor, 0603, Thin Film 4-02157
R267 100K Resistor, 0603, Thin Film 4-02349	R606 100 Resistor, 0603, Thin Film 4-02061
R268 49.9K Resistor, 0603, Thin Film 4-02320	R607 10.0K Resistor, 0603, Thin Film 4-02253
R269 10.0K Resistor, 0603, Thin Film 4-02253	R608 30.1 Resistor, 0603, Thin Film 4-02011
R270 20.0K Resistor, 0603, Thin Film 4-02282	R609 10.0K Resistor, 0603, Thin Film 4-02253
R271 10.0K Resistor, 0603, Thin Film 4-02253	R610 100 Resistor, 0603, Thin Film 4-02061
R272 49.9 Resistor, 0603, Thin Film 4-02032	R611 1.00K Resistor, 0603, Thin Film 4-02157
R273 49.9 Resistor, 0603, Thin Film 4-02032	R612 100 Resistor, 0603, Thin Film 4-02061
R300 12.1K Resistor, 0603, Thin Film 4-02261	R613 357 Resistor, 0603, Thin Film 4-02114
R301 100 Resistor, 0603, Thin Film 4-02061	R614 20.0K Resistor, 0603, Thin Film 4-02282
R302 100 Resistor, 0603, Thin Film 4-02061	R615 1.00K Resistor, 0603, Thin Film 4-02157
R303 1.00K Resistor, 0603, Thin Film 4-02157	R616 1.00K Resistor, 0603, Thin Film 4-02061
R304 1.00K Resistor, 0603, Thin Film 4-02157	R617 4.99K Resistor, 0603, Thin Film 4-02224
R305 1.00K Resistor, 0603, Thin Film 4-02349	R618 1.00K Resistor, 0603, Thin Film 4-02061
R306 10.0K Resistor, 0603, Thin Film 4-02253	R619 49.9K Resistor, 0603, Thin Film 4-02320
R307 10.0K Resistor, 0603, Thin Film 4-02253	R620 20.0K Resistor, 0603, Thin Film 4-02282
R308 10.0K Resistor, 0603, Thin Film 4-02253	R621 10.0K Resistor, 0603, Thin Film 4-02253
R309 49.9 Resistor, 0603, Thin Film 4-02032	R700 100 Resistor, 0603, Thin Film 4-02061
R310 49.9 Resistor, 0603, Thin Film 4-02032	R701 357 Resistor, 0603, Thin Film 4-02114
R311 10.0K Resistor, 0603, Thin Film 4-02253	R702 4.99K Resistor, 0603, Thin Film 4-02224
R312 100 Resistor, 0603, Thin Film 4-02061	R703 100 Resistor, 0603, Thin Film 4-02061
R313 100 Resistor, 0603, Thin Film 4-02061	R704 45.3 Resistor, 0603, Thin Film 4-02028

Parts List 139

R705 100 Resistor, 0603, Thin Film 4-02061			U208	74LVC1G3157DBVR	SPDT Analog Switch	3-02015
R706 4.99K Resistor, 0603, Thin Film 4-02224			U209	ADA4860-1YRJZ	Current FB Op-amp	3-02003
R707 45.3 Resistor, 0603, Thin Film 4-02028			U210	ADA4860-1YRJZ	Current FB Op-amp	3-02003
R708 715 Resistor, 0603, Thin Film 4-02143			U211	ADA4860-1YRJZ	Current FB Op-amp	3-02003
R709 100 Resistor, 0603, Thin Film 4-02061			U212	74HCT4053PW	Triple 2:1 Analog MPX	3-01997
R710 357 Resistor, 0603, Thin Film 4-02114			U213	74LVC1GX04DCKR	Crystal driver	3-01998
R711 1.00K Resistor, 0603, Thin Film 4-02157			U214	LP59005D-3.3	Low noise regulator	3-01784
R712 1.00K Resistor, 0603, Thin Film 4-02157			U215	AD9852AST	200 MSPS DDS	3-01122
R713 10.0K Resistor, 0603, Thin Film 4-02253			U216	ADTL082ARMZ	Dual JFET Op amp 3-02006
R714 49.9 Resistor, 0603, Thin Film 4-02032			U217	ADF4002BRUZ	RF PLL Synthesizer	3-01755
R715 49.9 Resistor, 0603, Thin Film 4-02032			U218	TSSA623157DGS Dual SPDT Analog switch	3-02017
R716 10.0K Resistor, 0603, Thin Film 4-02253			U300	MCF52235CAL60	Coldfire CPU	3-01676
R717 49.9 Resistor, 0603, Thin Film 4-02032			U301	74HCT4051PW	8:1 Analog MPX	3-01996
R718 49.9 Resistor, 0603, Thin Film 4-02032			U302	J1011F21PNL	Connector	1-01292
R719 20.0K Resistor, 0603, Thin Film 4-02282			U303	74HCT4051PW	8:1 Analog MPX	3-01996
R720 10.0K Resistor, 0603, Thin Film 4-02253			U304	74HCT4051PW	8:1 Analog MPX	3-01996
R800 10.0K Resistor, 0603, Thin Film 4-02253			U305	74LVC3G04DCTR	Triple inverter	3-01999
R801 100K Resistor, 0603, Thin Film 4-02349			U306	65LVDS2DBV	LVDS Receiver	3-01770
R802 1.00K Resistor, 0603, Thin Film 4-02157			U307	TLV2371DBVR	Single R-R Op Amp	3-02016
R803 15.8K Resistor, 0603, Thin Film 4-02272			U308	74LVC138APWT	1:8 Decoder 3-01779
R804 100K Resistor, 0603, Thin Film 4-02349			U309	74LVC138APWT	1:8 Decoder 3-01779
R805 150K Resistor, 0603, Thin Film 4-02366			U310	M25PE20VMN6TP	2Mbit serial flash	3-01768
R806 49.9K Resistor, 0603, Thin Film 4-02320			U311	ADM3202ARUZ	RS232 Interface driver	3-01757
R807 10.0K Resistor, 0603, Thin Film 4-02253			U312	74LVC2G08DCT	Single 2-input AND gate	3-01656
R808 10.0K Resistor, 0603, Thin Film 4-02253			U313	65LVDS2DBV	LVDS Receiver	3-01770
R809 1.50K Resistor, 0603, Thin Film 4-02174			U314	74LVC1G125DBV	Single tri-state buffer	3-01886
R810 124 Resistor, 0603, Thin Film 4-02070			U315	74LVC3G04DCTR	Triple inverter	3-01999
R811 1.00K Resistor, 0603, Thin Film 4-02157			U316	TNT4882-BQ	GPIB	3-01019
R812 715 Resistor, 0603, Thin Film 4-02143			U317	74HC595ADT	Shift Register/Latch	3-00672
R813 825 Resistor, 0603, Thin Film 4-02149			U318	74LVC245APWR	Octal transceiver	3-01777
R814 1.00K Resistor, 0603, Thin Film 4-02157			U319	74HC595ADT	Shift Register/Latch	3-00672
R815 200 Resistor, 0603, Thin Film 4-02090			U320	LTC2620CGN	Octal 12-Bit DAC	3-01185
R816 124 Resistor, 0603, Thin Film 4-02070			U321	74LVC2G08DCT	Single 2-input AND gate	3-01656
R817 1.00K Resistor, 0603, Thin Film 4-02157			U322	74HC595ADT	Shift Register/Latch	3-00672
R818 715 Resistor, 0603, Thin Film 4-02143			U323	74LVC3G04DCTR	Triple inverter	3-01999
RN100 10KX4D Resistor network	4-00912		U324	DS1816R-20	3.3V Reset, Open Drain	3-02084
RN101 10KX4D Resistor network	4-00912		U400	CY62167DV30LL-5	16 Mbit SRAM	3-02007
RN103 8x150 OHM	Resistor network	4-02506	U401	XC3S400A-4FG320	Xilinx FGPA	3-02018
RN104 4x47 OHM	Resistor network	4-02505	U402	TE28F320J3D75-8	32 Mbit Flash	3-02009
RN300 100Kx4D 5%	Resistor network	4-01704	U403	74LVC1G3157DBVR	SPDT Analog Switch	3-02015
RN301 100Kx4D 5%	Resistor network	4-01704	U404	74LVC1G3157DBVR	SPDT Analog Switch	3-02015
RN302 4x47 OHM	Resistor network	4-02505	U405	74LVC1G3157DBVR	SPDT Analog Switch	3-02015
RN303 10KX4D Resistor network	4-00912		U406	74LVC1G125DBV	Single tri-state buffer	3-01886
RN304 10KX4D Resistor network	4-00912		U407	74LVC1G3157DBVR	SPDT Analog Switch	3-02015
RN400 4x100 ohm	Resistor network	4-02503	U408	74LVC1G125DBV	Single tri-state buffer	3-01886
RN700 10KX4D Resistor network	4-00912		U500	OPA2354AIDGKR	100 MHZ R-R Op Amp	3-02014
RN701 2.2KX4D	Resistor network	4-02462	U501	TLV3501ADBVT	Fast R-R Comparator	3-01782
SW800 DPDT	Switch	2-00023	U502	LTC2227CUH	12-bit, 40 MSPS ADC	3-02012
T100 TC4-1T	Transformer SMD	6-00767	U503	74LVC1G3157DBVR	SPDT Analog Switch	3-02015
T200 TC4-1T	Transformer SMD	6-00767	U504	AD8131ARMZ	Differential Amplifier	3-02001
U100 MMBD352L	DUAL SCHOTTKY DIODE	3-00538	U505	74AUC1G74DCUR	Single D-type Flip-flop	3-01774
U101 LM321MF/NOPB	Single Op Amp	3-02010	U506	74LVC1G3157DBVR	SPDT Analog Switch	3-02015
U102 LP5900SD-3.3	Low noise regulator	3-01784	U507	AD8130ARM	Differential Amplifier	3-02000
U103 74LVC1G3157DBVR	SPDT Analog Switch	3-02015	U508	AD8131ARMZ	Differential Amplifier	3-02001
U104 MMBD352L	DUAL SCHOTTKY DIODE	3-00538	U509	DAC5672AIPFB	Dual 14-bit DACs	3-02008
U105 MMBD352L	DUAL SCHOTTKY DIODE	3-00538	U510	AD8131ARMZ	Differential Amplifier	3-02001
U106 ADF4002BRUZ	RF PLL Synthesizer	3-01755	U511	74AUC1G74DCUR	Single D-type Flip-flop	3-01774
U107 ADA4860-1YRJZ	Current FB Op-amp	3-02003	U512	74HCT4053PW	Triple 2:1 Analog MPX	3-01997
U108 74LVC1G3157DBVR	SPDT Analog Switch	3-02015	U513	DAC5672AIPFB	Dual 14-bit DACs	3-02008
U109 74LVC1G3157DBVR	SPDT Analog Switch	3-02015	U514	TSSA623157DGS Dual SPDT Analog switch	3-02017
U110 ADTL082ARMZ	Dual JFET Op amp 3-02006		U515	AD8131ARMZ	Differential Amplifier	3-02001
U111 MMBD352L	DUAL SCHOTTKY DIODE	3-00538	U516	TSSA623157DGS Dual SPDT Analog switch	3-02017
U112 LP5900SD-3.3	Low noise regulator	3-01784	U517	AD8131ARMZ	Differential Amplifier	3-02001
U113 LP5900SD-3.3	Low noise regulator	3-01784	U518	74AUC1G74DCUR	Single D-type Flip-flop	3-01774
U114 74LVC1GX04DCKR	Crystal driver	3-01998	U600	AD8130ARM	Differential Amplifier	3-02000
U115 74LVC2G74DCTR	Single D-FLOP	3-01867	U601	TPS7A4901DGN	LDO ADJ Regulator	3-02179
U116 ADF4002BRUZ	RF PLL Synthesizer	3-01755	U603	AD797AR	Low Noise OPAMP	3-01426
U118 TLV2371DBVR	Single R-R Op Amp	3-02016	U604	ADF4108BCPZ	RF PLL Synthesizer	3-02004
U119 100.000MHZ	VCXO	6-00760	U605	AD9910BSVZ	1 GSPS DDS 3-02002
U120 74LVC2G74DCTR	Single D-FLOP	3-01867	U606	1GHZ	Fixed inductor	6-00990
U121 74LVC2G74DCTR	Single D-FLOP	3-01867	U700	ADA4860-1YRJZ	Current FB Op-amp	3-02003
U122 65LVDS2DBV	LVDS Receiver	3-01770	U701	TSSA623157DGS Dual SPDT Analog switch	3-02017
U200 LM321MF/NOPB	Single Op Amp	3-02010	U702	LMH6552MAX	1 GHz Diff Amp	3-02011
U201 LM321MF/NOPB	Single Op Amp	3-02010	U703	LM321MF/NOPB	Single Op Amp	3-02010
U202 LM321MF/NOPB	Single Op Amp	3-02010	U704	LM321MF/NOPB	Single Op Amp	3-02010
U203 MMBD352L	DUAL SCHOTTKY DIODE	3-00538	U705	TSSA623157DGS Dual SPDT Analog switch	3-02017
U204 MMBD352L	DUAL SCHOTTKY DIODE	3-00538	U706	AD8131ARMZ	Differential Amplifier	3-02001
U205 MMBD352L	DUAL SCHOTTKY DIODE	3-00538	U707	LM321MF/NOPB	Single Op Amp	3-02010
U206 74LVC1G3157DBVR	SPDT Analog Switch	3-02015	U708	TSSA623157DGS Dual SPDT Analog switch	3-02017
U207 74LVC1G3157DBVR	SPDT Analog Switch	3-02015	U709	AD8131ARMZ	Differential Amplifier	3-02001

Parts List 140

U710	TLV2371IDBVR Single R-R Op Amp 3-02016
U800	LM393 Dual Comparator, SO-8 3-00728
U801	LP2951CMM LP2951C, ADJ Regulator 3-01415
U802	LP3878SD-ADJ ADJ Positive Regulator 3-01764
U803	LM317D2T ADJ Positive Regulator 3-01473
U804	LP3878SD-ADJ ADJ Positive Regulator 3-01764
U805	ADR443ARMZ 3V Voltage reference 3-02005
U806	LP3878SD-ADJ ADJ Positive Regulator 3-01764
U807	LM337D2T Neg ADJ regulator 3-01481
U808	LD1086D2T33TR REG POS LDO 3.3V 3-02086
Y100	20,000,000HZ 3RD OT, AT Cut, HC49U 6-00643
Y200	19.5541 MHZ Fund, AT Cut, HC49U 6-00822
Y201	19.607843 MHZ 3RD OT, AT Cut, HC49U 6-00823
Y202	19.6617 MHZ Fund, AT Cut, HC49U 6-00824
Z0	SG385 BRACKET Fabricated component 7-02113
Z1	SG385 TOP EMI S Fabricated component 7-02211
Z2	SG385 BOT.EMI S Fabricated component 7-02212
Z3	SIM-PCB S/N Label 9-01570
Z4	SHEET Hardware 0-00140
Z5	4-40X1/4PP Hardware 0-00187
Z6	BUMPER Hardware 0-00271
Z7	1.5 WIRE Wire 0-00772
Z8	1/2 CUSTOM Wire 0-01259
Z300	CEM-1203(42) Sounder 6-00730
RF Block Assembly 343
Ref	Value Description SRS P/N
Z0	4-40X1/4PP Hardware 0-00187
Z1	4-40X3/16PP Hardware 0-00241
Z2	2-56X3/16 HEX Hardware 0-00764
Z3	1/2 CUSTOM Wire 0-01259
Z4	18-8 STAINL Hardware 0-01346
Z5	18-8 SS SHIM, . Hardware 0-01351
Z6	REAR MOUNT JACK SMA, Rear Mount 1-00248
Z7	73100-0195 Panel Mount BNC 1-01158
Z8	172117 Connector 1-01265
Z9	SG385 RF BLOCK Fabricated component 7-02108
Z10	SG385 LEFT COVR Fabricated component 7-02109
Z11	SG385 RT COVER Fabricated component 7-02110
Z12	SG384 EMI ABSOR Fabricated component 7-02280

RF Synthesizer for SG382 and SG384 (Assembly 327)

Ref	Value	Description	SRS P/N
C100	.01U	Capacitor, 0603, X7R	5-00752
C101	4.7U - 16V X5R	Ceramic, 16V, 1206, X5R	5-00611
C102	1000P	Capacitor, 0603, NPO	5-00740
C103	.47UF 16V /0603	Cap, 16V, 0603, X5R	5-00659
C104	10UF / 6.3V	Capacitor, 0603	5-00657
C105	10UF / 6.3V	Capacitor, 0605	5-00657
C106	10UF / 6.3V	Capacitor, 0607	5-00657
C107	1000P	Capacitor, 0603, NPO	5-00740
C108	0.1U	Capacitor, 0603, X7R	5-00764
C109	.47UF 16V /0603	Cap, 16V, 0603, X5R	5-00659
C110	0.1U	Capacitor, 0603, X7R	5-00764
C111	0.1U	Capacitor, 0603, X7R	5-00764
C112	.47UF 16V /0603	Cap, 16V, 0603, X5R	5-00659
C113	0.1U	Capacitor, 0603, X7R	5-00764
C114	0.1U	Capacitor, 0603, X7R	5-00764
C115	4.7U - 16V X5R	Ceramic, 16V, 1206, X5R	5-00611
C116	0.1U	Capacitor, 0603, X7R	5-00764
C117	100P	Capacitor, 0603, NPO	5-00716
C118	0.1U	Capacitor, 0603, X7R	5-00764
C119	0.1U	Capacitor, 0603, X7R	5-00764
C120	470P	Capacitor, 0603, NPO	5-00732
C121	100P	Capacitor, 0603, NPO	5-00716
C122	100P	Capacitor, 0603, NPO	5-00716
C123	1000P	Capacitor, 0603, NPO	5-00740
C124	0.1U	Capacitor, 0603, X7R	5-00764

C125	470P	Capacitor, 0603, NPO	5-00732
C126	15P	Capacitor, 0603, NPO	5-00696
C127	15P	Capacitor, 0603, NPO	5-00696
C128	0.1UF - PPS	CAP 0.1U FILM SMD0805	5-00845
C129	100P	Capacitor, 0603, NPO	5-00716
C130	22P	Capacitor, 0603, NPO	5-00700
C131	100P	Capacitor, 0603, NPO	5-00716
C132	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C133	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C134	.01U	Capacitor, 0603, X7R	5-00752
C135	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C136	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C137	1000P	Capacitor, 0603, NPO	5-00740
C138	0.1U	Capacitor, 0603, X7R	5-00764
C139	0.1U	Capacitor, 0603, X7R	5-00764
C140	0.1U	Capacitor, 0603, X7R	5-00764
C141	0.1U	Capacitor, 0603, X7R	5-00764
C142	0.1U	Capacitor, 0603, X7R	5-00764
C143	0.1U	Capacitor, 0603, X7R	5-00764
C144	0.1U	Capacitor, 0603, X7R	5-00764
C145	22P	Capacitor, 0603, NPO	5-00700
C146	0.1U	Capacitor, 0603, X7R	5-00764
C147	1P	Capacitor, 0603, NPO	5-00668
C200	0.1U	Capacitor, 0603, X7R	5-00764
C201	1000P	Capacitor, 0603, NPO	5-00740
C202	0.1U	Capacitor, 0603, X7R	5-00764
C203	100P	Capacitor, 0603, NPO	5-00716
C204	100P	Capacitor, 0603, NPO	5-00716
C205	100P	Capacitor, 0603, NPO	5-00716
C206	100P	Capacitor, 0603, NPO	5-00716
C207	100P	Capacitor, 0603, NPO	5-00716
C208	1000P	Capacitor, 0603, NPO	5-00740
C209	0.1U	Capacitor, 0603, X7R	5-00764
C210	0.1U	Capacitor, 0603, X7R	5-00764
C211	0.1U	Capacitor, 0603, X7R	5-00764
C212	0.1U	Capacitor, 0603, X7R	5-00764
C213	0.1U	Capacitor, 0603, X7R	5-00764
C214	1000P	Capacitor, 0603, NPO	5-00740
C215	100P	Capacitor, 0603, NPO	5-00716
C216	100P	Capacitor, 0603, NPO	5-00716
C217	100P	Capacitor, 0603, NPO	5-00716
C218	1000P	Capacitor, 0603, NPO	5-00740
C219	100P	Capacitor, 0603, NPO	5-00716
C220	1000P	Capacitor, 0603, NPO	5-00740
C221	0.1U	Capacitor, 0603, X7R	5-00764
C222	0.1U	Capacitor, 0603, X7R	5-00764
C223	0.1U	Capacitor, 0603, X7R	5-00764
C224	.01U	Capacitor, 0603, X7R	5-00752
C225	1000P	Capacitor, 0603, NPO	5-00740
C226	.01U	Capacitor, 0603, X7R	5-00752
C227	0.1U	Capacitor, 0603, X7R	5-00764
C228	0.1U	Capacitor, 0603, X7R	5-00764
C229	.01U	Capacitor, 0603, X7R	5-00752
C230	.01U	Capacitor, 0603, X7R	5-00752
C231	.01U	Capacitor, 0603, X7R	5-00752
C232	0.1U	Capacitor, 0603, X7R	5-00764
C233	0.1U	Capacitor, 0603, X7R	5-00764
C234	0.1U	Capacitor, 0603, X7R	5-00764
C235	.01U	Capacitor, 0603, X7R	5-00752
C236	.01U	Capacitor, 0603, X7R	5-00752
C237	0.1U	Capacitor, 0603, X7R	5-00764
C238	0.1U	Capacitor, 0603, X7R	5-00764
C239	.01U	Capacitor, 0603, X7R	5-00752
C240	.01U	Capacitor, 0603, X7R	5-00752
C241	0.1U	Capacitor, 0603, X7R	5-00764
C242	.01U	Capacitor, 0603, X7R	5-00752
D100	BAV99WT1	DIODE DUAL Series	3-02099
D101	BAV99WT1	DIODE DUAL Series	3-02099
D102	BAV99WT1	DIODE DUAL Series	3-02099
J100	24 PIN	Connector	1-01269
J101	34 PIN	Connector	1-01272
J200	1 PIN	Connector	1-01268
J201	1 PIN RECEPT	Connector	1-01326
L100	2506031517YO	Inductor BEAD 0603	6-00759
L101	2506031517YO	Inductor BEAD 0603	6-00759
L102	270NH Fixed inductor	6-00784
L103	2506031517YO	Inductor BEAD 0603	6-00759
L104	2506031517YO	Inductor BEAD 0603	6-00759
L105	2506031517YO	Inductor BEAD 0603	6-00759
L106	2506031517YO	Inductor BEAD 0603	6-00759

Parts List 141

L107	2506031517Y0	Inductor BEAD 0603	6-00759
L109	2506031517Y0	Inductor BEAD 0603	6-00759
L110	2506031517Y0	Inductor BEAD 0603	6-00759
L200	22NH Inductor SMD 22nH	6-00999
L201	2506031517Y0	Inductor BEAD 0603	6-00759
L202	22NH Inductor SMD 22nH	6-00999
L203	2506031517Y0	Inductor BEAD 0603	6-00759
L204	2506031517Y0	Inductor BEAD 0603	6-00759
L205	2506031517Y0	Inductor BEAD 0603	6-00759
L206	2506031517Y0	Inductor BEAD 0603	6-00759
L207	2506031517Y0	Inductor BEAD 0603	6-00759
L208	2506031517Y0	Inductor BEAD 0603	6-00759
L209	2506031517Y0	Inductor BEAD 0603	6-00759
L210	2506031517Y0	Inductor BEAD 0603	6-00759
PC1	SG385 RF SYNTH Fabricated component 7-02100
R100	4.02K Resistor, 0603, Thin Film	4-02215
R101	2.32K Resistor, 0603, Thin Film	4-02192
R102	100	Resistor, 0603, Thin Film	4-02061
R103	1.00K Resistor, 0603, Thin Film	4-02157
R104	1.00K Resistor, 0603, Thin Film	4-02157
R105	49.9K Resistor, 0603, Thin Film	4-02320
R106	10.0K Resistor, 0603, Thin Film	4-02253
R107	10.0K Resistor, 0603, Thin Film	4-02253
R108	100	Resistor, 0603, Thin Film	4-02061
R109	10.0K Resistor, 0603, Thin Film	4-02253
R110	1.00K Resistor, 0603, Thin Film	4-02157
R111	1.00K Resistor, 0603, Thin Film	4-02157
R112	499	Resistor, 0603, Thin Film	4-02128
R113	200	Resistor, 0603, Thin Film	4-02090
R114	100	Resistor, 0603, Thin Film	4-02061
R115	49.9	Resistor, 0603, Thin Film	4-02032
R116	100	Resistor, 0603, Thin Film	4-02061
R117	4.99K Resistor, 0603, Thin Film	4-02224
R118	499	Resistor, 0603, Thin Film	4-02128
R119	1.00K Resistor, 0603, Thin Film	4-02157
R120	1.00K Resistor, 0603, Thin Film	4-02157
R121	1.00K Resistor, 0603, Thin Film	4-02157
R122	1.00K Resistor, 0603, Thin Film	4-02157
R123	499	Resistor, 0603, Thin Film	4-02128
R124	1.00K Resistor, 0603, Thin Film	4-02157
R125	249	Resistor, 0603, Thin Film	4-02099
R126	100	Resistor, 0603, Thin Film	4-02061
R127	49.9	Resistor, 0603, Thin Film	4-02032
R128	100	Resistor, 0603, Thin Film	4-02061
R129	100	Resistor, 0603, Thin Film	4-02061
R130	604	Resistor, 0603, Thin Film	4-02136
R131	124	Resistor, 0603, Thin Film	4-02070
R132	100	Resistor, 0603, Thin Film	4-02061
R133	604	Resistor, 0603, Thin Film	4-02136
R134	590	Resistor, 0603, Thin Film	4-02135
R135	499	Resistor, 0603, Thin Film	4-02128
R136	10.0K Resistor, 0603, Thin Film	4-02253
R137	200	Resistor, 0603, Thin Film	4-02090
R138	301	Resistor, 0603, Thin Film	4-02107
R139	200	Resistor, 0603, Thin Film	4-02090
R140	604	Resistor, 0603, Thin Film	4-02136
R141	75	Resistor, 0603, Thin Film	4-02049
R142	750	Resistor, 0603, Thin Film	4-02145
R143	750	Resistor, 0603, Thin Film	4-02145
R144	4.99K Resistor, 0603, Thin Film	4-02224
R200	22.1	Resistor, Thin Film, MELF	4-00958
R201	49.9	Resistor, 0603, Thin Film	4-02032
R202	150	Resistor, 0603, Thin Film	4-02078
R203	150	Resistor, 0603, Thin Film	4-02078
R204	49.9	Resistor, 0603, Thin Film	4-02032
R205	10	Resistor, 0603, Thin Film	4-01965
R206	24.9	Resistor, 0603, Thin Film	4-02003
R207	24.9	Resistor, 0603, Thin Film	4-02003
R208	49.9	Resistor, 0603, Thin Film	4-02032
R209	1.00K Resistor, 0603, Thin Film	4-02157
R210	49.9	Resistor, 0603, Thin Film	4-02032
R211	2.00K Resistor, 0603, Thin Film	4-02186
R212	49.9	Resistor, 0603, Thin Film	4-02032
R213	150	Resistor, 0603, Thin Film	4-02078
R214	150	Resistor, 0603, Thin Film	4-02078
R215	150	Resistor, 0603, Thin Film	4-02078
R216	150	Resistor, 0603, Thin Film	4-02078
R217	49.9	Resistor, 0603, Thin Film	4-02032
R218	49.9	Resistor, 0603, Thin Film	4-02032
R219	1.00K Resistor, 0603, Thin Film	4-02157

R220	1.00K Resistor, 0603, Thin Film 4-02157
R221	2.00K Resistor, 0603, Thin Film 4-02186
R222	2.00K Resistor, 0603, Thin Film 4-02186
R223	49.9	Resistor, 0603, Thin Film 4-02032
R224	100	Resistor, 0603, Thin Film 4-02061
R225	750	Resistor, 0603, Thin Film 4-02145
R226	49.9	Resistor, 0603, Thin Film 4-02032
R227	49.9	Resistor, 0603, Thin Film 4-02032
R228	100	Resistor, 0603, Thin Film 4-02061
R229	49.9	Resistor, 0603, Thin Film 4-02032
R230	49.9	Resistor, 0603, Thin Film 4-02032
R231	100	Resistor, 0603, Thin Film 4-02061
R232	200	Resistor, 0603, Thin Film 4-02090
R233	100	Resistor, 0603, Thin Film 4-02061
R234	2.00K Resistor, 0603, Thin Film 4-02186
R235	49.9	Resistor, 0603, Thin Film 4-02032
R236	49.9	Resistor, 0603, Thin Film 4-02032
R237	49.9	Resistor, 0603, Thin Film 4-02032
R238	100	Resistor, 0603, Thin Film 4-02061
R239	100	Resistor, 0603, Thin Film 4-02061
R240	49.9	Resistor, 0603, Thin Film 4-02032
R241	200	Resistor, 0603, Thin Film 4-02090
R242	49.9	Resistor, 0603, Thin Film 4-02032
R243	150	Resistor, 0603, Thin Film 4-02078
R244	150	Resistor, 0603, Thin Film 4-02078
R245	49.9	Resistor, 0603, Thin Film 4-02032
R246	49.9	Resistor, 0603, Thin Film 4-02032
RN100	27x4	Resistor network	4-02508
T100	TC1-1T SMT Transformer SMD		6-00671
U100	LP3878SD-ADJ	ADJ Positive Regulator	3-01764
U101	LP5900SD-3.3	Low noise regulator	3-01784
U102	LP3878SD-ADJ	ADJ Positive Regulator	3-01764
U103	LP5900SD-3.3	Low noise regulator	3-01784
U104	AD797AR	Low Noise OPAMP	3-01426
U105	DCMO190410-5	VCO 2-4 GHz	6-01002
U106	ADCLK925BCPZ	2:1 PECL Buffer	3-02026
U107	ADF4108BCPZ	RF PLL Synthesizer	3-02004
U108	DG411DVZ-T	Quad SPST Analog Switch	3-02035
U109	TLV271DBVR	Single R-R Op Amp	3-02048
U110	MC7805CDTG	5V Voltage regulator	3-02041
U111	MC79M05CDTG	5V Voltage regulator	3-02042
U112	74HC595ADT	Shift Register/Latch	3-00672
U113	74HC595ADT	Shift Register/Latch	3-00672
U114	74LVC2G08DCT	Single 2-input AND gate	3-01656
U115	LM45CIM3	Centigrade Temp Sensor 3-00775
U116	74LVC2G04	Dual inverting buffer	3-01968
U117	65LVDS2DBV	LVDS Receiver	3-01770
U118	65LVDS2DBV	LVDS Receiver	3-01770
U119	AD8131ARMZ	Differential Amplifier	3-02001
U120	TLV3501AIDBVT	Fast R-R Comparator	3-01782
U200	ADCLK925BCPZ	2:1 PECL Buffer	3-02026
U201	HMC311SC70E RF Gain Block 3-02098
U202	LFCN-3800	FILTER LP 3.8GHz	6-00996
U203	74LVC3G34DCTR	Triple non-inverting buffer	3-01852
U204	LFCN-2000	FILTER LP 2GHz	6-00995
U205	MC100EP05	2-Input PECL AND gate	3-02039
U206	HMC361S8G	DC-10 GHz Divide-by-two	3-02033
U207	74LVC3G34DCTR	Triple non-inverting buffer	3-01852
U208	LFCN-900	FILTER LP 900MHz	6-00998
U209	MC100EP32DTR2G	PECL 4 GHz Divide-by-two	3-02085
U210	LFCN-400	FILTER LP 400MHz	6-00997
U211	HMC322LP4	SP8T Non-reflective MPX	3-02031
U212	MC100EP32DTR2G	PECL 4 GHz Divide-by-two	3-02085
U213	74HCT4053PW Triple 2:1 Analog MPX		3-01997
U214	LFCN-180	FILTER LP 180MHz	6-00994
U215	MC100EP32DTR2G	PECL 4 GHz Divide-by-two	3-02085
U216	HMC322LP4	SP8T Non-reflective MPX	3-02031
U217	LFCN-80	FILTER LP 80MHz	6-01010
U218	MC100EP32DTR2G	PECL 4 GHz Divide-by-two	3-02085
Z0	SIM-PCB S/N	Label	9-01570

RF Synthesizer for SG386 (Assembly 333)

Ref Value Description SRS P/N

C100 .01U Capacitor, 0603, X7R 5-00752
C101	4.7U - 16V X5R	Ceramic, 16V, 1206, X5R	5-00611
C102	1000P	Capacitor, 0603, NPO	5-00740
C103	.47UF 16V /0603	Cap, 16V, 0603, X5R	5-00659
C104	10UF / 6.3V	Capacitor, 0604	5-00657
C105	10UF / 6.3V	Capacitor, 0606	5-00657
C106	10UF / 6.3V	Capacitor, 0608	5-00657
C107	1000P	Capacitor, 0603, NPO	5-00740
C108	0.1U	Capacitor, 0603, X7R 5-00764
C109	.47UF 16V /0603	Cap, 16V, 0603, X5R	5-00659
C110	0.1U	Capacitor, 0603, X7R 5-00764
C111	0.1U	Capacitor, 0603, X7R 5-00764
C112	.47UF 16V /0603	Cap, 16V, 0603, X5R	5-00659
C113	0.1U	Capacitor, 0603, X7R 5-00764
C114	0.1U	Capacitor, 0603, X7R 5-00764
C115	4.7U - 16V X5R	Ceramic, 16V, 1206, X5R	5-00611
C116	0.1U	Capacitor, 0603, X7R 5-00764
C117	100P	Capacitor, 0603, NPO	5-00716
C118	0.1U	Capacitor, 0603, X7R 5-00764
C119	0.1U	Capacitor, 0603, X7R 5-00764
C120	100P	Capacitor, 0603, NPO	5-00716
C121	47P	Capacitor, 0603, NPO	5-00708
C122	100P	Capacitor, 0603, NPO	5-00716
C123	1000P	Capacitor, 0603, NPO	5-00740
C124	0.1U	Capacitor, 0603, X7R 5-00764
C125	47P	Capacitor, 0603, NPO	5-00708
C126	15P	Capacitor, 0603, NPO	5-00696
C127	15P	Capacitor, 0603, NPO	5-00696
C128	.0047U	SMD PPS Film	5-00450
C129	100P	Capacitor, 0603, NPO	5-00716
C130	22P	Capacitor, 0603, NPO	5-00700
C131	100P	Capacitor, 0603, NPO	5-00716
C132	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C133	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C134	.01U Capacitor, 0603, X7R 5-00752
C135	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C136	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C137	1000P	Capacitor, 0603, NPO	5-00740
C138	0.1U	Capacitor, 0603, X7R 5-00764
C139	0.1U	Capacitor, 0603, X7R 5-00764
C140	0.1U	Capacitor, 0603, X7R 5-00764
C141	0.1U	Capacitor, 0603, X7R 5-00764
C142	0.1U	Capacitor, 0603, X7R 5-00764
C143	0.1U	Capacitor, 0603, X7R 5-00764
C144	0.1U	Capacitor, 0603, X7R 5-00764
C145	22P	Capacitor, 0603, NPO	5-00700
C146	0.1U	Capacitor, 0603, X7R 5-00764
C147	1P	Capacitor, 0603, NPO	5-00668
C148	10P	Capacitor, 0603, NPO	5-00692
C149	10P	Capacitor, 0603, NPO	5-00692
C203	100P	Capacitor, 0603, NPO	5-00716
C205	100P	Capacitor, 0603, NPO	5-00716
C206	100P	Capacitor, 0603, NPO	5-00716
C208	1000P	Capacitor, 0603, NPO	5-00740
C210	0.1U	Capacitor, 0603, X7R 5-00764
C211	0.1U	Capacitor, 0603, X7R 5-00764
C212	0.1U	Capacitor, 0603, X7R 5-00764
C214	1000P	Capacitor, 0603, NPO	5-00740
C215	100P	Capacitor, 0603, NPO	5-00716
C216	100P	Capacitor, 0603, NPO	5-00716
C217	100P	Capacitor, 0603, NPO	5-00716
C218	1000P	Capacitor, 0603, NPO	5-00740
C219	100P	Capacitor, 0603, NPO	5-00716
C220	1000P	Capacitor, 0603, NPO	5-00740
C221	0.1U	Capacitor, 0603, X7R 5-00764
C222	0.1U	Capacitor, 0603, X7R 5-00764
C223	0.1U	Capacitor, 0603, X7R 5-00764
C224	.01U Capacitor, 0603, X7R 5-00752
C226	.01U Capacitor, 0603, X7R 5-00752
C227	0.1U	Capacitor, 0603, X7R 5-00764

C228	0.1U	Capacitor, 0603, X7R 5-00764
C229	.01U Capacitor, 0603, X7R 5-00752
C230	.01U Capacitor, 0603, X7R 5-00752
C231	.01U Capacitor, 0603, X7R 5-00752
C232	0.1U	Capacitor, 0603, X7R 5-00764
C233	0.1U	Capacitor, 0603, X7R 5-00764
C234	0.1U	Capacitor, 0603, X7R 5-00764
C235	.01U Capacitor, 0603, X7R 5-00752
C236	.01U Capacitor, 0603, X7R 5-00752
C237	0.1U	Capacitor, 0603, X7R 5-00764
C238	0.1U	Capacitor, 0603, X7R 5-00764
C239	.01U Capacitor, 0603, X7R 5-00752
C240	.01U Capacitor, 0603, X7R 5-00752
C241	0.1U	Capacitor, 0603, X7R 5-00764
C242	.01U Capacitor, 0603, X7R 5-00752
C243	100P	Capacitor, 0603, NPO	5-00716
C244	0.1U	Capacitor, 0603, X7R 5-00764
C245	1000P	Capacitor, 0603, NPO	5-00740
C246	1000P	Capacitor, 0603, NPO	5-00740
C247	1000P	Capacitor, 0603, NPO	5-00740
C248	1000P	Capacitor, 0603, NPO	5-00740
C249	1000P	Capacitor, 0603, NPO	5-00740
C251	100P	Capacitor, 0603, NPO	5-00716
C252	0.1U	Capacitor, 0603, X7R 5-00764
C253	0.1U	Capacitor, 0603, X7R 5-00764
C254	1000P	Capacitor, 0603, NPO	5-00740
C255	0.1U	Capacitor, 0603, X7R 5-00764
D100	BAV99WT1	DIODE DUAL Series	3-02099
D101	BAV99WT1	DIODE DUAL Series	3-02099
D102	BAV99WT1	DIODE DUAL Series	3-02099
J100	24 PIN	Connector	1-01269
J101	34 PIN	Connector	1-01272
J200	1 PIN	Connector	1-01268
J201	1 PIN RECEPT	Connector	1-01326
L100	2506031517Y0	Inductor BEAD 0603	6-00759
L101	2506031517Y0	Inductor BEAD 0603	6-00759
L102	270NH Fixed inductor	6-00784
L103	2506031517Y0	Inductor BEAD 0603	6-00759
L104	2506031517Y0	Inductor BEAD 0603	6-00759
L105	2506031517Y0	Inductor BEAD 0603	6-00759
L106	2506031517Y0	Inductor BEAD 0603	6-00759
L107	2506031517Y0	Inductor BEAD 0603	6-00759
L109	2506031517Y0	Inductor BEAD 0603	6-00759
L110	2506031517Y0	Inductor BEAD 0603	6-00759
L204	2506031517Y0	Inductor BEAD 0603	6-00759
L205	2506031517Y0	Inductor BEAD 0603	6-00759
L206	2506031517Y0	Inductor BEAD 0603	6-00759
L207	2506031517Y0	Inductor BEAD 0603	6-00759
L208	2506031517Y0	Inductor BEAD 0603	6-00759
L209	2506031517Y0	Inductor BEAD 0603	6-00759
L210	2506031517Y0	Inductor BEAD 0603	6-00759
L211	2506031517Y0	Inductor BEAD 0603	6-00759
L212	5.6NH	Fixed inductor	6-00771
M1	2-56X3/16 HEX	Hardware	0-00764
M2	2-56X3/16 HEX	Hardware	0-00764
M3	2-56X3/16 HEX	Hardware	0-00764
M4	2-56X3/16 HEX	Hardware	0-00764
M5	2-56X3/16 HEX	Hardware	0-00764
PC1	SG386 RF Synthe	Fabricated component	7-02292
Q100	MMBT3906LT1 PNP Transistor 3-00580
R100	4.02K Resistor, 0603, Thin Film	4-02215
R101	2.32K Resistor, 0603, Thin Film	4-02192
R102	100	Resistor, 0603, Thin Film	4-02061
R103	1.00K Resistor, 0603, Thin Film	4-02157
R104	1.00K Resistor, 0603, Thin Film	4-02157
R105	49.9K Resistor, 0603, Thin Film	4-02320
R106	10.0K Resistor, 0603, Thin Film	4-02253
R107	10.0K Resistor, 0603, Thin Film	4-02253
R108	100	Resistor, 0603, Thin Film	4-02061
R109	10.0K Resistor, 0603, Thin Film	4-02253
R110	1.00K Resistor, 0603, Thin Film	4-02157
R111	1.00K Resistor, 0603, Thin Film	4-02157
R112	499	Resistor, 0603, Thin Film	4-02128
R113	200	Resistor, 0603, Thin Film	4-02090
R114	100	Resistor, 0603, Thin Film	4-02061
R115	49.9	Resistor, 0603, Thin Film	4-02032
R116	100	Resistor, 0603, Thin Film	4-02061
R117	2.00K Resistor, 0603, Thin Film	4-02186
R118	249	Resistor, 0603, Thin Film	4-02099
R119	4.02K Resistor, 0603, Thin Film	4-02215

Parts List 143

R120	1.00K Resistor, 0603, Thin Film	4-02157
R121	1.00K Resistor, 0603, Thin Film	4-02157
R122	1.00K Resistor, 0603, Thin Film	4-02157
R123	2.00K Resistor, 0603, Thin Film	4-02186
R124	1.00K Resistor, 0603, Thin Film	4-02157
R125	1.00K Resistor, 0603, Thin Film	4-02157
R126	499 Resistor, 0603, Thin Film	4-02128
R127	49.9 Resistor, 0603, Thin Film	4-02032
R128	100 Resistor, 0603, Thin Film	4-02061
R129	100 Resistor, 0603, Thin Film	4-02061
R130	604 Resistor, 0603, Thin Film	4-02136
R131	124 Resistor, 0603, Thin Film	4-02070
R132	100 Resistor, 0603, Thin Film	4-02061
R133	604 Resistor, 0603, Thin Film	4-02136
R134	590 Resistor, 0603, Thin Film	4-02135
R135	499 Resistor, 0603, Thin Film	4-02128
R136	10.0K Resistor, 0603, Thin Film	4-02253
R137	200 Resistor, 0603, Thin Film	4-02090
R138	301 Resistor, 0603, Thin Film	4-02107
R139	200 Resistor, 0603, Thin Film	4-02090
R140	604 Resistor, 0603, Thin Film	4-02136
R141	75 Resistor, 0603, Thin Film	4-02049
R142	750 Resistor, 0603, Thin Film	4-02145
R143	750 Resistor, 0603, Thin Film	4-02145
R144	4.99K Resistor, 0603, Thin Film	4-02224
R145	68.1K Resistor, 0603, Thin Film	4-02333
R205	1000P Capacitor, 0603, NPO	5-00740
R219	1.00K Resistor, 0603, Thin Film	4-02157
R220	1.00K Resistor, 0603, Thin Film	4-02157
R223	49.9 Resistor, 0603, Thin Film	4-02032
R224	100 Resistor, 0603, Thin Film	4-02061
R228	100 Resistor, 0603, Thin Film	4-02061
R229	49.9 Resistor, 0603, Thin Film	4-02032
R230	49.9 Resistor, 0603, Thin Film	4-02032
R231	100 Resistor, 0603, Thin Film	4-02061
R232	200 Resistor, 0603, Thin Film	4-02090
R233	100 Resistor, 0603, Thin Film	4-02061
R234	2.00K Resistor, 0603, Thin Film	4-02186
R235	49.9 Resistor, 0603, Thin Film	4-02032
R236	49.9 Resistor, 0603, Thin Film	4-02032
R237	49.9 Resistor, 0603, Thin Film	4-02032
R238	100 Resistor, 0603, Thin Film	4-02061
R239	100 Resistor, 0603, Thin Film	4-02061
R240	49.9 Resistor, 0603, Thin Film	4-02032
R241	200 Resistor, 0603, Thin Film	4-02090
R242	49.9 Resistor, 0603, Thin Film	4-02032
R243	150 Resistor, 0603, Thin Film	4-02078
R244	150 Resistor, 0603, Thin Film	4-02078
R245	49.9 Resistor, 0603, Thin Film	4-02032
R246	49.9 Resistor, 0603, Thin Film	4-02032
R248	1000P Capacitor, 0603, NPO	5-00740
R250	24.9 Resistor, 0603, Thin Film	4-02003
R251	24.9 Resistor, 0603, Thin Film	4-02003
R252	49.9 Resistor, 0603, Thin Film	4-02032
R253	49.9 Resistor, 0603, Thin Film	4-02032
R254	49.9 Resistor, 0603, Thin Film	4-02032
R255	24.9 Resistor, 0603, Thin Film	4-02003
R256	24.9 Resistor, 0603, Thin Film	4-02003
R257	24.9 Resistor, 0603, Thin Film	4-02003
R258	1.00K Resistor, 0603, Thin Film	4-02157
R259	1.00K Resistor, 0603, Thin Film	4-02157
R260	249 Resistor, 0603, Thin Film	4-02099
R261	10 Resistor, 0603, Thin Film	4-01965
RN100	27x4	Resistor network
RN200	8x50	Resistor network
RN201	8x50	Resistor network
RN202	8x50	Resistor network
T100	TC1-1T SMT	Transformer SMD
U100	LP3878SD-ADJ	ADJ Positive Regu
U101	LP5900SD-3.3	Low noise regulat
U102	LP3878SD-ADJ	ADJ Positive Regu
U103	LP5900SD-3.3	Low noise regulat
U104	OPA827AID	OP AMP LOW NO
U105	DCYS300600-5	VCO 3-6 GHz
U107	ADF4108BCPZ	RF PLL Synthesize
U108	DG411DVZ-T	Quad SPST Analo
U109	TLV271DBVR	Single R-R Op Am
U110	MC7805CDTG	5V Voltage regula
U111	MC79M05CDTG	5V Voltage regula
U112	74HC595ADT	Shift Register/Lat

U113	74HC595ADT	Shift Register/Latch	3-00672
U114	74LVC2G08DCT	Single 2-input AND gate	3-01656
U115	LM45CIM3	Centigrade Temp Sensor 3-00775
U116	74LVC2G04	Dual inverting buffer	3-01968
U117	65LVDS2DBV	LVDS Receiver	3-01770
U118	65LVDS2DBV	LVDS Receiver	3-01770
U119	AD8131ARMZ	Differential Amplifier	3-02001
U120	TLV3501AIDBVT	Fast R-R Comparator	3-01782
U121	ADCLK944BCPZ	Quad PECL Fanout	3-02182
U201	SKY65013-92LF	RF Gain Block 3-02043
U202	LFCN-6000	FILTER LP 6GHz	6-01026
U203	74LVC3G34DCTR	Triple non-inverting buffer	3-01852
U204	LFCN-2850	RF LOW PASS FILTER	6-01050
U206	HMC361S8G	DC-10 GHz Divide-by-two	3-02033
U207	74LVC3G34DCTR	Triple non-inverting buffer	3-01852
U208	LFCN-1400	RF LOW PASS FILTER	6-01049
U209	MC100EP32DTR2G	PECL 4 GHz Divide-by-two	3-02085
U210	LFCN-630	RF LOW PASS FILTER	6-01048
U211	HMC322LP4	SP8T Non-reflective MPX	3-02031
U212	MC100EP32DTR2G	PECL 4 GHz Divide-by-two	3-02085
U213	74HCT4053PW	Triple 2:1 Analog MPX	3-01997
U214	LFCN-320	RF LOW PASS FILTER	6-01047
U215	MC100EP32DTR2G	PECL 4 GHz Divide-by-two	3-02085
U216	HMC322LP4	SP8T Non-reflective MPX	3-02031
U217	LFCN-120	RF LOW PASS FILTER	6-01046
U218	MC100EP32DTR2G	PECL 4 GHz Divide-by-two	3-02085
U219	74LVC3G34DCTR	Triple non-inverting buffer	3-01852
U220	LFCN-6000	FILTER LP 6GHz	6-01026
U221	SKY65013-92LF	RF Gain Block 3-02043
U222	ADCLK925BCPZ	2:1 PECL Buffer	3-02026

RF Output for SG382 and SG384. (Assembly 328)

Ref	Value	Description	SRS P/N
C100	0.1U	Capacitor, 0603, X7R	5-00764
C101	0.1U	Capacitor, 0603, X7R	5-00764
C102	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C103	4.7U - 16V X5R	Ceramic, 16V, 1206, X5R	5-00611
C104	4.7U - 16V X5R	Ceramic, 16V, 1206, X5R	5-00611
C105	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C106	0.1U	Capacitor, 0603, X7R	5-00764
C107	0.1U	Capacitor, 0603, X7R	5-00764
C108	0.1U	Capacitor, 0603, X7R	5-00764
C109	10P Capacitor, 0603, NPO 5-00692
C110	33P Capacitor, 0603, NPO 5-00704
C111	100P	Capacitor, 0603, NPO 5-00716
C112	100P	Capacitor, 0603, NPO 5-00716
C113	.01U	SM0603, COG 5-00869
C114	.01U	SM0603, COG 5-00869
C115	0.1U	Capacitor, 0603, X7R	5-00764
C116	2200P Capacitor, 0603, X7R	5-00744
C117	0.1U	Capacitor, 0603, X7R	5-00764
C118	.01U	SM0603, COG 5-00869
C119	.01U	SM0603, COG 5-00869
C120	2200P Capacitor, 0603, X7R	5-00744
C121	1000P Capacitor, 0603, NPO 5-00740
C122	1000P Capacitor, 0603, NPO 5-00740
C123	0.1U	Capacitor, 0603, X7R	5-00764
C124	1000P Capacitor, 0603, NPO 5-00740
C125	0.1U	Capacitor, 0603, X7R	5-00764
C126	0.1U	Capacitor, 0603, X7R	5-00764
C127	0.1U	Capacitor, 0603, X7R	5-00764
C128	.01U	SM0603, COG 5-00869
C129	0.1U	Capacitor, 0603, X7R	5-00764
C130	0.1U	Capacitor, 0603, X7R	5-00764
C131	0.1U	Capacitor, 0603, X7R	5-00764
C132	0.1U	Capacitor, 0603, X7R	5-00764
C133	0.1U	Capacitor, 0603, X7R	5-00764

Parts List 144

C200 1UF 16V /0603 Ceramic 16V, 0603, X5R 5-00661					L211 .47UH - SMT Inductor, 1210, Iron 6-00650
C201 1UF 16V /0603 Ceramic 16V, 0603, X5R 5-00661					L212 82nH INDUCTOR 82NH 6-01009
C202 1UF 16V /0603 Ceramic 16V, 0603, X5R 5-00661					L213 82nH INDUCTOR 82NH 6-01009
C203 1UF 16V /0603 Ceramic 16V, 0603, X5R 5-00661					L300 2506031517Y0 Inductor BEAD 0603 6-00759
C204 1UF 16V /0603 Ceramic 16V, 0603, X5R 5-00661					L301 2506031517Y0 Inductor BEAD 0603 6-00759
C205 1UF 16V /0603 Ceramic 16V, 0603, X5R 5-00661					L302 2506031517Y0 Inductor BEAD 0603 6-00759
C206 1UF 16V /0603 Ceramic 16V, 0603, X5R 5-00661					L303 150NH Fixed inductor 6-00989
C207 1UF 16V /0603 Ceramic 16V, 0603, X5R 5-00661					L304 2506031517Y0 Inductor BEAD 0603 6-00759
C208 0.1U Capacitor, 0603, X7R 5-00764					L305 150NH Fixed inductor 6-00989
C209 0.1U Capacitor, 0603, X7R 5-00764					PC1 SG385 RF OUTPUT Fabricated component 7-02101
C210 0.1U Capacitor, 0603, X7R 5-00764					R100 1.00K Resistor, 0603, Thin Film 4-02157
C211 0.1U Capacitor, 0603, X7R 5-00764					R102 100 Resistor, 0603, Thin Film 4-02061
C212 .01U SM0603, COG 5-00869					R103 100 Resistor, 0603, Thin Film 4-02061
C213 .01U SM0603, COG 5-00869					R104 649K Resistor, 0603, Thin Film 4-02427
C214 .01U SM0603, COG 5-00869					R105 49.9 Resistor, 0603, Thin Film 4-02032
C215 .01U SM0603, COG 5-00869					R106 49.9 Resistor, 0603, Thin Film 4-02032
C216 .01U SM0603, COG 5-00869					R107 499 Resistor, 0603, Thin Film 4-02128
C217 100P Capacitor, 0603, NPO 5-00716					R108 100 Resistor, 0603, Thin Film 4-02061
C218 100P Capacitor, 0603, NPO 5-00716					R109 100 Resistor, 0603, Thin Film 4-02061
C220 1UF 16V /0603 Ceramic 16V, 0603, X5R 5-00661					R110 100 Resistor, 0603, Thin Film 4-02061
C224 390P Capacitor, 0603, NPO 5-00730					R111 100 Resistor, 0603, Thin Film 4-02061
C225 390P Capacitor, 0603, NPO 5-00730					R112 100 Resistor, 0603, Thin Film 4-02061
C226 390P Capacitor, 0603, NPO 5-00730					R113 100 Resistor, 0603, Thin Film 4-02061
C227 390P Capacitor, 0603, NPO 5-00730					R114 100 Resistor, 0603, Thin Film 4-02061
C228 1000P Capacitor, 0603, NPO 5-00740					R115 100 Resistor, 0603, Thin Film 4-02061
C229 1000P Capacitor, 0603, NPO 5-00740					R116 49.9 Resistor, 0603, Thin Film 4-02032
C300 0.1U Capacitor, 0603, X7R 5-00764					R117 499 Resistor, 0603, Thin Film 4-02128
C301 0.1U Capacitor, 0603, X7R 5-00764					R118 499 Resistor, 0603, Thin Film 4-02128
C302 0.1U Capacitor, 0603, X7R 5-00764					R119 499 Resistor, 0603, Thin Film 4-02128
C303 0.1U Capacitor, 0603, X7R 5-00764					R120 1.00K Resistor, 0603, Thin Film 4-02157
C304 0.1U Capacitor, 0603, X7R 5-00764					R121 499 Resistor, 0603, Thin Film 4-02128
C305 33P Capacitor, 0603, NPO 5-00704					R122 1.00K Resistor, 0603, Thin Film 4-02157
C306 33P Capacitor, 0603, NPO 5-00704					R124 499 Resistor, 0603, Thin Film 4-02128
C307 0.1U Capacitor, 0603, X7R 5-00764					R125 20.0K Resistor, 0603, Thin Film 4-02282
C308 0.1U Capacitor, 0603, X7R 5-00764					R126 10.0K Resistor, 0603, Thin Film 4-02253
C309 0.1U Capacitor, 0603, X7R 5-00764					R127 17.8 Resistor, 0603, Thin Film 4-01989
C310 100P Capacitor, 0603, NPO 5-00716					R128 301 Resistor, 0603, Thin Film 4-02107
C311 1000P Capacitor, 0603, NPO 5-00740					R129 301 Resistor, 0603, Thin Film 4-02107
C312 0.1U Capacitor, 0603, X7R 5-00764					R130 499 Resistor, 0603, Thin Film 4-02128
C313 33P Capacitor, 0603, NPO 5-00704					R131 499 Resistor, 0603, Thin Film 4-02128
C314 33P Capacitor, 0603, NPO 5-00704					R132 49.9 Resistor, 0603, Thin Film 4-02032
CN100 4X0.1uF cap net 4 x 0.1uf 5-00842					R133 49.9 Resistor, 0603, Thin Film 4-02032
CN200 4X0.1uF cap net 4 x 0.1uf 5-00842					R134 4.02K Resistor, 0603, Thin Film 4-02215
CN201 4X0.1uF cap net 4 x 0.1uf 5-00842					R135 4.02K Resistor, 0603, Thin Film 4-02215
CN202 4X0.1uF cap net 4 x 0.1uf 5-00842					R136 4.02K Resistor, 0603, Thin Film 4-02215
CN203 4X0.1uF cap net 4 x 0.1uf 5-00842					R137 4.02K Resistor, 0603, Thin Film 4-02215
CN204 4-100PF cap net 4 x 100pf 5-00843					R138 49.9 Resistor, 0603, Thin Film 4-02032
CN205 4-100PF cap net 4 x 100pf 5-00843					R139 49.9 Resistor, 0603, Thin Film 4-02032
CN206 4-100PF cap net 4 x 100pf 5-00843					R140 100 Resistor, 0603, Thin Film 4-02061
CN207 4-100PF cap net 4 x 100pf 5-00843					R141 49.9 Resistor, 0603, Thin Film 4-02032
D100 BAV99WT1 DIODE DUAL Series 3-02099					R142 49.9 Resistor, 0603, Thin Film 4-02032
D200 BAV99WT1 DIODE DUAL Series 3-02099					R143 24.9 Resistor, 0603, Thin Film 4-02003
D201 BAV99WT1 DIODE DUAL Series 3-02099					R144 2.00K Resistor, 0603, Thin Film 4-02186
D202 BAV99WT1 DIODE DUAL Series 3-02099					R145 4.02K Resistor, 0603, Thin Film 4-02215
D203 BAV99WT1 DIODE DUAL Series 3-02099					R146 1.00K Resistor, 0603, Thin Film 4-02157
D204 FLZ5V6B DIODE ZENER 5.6V 3-02080					R147 10.0K Resistor, 0603, Thin Film 4-02253
J100 1 PIN Connector 1-01267					R148 100 Resistor, 0603, Thin Film 4-02061
J101 24 PIN Connector 1-01270					R149 100K Resistor, 0603, Thin Film 4-02349
L100 2506031517YO Inductor BEAD 0603 6-00759					R150 100K Resistor, 0603, Thin Film 4-02349
L101 2506031517YO Inductor BEAD 0603 6-00759					R151 100 Resistor, 0603, Thin Film 4-02061
L102 33UH - SMT Inductor, 1210, Ferrite 6-00654					R200 49.9 Resistor, 0603, Thin Film 4-02032
L103 .47UH - SMT Inductor, 1210, Iron 6-00650					R201 49.9 Resistor, 0603, Thin Film 4-02032
L104 82nH INDUCTOR 82NH 6-01009					R202 24.9 Resistor, 0603, Thin Film 4-02003
L105 2506031517YO Inductor BEAD 0603 6-00759					R203 24.9 Resistor, 0603, Thin Film 4-02003
L106 1.8uH Fixed inductor 6-01004					R204 499 Resistor, 0603, Thin Film 4-02128
L107 2506031517YO Inductor BEAD 0603 6-00759					R205 499 Resistor, 0603, Thin Film 4-02128
L108 2506031517YO Inductor BEAD 0603 6-00759					R206 499 Resistor, 0603, Thin Film 4-02128
L109 2506031517YO Inductor BEAD 0603 6-00759					R207 499 Resistor, 0603, Thin Film 4-02128
L110 2506031517YO Inductor BEAD 0603 6-00759					R208 499 Resistor, 0603, Thin Film 4-02128
L200 22NH Inductor SMD 22nH 6-00999					R209 499 Resistor, 0603, Thin Film 4-02128
L201 2506031517YO Inductor BEAD 0603 6-00759					R210 20.0K Resistor, 0603, Thin Film 4-02282
L202 22NH Inductor SMD 22nH 6-00999					R211 20.0K Resistor, 0603, Thin Film 4-02282
L203 2506031517YO Inductor BEAD 0603 6-00759					R212 10.0K Resistor, 0603, Thin Film 4-02253
L204 22NH Inductor SMD 22nH 6-00999					R213 20.0K Resistor, 0603, Thin Film 4-02282
L205 2506031517YO Inductor BEAD 0603 6-00759					R214 4.99K Resistor, 0603, Thin Film 4-02224
L206 22NH Inductor SMD 22nH 6-00999					R215 4.99K Resistor, 0603, Thin Film 4-02224
L207 2506031517YO Inductor BEAD 0603 6-00759					R216 1.50K Resistor, 0603, Thin Film 4-02174
L208 33UH - SMT Inductor,1210, Ferrite 6-00654					R217 499 Resistor, 0603, Thin Film 4-02128
L209 33UH - SMT Inductor,1210, Ferrite 6-00654					R218 499 Resistor, 0603, Thin Film 4-02128
L210 .47UH - SMT Inductor,1210, Iron 6-00650					R224 2.00K Resistor, 0603, Thin Film 4-02186

Parts List 145

R225	2.00K Resistor, 0603, Thin Film 4-02186
R300	604 Resistor, 0603, Thin Film 4-02136
R301	49.9 Resistor, 0603, Thin Film 4-02032
R302	768 Resistor, 0603, Thin Film 4-02146
R303	301 Resistor, 0603, Thin Film 4-02107
R304	499 Resistor, 0603, Thin Film 4-02128
R305	49.9 / 1W Surface mount, Power 4-02510
R306	53.6 Resistor, 0603, Thin Film 4-02035
R307	24.9 Resistor, 0603, Thin Film 4-02003
R308	604 Resistor, 0603, Thin Film 4-02136
R309	49.9 Resistor, 0603, Thin Film 4-02032
R310	49.9 Resistor, 0603, Thin Film 4-02032
R311	100 Resistor, 0603, Thin Film 4-02061
R312	10.0K Resistor, 0603, Thin Film 4-02253
R313	10.0K Resistor, 0603, Thin Film 4-02253
R314	2.00K Resistor, 0603, Thin Film 4-02186
R315	301 Resistor, 0603, Thin Film 4-02107
R316	1.00K Resistor, 0603, Thin Film 4-02157
R317	10.0K Resistor, 0603, Thin Film 4-02253
R318	10.0K Resistor, 0603, Thin Film 4-02253
R319	10.0K Resistor, 0603, Thin Film 4-02253
R320	1.00K Resistor, 0603, Thin Film 4-02157
R321	100K Resistor, 0603, Thin Film 4-02349
R322	100K Resistor, 0603, Thin Film 4-02349
R323	750 Resistor, 0603, Thin Film 4-02145
R324	100 Resistor, 0603, Thin Film 4-02061
R325	100 Resistor, 0603, Thin Film 4-02061
RN100	742C083151J	Resistor array, 4x150	4-02454
RN200	742C083151J	Resistor array, 4x152	4-02454
RN201	742C083151J	Resistor array, 4x154	4-02454
RN202	742C083151J	Resistor array, 4x156	4-02454
U100	74HCT4053PW	Triple 2:1 Analog MPX	3-01997
U101	74HCT4053PW	Triple 2:1 Analog MPX	3-01997
U102	LT3080	LDO POS Adj regulator	3-02036
U103	HMC270MS8GE	SPDT Non-reflect Switch	3-02030
U104	HMC270MS8GE	SPDT Non-reflect Switch	3-02030
U105	HMC270MS8GE	SPDT Non-reflect Switch	3-02030
U106	HMC270MS8GE	SPDT Non-reflect Switch	3-02030
U107	HMC624LP4	RF Atten dig 31.5dB	3-02082
U109	SKY65014-92LF	RF Gain Block	3-02044
U110	ADL5375-05ACPZ	I-Q RF Modulator	3-02028
U111	HMC346MS8G	VC RF atten	3-02032
U112	HMC346MS8G	VC RF atten	3-02032
U113	TLV2372IDGK	Dual RRIO CMOS Op-Amp	3-01434
U114	AD8130ARM	Differential Amplifier	3-02000
U115	74HC595ADT	Shift Register/Latch	3-00672
U116	74LVC1G125DBV	Single tri-state buffer	3-01886
U117	TLV2372IDGK	Dual RRIO CMOS Op-Amp	3-01434
U200	LT2630CSC6-HZ8	DAC Serial 8-bit	3-02083
U201	HMC624LP4	RF Atten dig 31.5dB	3-02082
U202	HMC624LP4	RF Atten dig 31.5dB	3-02082
U203	HMC624LP4	RF Atten dig 31.5dB	3-02082
U204	HMC624LP4	RF Atten dig 31.5dB	3-02082
U205	SKY65014-92LF	RF Gain Block	3-02044
U206	SKY65017 RF Gain Block	3-02045
U300	OPA2695IDR	1 GHZ CFB Op amp	3-02089
U301	TS5A623157DGS	Dual SPDT Analog switch	3-02017
U302	TS5A623157DGS	Dual SPDT Analog switch	3-02017
U303	AD8130ARM	Differential Amplifier	3-02000
U304	DAT-31	RF Step attenuator	3-02050
U305	74LVC1G3157	SPST Analog switch	3-02046
U306	TLV2371IDBVR	Single R-R Op Amp	3-02016
Z0	SIM-PCB S/N	Label	9-01570

RF Output for SG386 (Assembly 334)

Ref	Value	Description	SRS P/N
C100	0.1U	Capacitor, 0603, X7R	5-00764
C101	0.1U	Capacitor, 0603, X7R	5-00764
C102	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C103	4.7U - 16V X5R	Ceramic, 16V, 1206, X5R	5-00611
C104	4.7U - 16V X5R	Ceramic, 16V, 1206, X5R	5-00611
C105	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C106	0.1U	Capacitor, 0603, X7R	5-00764
C107	0.1U	Capacitor, 0603, X7R	5-00764
C108	0.1U	Capacitor, 0603, X7R	5-00764
C109	10P Capacitor, 0603, NPO	5-00692
C110	33P Capacitor, 0603, NPO	5-00704
C111	100P Capacitor, 0603, NPO	5-00716
C112	100P Capacitor, 0603, NPO	5-00716
C113	0.1U	Capacitor, 0603, X7R	5-00764
C114	.01U	SM0603, COG	5-00869
C115	0.1U	Capacitor, 0603, X7R	5-00764
C116	2200P	Capacitor, 0603, X7R	5-00744
C117	0.1U	Capacitor, 0603, X7R	5-00764
C118	.01U	SM0603, COG	5-00869
C119	.01U	SM0603, COG	5-00869
C120	2200P	Capacitor, 0603, X7R	5-00744
C121	1000P	Capacitor, 0603, NPO	5-00740
C122	1000P	Capacitor, 0603, NPO	5-00740
C123	0.1U	Capacitor, 0603, X7R	5-00764
C124	1000P	Capacitor, 0603, NPO	5-00740
C125	0.1U	Capacitor, 0603, X7R	5-00764
C126	0.1U	Capacitor, 0603, X7R	5-00764
C127	0.1U	Capacitor, 0603, X7R	5-00764
C128	.01U	SM0603, COG	5-00869
C129	0.1U	Capacitor, 0603, X7R	5-00764
C130	0.1U	Capacitor, 0603, X7R	5-00764
C131	0.1U	Capacitor, 0603, X7R	5-00764
C132	0.1U	Capacitor, 0603, X7R	5-00764
C133	0.1U	Capacitor, 0603, X7R	5-00764
C200	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C201	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C202	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C203	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C204	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C205	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C206	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C207	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C208	0.1U	Capacitor, 0603, X7R	5-00764
C209	0.1U	Capacitor, 0603, X7R	5-00764
C210	0.1U	Capacitor, 0603, X7R	5-00764
C211	0.1U	Capacitor, 0603, X7R	5-00764
C212	.01U	SM0603, COG	5-00869
C213	.01U	SM0603, COG	5-00869
C214	.01U	SM0603, COG	5-00869
C215	.01U	SM0603, COG	5-00869
C216	.01U	SM0603, COG	5-00869
C217	100P Capacitor, 0603, NPO	5-00716
C218	100P Capacitor, 0603, NPO	5-00716
C220	1UF 16V /0603	Ceramic 16V, 0603, X5R	5-00661
C224	390P Capacitor, 0603, NPO	5-00730
C225	390P Capacitor, 0603, NPO	5-00730
C226	390P Capacitor, 0603, NPO	5-00730
C227	390P Capacitor, 0603, NPO	5-00730
C228	1000P	Capacitor, 0603, NPO	5-00740
C229	1000P	Capacitor, 0603, NPO	5-00740
C250	.01U	SM0603, COG	5-00869
C251	.01U	SM0603, COG	5-00869
C252	.01U	SM0603, COG	5-00869
C253	.01U	SM0603, COG	5-00869
C254	.01U	SM0603, COG	5-00869
C255	.01U	SM0603, COG	5-00869
C300	0.1U	Capacitor, 0603, X7R	5-00764
C301	0.1U	Capacitor, 0603, X7R	5-00764
C302	0.1U	Capacitor, 0603, X7R	5-00764

Parts List 146

C303 0.1U Capacitor, 0603, X7R 5-00764				R105 49.9	Resistor, 0603, Thin Film	4-02032
C304 0.1U Capacitor, 0603, X7R 5-00764				R106 49.9	Resistor, 0603, Thin Film	4-02032
C305 33P Capacitor, 0603, NPO 5-00704				R107 499	Resistor, 0603, Thin Film	4-02128
C306 33P Capacitor, 0603, NPO 5-00704				R108 100	Resistor, 0603, Thin Film	4-02061
C307 0.1U Capacitor, 0603, X7R 5-00764				R109 100	Resistor, 0603, Thin Film	4-02061
C308 0.1U Capacitor, 0603, X7R 5-00764				R110 100	Resistor, 0603, Thin Film	4-02061
C309 0.1U Capacitor, 0603, X7R 5-00764				R111 100	Resistor, 0603, Thin Film	4-02061
C310 100P Capacitor, 0603, NPO 5-00716				R112 100	Resistor, 0603, Thin Film	4-02061
C311 1000P Capacitor, 0603, NPO 5-00740				R113 100	Resistor, 0603, Thin Film	4-02061
C312 0.1U Capacitor, 0603, X7R 5-00764				R114 100	Resistor, 0603, Thin Film	4-02061
C313 33P Capacitor, 0603, NPO 5-00704				R115 100	Resistor, 0603, Thin Film	4-02061
C314 33P Capacitor, 0603, NPO 5-00704				R116 49.9	Resistor, 0603, Thin Film	4-02032
CN100 4X0.1uF	cap net 4 x 0.1uf	5-00842		R117 499	Resistor, 0603, Thin Film	4-02128
CN200 4X0.1uF	cap net 4 x 0.1uf	5-00842		R118 499	Resistor, 0603, Thin Film	4-02128
CN201 4X0.1uF	cap net 4 x 0.1uf	5-00842		R119 499	Resistor, 0603, Thin Film	4-02128
CN202 4X0.1uF	cap net 4 x 0.1uf	5-00842		R120 1.00K	Resistor, 0603, Thin Film	4-02157
CN203 4X0.1uF	cap net 4 x 0.1uf	5-00842		R121 499	Resistor, 0603, Thin Film	4-02128
CN204 4-100PF	cap net 4 x 100pf	5-00843		R122 1.00K	Resistor, 0603, Thin Film	4-02157
CN205 4-100PF	cap net 4 x 100pf	5-00843		R124 499	Resistor, 0603, Thin Film	4-02128
CN206 4-100PF	cap net 4 x 100pf	5-00843		R125 20.0K	Resistor, 0603, Thin Film	4-02282
CN207 4-100PF	cap net 4 x 100pf	5-00843		R126 10.0K	Resistor, 0603, Thin Film	4-02253
D100 BAV99WT1	DIODE DUAL Series	3-02099		R127 17.8	Resistor, 0603, Thin Film	4-01989
D200 BAV99WT1	DIODE DUAL Series	3-02099		R128 301	Resistor, 0603, Thin Film	4-02107
D201 BAV99WT1	DIODE DUAL Series	3-02099		R129 301	Resistor, 0603, Thin Film	4-02107
D202 BAV99WT1	DIODE DUAL Series	3-02099		R130 499	Resistor, 0603, Thin Film	4-02128
D203 BAV99WT1	DIODE DUAL Series	3-02099		R131 499	Resistor, 0603, Thin Film	4-02128
D204 FLZ5V6B	DIODE ZENER 5.6V	3-02080		R132 49.9	Resistor, 0603, Thin Film	4-02032
J100 1 PIN Connector	1-01267			R133 49.9	Resistor, 0603, Thin Film	4-02032
J101 24 PIN	Connector	1-01270		R134 4.02K	Resistor, 0603, Thin Film	4-02215
J200 172117	Connector	1-01265		R135 4.02K	Resistor, 0603, Thin Film	4-02215
J300 73100-0195	Panel Mount BNC	1-01158		R136 4.02K	Resistor, 0603, Thin Film	4-02215
L100 2506031517Y0	Inductor BEAD 0603	6-00759		R137 4.02K	Resistor, 0603, Thin Film	4-02215
L101 2506031517Y0	Inductor BEAD 0603	6-00759		R138 49.9	Resistor, 0603, Thin Film	4-02032
L102 33UH - SMT	Inductor,1210, Ferrite	6-00654		R139 49.9	Resistor, 0603, Thin Film	4-02032
L103 .47UH - SMT	Inductor, 1210, Iron	6-00650		R140 100	Resistor, 0603, Thin Film	4-02061
L104 82nH INDUCTOR 82NH	6-01009			R141 49.9	Resistor, 0603, Thin Film	4-02032
L105 2506031517Y0	Inductor BEAD 0603	6-00759		R142 49.9	Resistor, 0603, Thin Film	4-02032
L106 1.8uH	Fixed inductor	6-01004		R143 24.9	Resistor, 0603, Thin Film	4-02003
L107 2506031517Y0	Inductor BEAD 0603	6-00759		R144 2.00K	Resistor, 0603, Thin Film	4-02186
L108 2506031517Y0	Inductor BEAD 0603	6-00759		R145 4.02K	Resistor, 0603, Thin Film	4-02215
L109 2506031517Y0	Inductor BEAD 0603	6-00759		R146 1.00K	Resistor, 0603, Thin Film	4-02157
L110 2506031517Y0	Inductor BEAD 0603	6-00759		R147 10.0K	Resistor, 0603, Thin Film	4-02253
L200 22NH	Inductor SMD 22nH	6-00999		R148 100	Resistor, 0603, Thin Film	4-02061
L201 2506031517Y0	Inductor BEAD 0603	6-00759		R149 100K Resistor, 0603, Thin Film	4-02349
L202 22NH	Inductor SMD 22nH	6-00999		R150 100K Resistor, 0603, Thin Film	4-02349
L203 2506031517Y0	Inductor BEAD 0603	6-00759		R151 100	Resistor, 0603, Thin Film	4-02061
L204 22NH	Inductor SMD 22nH	6-00999		R202 24.9	Resistor, 0603, Thin Film	4-02003
L205 2506031517Y0	Inductor BEAD 0603	6-00759		R203 24.9	Resistor, 0603, Thin Film	4-02003
L206 22NH	Inductor SMD 22nH	6-00999		R205 499	Resistor, 0603, Thin Film	4-02128
L207 2506031517Y0	Inductor BEAD 0603	6-00759		R207 499	Resistor, 0603, Thin Film	4-02128
L209 33UH - SMT	Inductor,1210, Ferrite	6-00654		R209 499	Resistor, 0603, Thin Film	4-02128
L211 .47UH - SMT	Inductor, 1210, Iron	6-00650		R210 20.0K	Resistor, 0603, Thin Film	4-02282
L213 82nH INDUCTOR 82NH	6-01009			R211 20.0K	Resistor, 0603, Thin Film	4-02282
L250 33UH - SMT	Inductor,1210, Ferrite	6-00654		R213 20.0K	Resistor, 0603, Thin Film	4-02282
L251 33UH - SMT	Inductor,1210, Ferrite	6-00654		R214 4.99K	Resistor, 0603, Thin Film	4-02224
L300 2506031517Y0	Inductor BEAD 0603	6-00759		R215 4.99K	Resistor, 0603, Thin Film	4-02224
L301 2506031517Y0	Inductor BEAD 0603	6-00759		R216 1.50K	Resistor, 0603, Thin Film	4-02174
L302 2506031517Y0	Inductor BEAD 0603	6-00759		R217 499	Resistor, 0603, Thin Film	4-02128
L303 150NH	Fixed inductor	6-00989		R218 499	Resistor, 0603, Thin Film	4-02128
L304 2506031517Y0	Inductor BEAD 0603	6-00759		R224 2.00K	Resistor, 0603, Thin Film	4-02186
L305 150NH	Fixed inductor	6-00989		R225 2.00K	Resistor, 0603, Thin Film	4-02186
M100 2-56X3/16 HEX	Hardware	0-00764		R250 12.4	Resistor, 0603, Thin Film	4-01974
M101 2-56X3/16 HEX	Hardware	0-00764		R251 12.4	Resistor, 0603, Thin Film	4-01974
M102 2-56X3/16 HEX	Hardware	0-00764		R252 12.4	Resistor, 0603, Thin Film	4-01974
M103 2-56X3/16 HEX	Hardware	0-00764		R253 12.4	Resistor, 0603, Thin Film	4-01974
M200 2-56X3/16 HEX	Hardware	0-00764		R254 20.0K	Resistor, 0603, Thin Film	4-02282
M201 2-56X3/16 HEX	Hardware	0-00764		R255 20.0K	Resistor, 0603, Thin Film	4-02282
M202 2-56X3/16 HEX	Hardware	0-00764		R300 604	Resistor, 0603, Thin Film	4-02136
M203 2-56X3/16 HEX	Hardware	0-00764		R301 49.9	Resistor, 0603, Thin Film	4-02032
M204 2-56X3/16 HEX	Hardware	0-00764		R302 768	Resistor, 0603, Thin Film	4-02146
M205 2-56X3/16 HEX	Hardware	0-00764		R303 301	Resistor, 0603, Thin Film	4-02107
M206 2-56X3/16 HEX	Hardware	0-00764		R304 499	Resistor, 0603, Thin Film	4-02128
M207 2-56X3/16 HEX	Hardware	0-00764		R305 49.9 / 1W	Surface mount, Power	4-02510
M208 2-56X3/16 HEX	Hardware	0-00764		R306 53.6	Resistor, 0603, Thin Film	4-02035
M209 2-56X3/16 HEX	Hardware	0-00764		R307 24.9	Resistor, 0603, Thin Film	4-02003
PC1 PCB for RF Outp	PCB for RF Output.	7-02293		R308 604	Resistor, 0603, Thin Film	4-02136
R100 1.0OK Resistor, 0603, Thin Film	4-02157			R309 49.9	Resistor, 0603, Thin Film	4-02032
R102 100 Resistor, 0603, Thin Film	4-02061			R310 49.9	Resistor, 0603, Thin Film	4-02032
R103 100 Resistor, 0603, Thin Film	4-02061			R311 100	Resistor, 0603, Thin Film	4-02061
R104 649K Resistor, 0603, Thin Film	4-02427			R312 10.0K	Resistor, 0603, Thin Film	4-02253

Parts List 147

R313 10.0K Resistor, 0603, Thin Film 4-02253				C14	2.2P	Capacitor, 0603, NPO	5-00675
R314 2.00K Resistor, 0603, Thin Film 4-02186				C15	2.2P	Capacitor, 0603, NPO	5-00675
R315 301 Resistor, 0603, Thin Film 4-02107				C16	2.2P	Capacitor, 0603, NPO	5-00675
R316 1.00K Resistor, 0603, Thin Film 4-02157				C17	2.2P	Capacitor, 0603, NPO	5-00675
R317 10.0K Resistor, 0603, Thin Film 4-02253				C18	2.2P	Capacitor, 0603, NPO	5-00675
R318 10.0K Resistor, 0603, Thin Film 4-02253				C19	2.2P	Capacitor, 0603, NPO	5-00675
R319 10.0K Resistor, 0603, Thin Film 4-02253				C20	2.2P	Capacitor, 0603, NPO	5-00675
R320 1.00K Resistor, 0603, Thin Film 4-02157				C21	2.2P	Capacitor, 0603, NPO	5-00675
R321 100K Resistor, 0603, Thin Film 4-02349				C22	2.2P	Capacitor, 0603, NPO	5-00675
R322 100K Resistor, 0603, Thin Film 4-02349				C23	2.2P	Capacitor, 0603, NPO	5-00675
R323 750 Resistor, 0603, Thin Film 4-02145				C24	2.2P	Capacitor, 0603, NPO	5-00675
R324 100 Resistor, 0603, Thin Film 4-02061				C25	2.2P	Capacitor, 0603, NPO	5-00675
R325 100 Resistor, 0603, Thin Film 4-02061				C26	2.2P	Capacitor, 0603, NPO	5-00675
RN100 742C083151J Resistor array, 4x151 4-02454				C27	2.2P	Capacitor, 0603, NPO	5-00675
RN200 742C083151J Resistor array, 4x153 4-02454				C28	2.2P	Capacitor, 0603, NPO	5-00675
RN201 742C083151J Resistor array, 4x155 4-02454				C29	2.2P	Capacitor, 0603, NPO	5-00675
RN202 742C083151J Resistor array, 4x157 4-02454				C30	2.2P	Capacitor, 0603, NPO	5-00675
U100 74HCT4053PW	Triple 2:1 Analog MPX	3-01997		C31	2.2P	Capacitor, 0603, NPO	5-00675
U101 74HCT4053PW	Triple 2:1 Analog MPX	3-01997		C32	2.2P	Capacitor, 0603, NPO	5-00675
U102 LT3080	LDO POS Adj regulator	3-02036		C33	2.2P	Capacitor, 0603, NPO	5-00675
U103 HMC270MS8GE	SPDT Non-reflect Switch	3-02030		C34	2.2P	Capacitor, 0603, NPO	5-00675
U104 HMC270MS8GE	SPDT Non-reflect Switch	3-02030		C35	2.2P	Capacitor, 0603, NPO	5-00675
U105 HMC270MS8GE	SPDT Non-reflect Switch	3-02030		C36	2.2P	Capacitor, 0603, NPO	5-00675
U106 HMC270MS8GE	SPDT Non-reflect Switch	3-02030		C37	2.2P	Capacitor, 0603, NPO	5-00675
U107 HMC624LP4	RF Atten dig 31.5dB	3-02082		C38	2.2P	Capacitor, 0603, NPO	5-00675
U109 SKY65014-92LF	RF Gain Block	3-02044		C39	2.2P	Capacitor, 0603, NPO	5-00675
U110 ADL5375-05ACPZ	I-Q RF Modulator	3-02028		C40	2.2P	Capacitor, 0603, NPO	5-00675
U111 HMC346MS8G	VC RF atten	3-02032		C41	2.2P	Capacitor, 0603, NPO	5-00675
U112 HMC346MS8G	VC RF atten	3-02032		C42	2.2P	Capacitor, 0603, NPO	5-00675
U113 TLV2372IDGK	Dual RRIO CMOS Op-Amp	3-01434		C43	2.2P	Capacitor, 0603, NPO	5-00675
U114 AD8130ARM	Differential Amplifier 3-02000			C44	2.2P	Capacitor, 0603, NPO	5-00675
U115 74HC595ADT Shift Register/Latch		3-00672		C45	2.2P	Capacitor, 0603, NPO	5-00675
U116 74LVC1G125DBV	Single tri-state buffer 3-01886			C46	2.2P	Capacitor, 0603, NPO	5-00675
U117 TLV2372IDGK	Dual RRIO CMOS Op-Amp	3-01434		C47	2.2P	Capacitor, 0603, NPO	5-00675
U200 LT2630CSC6-HZ8	DAC Serial 8-bit	3-02083		C48	2.2P	Capacitor, 0603, NPO	5-00675
U201 HMC624LP4	RF Atten dig 31.5dB	3-02082		C49	2.2P	Capacitor, 0603, NPO	5-00675
U202 HMC624LP4	RF Atten dig 31.5dB	3-02082		C50	2.2P	Capacitor, 0603, NPO	5-00675
U203 HMC624LP4	RF Atten dig 31.5dB	3-02082		C51	2.2P	Capacitor, 0603, NPO	5-00675
U204 HMC624LP4	RF Atten dig 31.5dB	3-02082		C52	2.2P	Capacitor, 0603, NPO	5-00675
U250 SKY65014-92LF	RF Gain Block	3-02044		C53	.01U	Capacitor, 0603, X7R	5-00752
U251 SKY65014-92LF	RF Gain Block	3-02044		C54	.01U	Capacitor, 0603, X7R	5-00752
U252 HMC788LP2E	RF Gain Block	3-02168		C55	.01U	Capacitor, 0603, X7R	5-00752
U300 OPA2695IDR	2 GHZ CFB Op amp	3-02089		C56	.01U	Capacitor, 0603, X7R	5-00752
U301 TS5A623157DGS Dual SPDT Analog switch		3-02017		C57	.01U	Capacitor, 0603, X7R	5-00752
U302 TS5A623157DGS Dual SPDT Analog switch		3-02017		C58	.01U	Capacitor, 0603, X7R	5-00752
U303 AD8130ARM Differential Amplifier		3-02000		C59	.01U	Capacitor, 0603, X7R	5-00752
U304 DAT-31 RF Step attenuator		3-02050		C60	.01U	Capacitor, 0603, X7R	5-00752
U305 74LVC1G3157 SPST Analog switch		3-02046		J1	34 PIN	Connector	1-01275
U306 TLV2371IDBVR Single R-R Op Amp		3-02016		J2	34 PIN	Connector	1-01275

Motherboard to RF Block Jumper PCB (Assembly 329)

Ref	Value	Description	SRS P/N
C1	2.2P	Capacitor, 0603, NPO	5-00675
C2	2.2P	Capacitor, 0603, NPO	5-00675
C3	2.2P	Capacitor, 0603, NPO	5-00675
C4	2.2P	Capacitor, 0603, NPO	5-00675
C5	2.2P	Capacitor, 0603, NPO	5-00675
C6	2.2P	Capacitor, 0603, NPO	5-00675
C7	2.2P	Capacitor, 0603, NPO	5-00675
C8	2.2P	Capacitor, 0603, NPO	5-00675
C9	2.2P	Capacitor, 0603, NPO	5-00675
C10	2.2P	Capacitor, 0603, NPO	5-00675
C11	2.2P	Capacitor, 0603, NPO	5-00675
C12	2.2P	Capacitor, 0603, NPO	5-00675
C13	2.2P	Capacitor, 0603, NPO	5-00675

C14	2.2P	Capacitor, 0603, NPO	5-00675
C15	2.2P	Capacitor, 0603, NPO	5-00675
C16	2.2P	Capacitor, 0603, NPO	5-00675
C17	2.2P	Capacitor, 0603, NPO	5-00675
C18	2.2P	Capacitor, 0603, NPO	5-00675
C19	2.2P	Capacitor, 0603, NPO	5-00675
C20	2.2P	Capacitor, 0603, NPO	5-00675
C21	2.2P	Capacitor, 0603, NPO	5-00675
C22	2.2P	Capacitor, 0603, NPO	5-00675
C23	2.2P	Capacitor, 0603, NPO	5-00675
C24	2.2P	Capacitor, 0603, NPO	5-00675
C25	2.2P	Capacitor, 0603, NPO	5-00675
C26	2.2P	Capacitor, 0603, NPO	5-00675
C27	2.2P	Capacitor, 0603, NPO	5-00675
C28	2.2P	Capacitor, 0603, NPO	5-00675
C29	2.2P	Capacitor, 0603, NPO	5-00675
C30	2.2P	Capacitor, 0603, NPO	5-00675
C31	2.2P	Capacitor, 0603, NPO	5-00675
C32	2.2P	Capacitor, 0603, NPO	5-00675
C33	2.2P	Capacitor, 0603, NPO	5-00675
C34	2.2P	Capacitor, 0603, NPO	5-00675
C35	2.2P	Capacitor, 0603, NPO	5-00675
C36	2.2P	Capacitor, 0603, NPO	5-00675
C37	2.2P	Capacitor, 0603, NPO	5-00675
C38	2.2P	Capacitor, 0603, NPO	5-00675
C39	2.2P	Capacitor, 0603, NPO	5-00675
C40	2.2P	Capacitor, 0603, NPO	5-00675
C41	2.2P	Capacitor, 0603, NPO	5-00675
C42	2.2P	Capacitor, 0603, NPO	5-00675
C43	2.2P	Capacitor, 0603, NPO	5-00675
C44	2.2P	Capacitor, 0603, NPO	5-00675
C45	2.2P	Capacitor, 0603, NPO	5-00675
C46	2.2P	Capacitor, 0603, NPO	5-00675
C47	2.2P	Capacitor, 0603, NPO	5-00675
C48	2.2P	Capacitor, 0603, NPO	5-00675
C49	2.2P	Capacitor, 0603, NPO	5-00675
C50	2.2P	Capacitor, 0603, NPO	5-00675
C51	2.2P	Capacitor, 0603, NPO	5-00675
C52	2.2P	Capacitor, 0603, NPO	5-00675
C53	.01U	Capacitor, 0603, X7R	5-00752
C54	.01U	Capacitor, 0603, X7R	5-00752
C55	.01U	Capacitor, 0603, X7R	5-00752
C56	.01U	Capacitor, 0603, X7R	5-00752
C57	.01U	Capacitor, 0603, X7R	5-00752
C58	.01U	Capacitor, 0603, X7R	5-00752
C59	.01U	Capacitor, 0603, X7R	5-00752
C60	.01U	Capacitor, 0603, X7R	5-00752
J1	34 PIN	Connector	1-01275
J2	34 PIN	Connector	1-01275
L1	Choke, Common M	Common Mode Choke	6-01019
L2	Choke, Common M	Common Mode Choke	6-01019
L3	Choke, Common M	Common Mode Choke	6-01019
L4	Choke, Common M	Common Mode Choke	6-01019
L5	2506031517Y0	Inductor BEAD 0603	6-00759
L6	Choke, Common M	Common Mode Choke	6-01019
L7	Choke, Common M	Common Mode Choke	6-01019
L8	Choke, Common M	Common Mode Choke	6-01019
L9	2506031517Y0	Inductor BEAD 0603	6-00759
L10	2506031517Y0	Inductor BEAD 0603	6-00759
L11	2506031517Y0	Inductor BEAD 0603	6-00759
L12	2506031517Y0	Inductor BEAD 0603	6-00759
L13	2506031517Y0	Inductor BEAD 0603	6-00759
PCB1	SG385 MB TO RF	Fabricated component	7-02104
R1	100	Resistor, 0603, Thick Film	4-01845
R2	100	Resistor, 0603, Thick Film	4-01845
R3	100	Resistor, 0603, Thick Film	4-01845
R4	100	Resistor, 0603, Thick Film	4-01845
R5	100	Resistor, 0603, Thick Film	4-01845
R6	100	Resistor, 0603, Thick Film	4-01845
R7	100	Resistor, 0603, Thick Film	4-01845
R8	100	Resistor, 0603, Thick Film	4-01845
R9	100	Resistor, 0603, Thick Film	4-01845
R10	100 Resistor, 0603, Thick Film	4-01845
R11	100 Resistor, 0603, Thick Film	4-01845
Z0	SIM-PCB S/N	Label	9-01570

Option 1&2 : Clocks and Doubler (Assembly 332)

Ref Value Description SRS P/N

C100	0.1U	Capacitor, 0603, X7R	5-00764
C101	0.1U	Capacitor, 0603, X7R	5-00764
C102	0.1U	Capacitor, 0603, X7R	5-00764
C103	0.1U	Capacitor, 0603, X7R	5-00764
C104	0.1U	Capacitor, 0603, X7R	5-00764
C105	0.1U	Capacitor, 0603, X7R	5-00764
C106	0.1U	Capacitor, 0603, X7R	5-00764
C107	1000P	Capacitor, 0603, NPO	5-00740
C108	1000P	Capacitor, 0603, NPO	5-00740
C109	0.1U	Capacitor, 0603, X7R	5-00764
C110	0.1U	Capacitor, 0603, X7R	5-00764
C111	0.1U	Capacitor, 0603, X7R	5-00764
C112	1000P	Capacitor, 0603, NPO	5-00740
C113	1000P	Capacitor, 0603, NPO	5-00740
C114	1000P	Capacitor, 0603, NPO	5-00740
C116	100P	Capacitor, 0603, NPO	5-00716
C117	100P	Capacitor, 0603, NPO	5-00716
C118	4.7UF / 50V X5R	Capacitor, 1206, X7R	5-00807
C119	4.7UF / 50V X5R	Capacitor, 1206, X7R	5-00807
C120	1000P	Capacitor, 0603, NPO	5-00740
C121	0.1U	Capacitor, 0603, X7R	5-00764
C122	0.1U	Capacitor, 0603, X7R	5-00764
C123	0.1U	Capacitor, 0603, X7R	5-00764
C124	0.1U	Capacitor, 0603, X7R	5-00764
C125	1000P	Capacitor, 0603, NPO	5-00740
C126	1000P	Capacitor, 0603, NPO	5-00740
C127	1000P	Capacitor, 0603, NPO	5-00740
C128	220P	Capacitor, 0603, NPO	5-00724
C129	0.1U	Capacitor, 0603, X7R	5-00764
C130	0.1U	Capacitor, 0603, X7R	5-00764
C131	1000P	Capacitor, 0603, NPO	5-00740
C200	1000P	Capacitor, 0603, NPO	5-00740
C202	0.1U	Capacitor, 0603, X7R	5-00764
C203	0.1U	Capacitor, 0603, X7R	5-00764
C204	0.1U	Capacitor, 0603, X7R	5-00764
C205	0.1U	Capacitor, 0603, X7R	5-00764
C207	0.1U	Capacitor, 0603, X7R	5-00764
C208	0.1U	Capacitor, 0603, X7R	5-00764
C209	0.1U	Capacitor, 0603, X7R	5-00764
C211	0.1U	Capacitor, 0603, X7R	5-00764
C212	0.1U	Capacitor, 0603, X7R	5-00764
C213	0.1U	Capacitor, 0603, X7R	5-00764
C216	100P	Capacitor, 0603, NPO	5-00716
C217	100P	Capacitor, 0603, NPO	5-00716
C218	10P	Capacitor, 0603, NPO	5-00692
C219	10P	Capacitor, 0603, NPO	5-00692
C220	10P	Capacitor, 0603, NPO	5-00692
C221	10P	Capacitor, 0603, NPO	5-00692
C222	10P	Capacitor, 0603, NPO	5-00692
C223	0.1U	Capacitor, 0603, X7R	5-00764
C224	0.1U	Capacitor, 0603, X7R	5-00764
C225	0.1U	Capacitor, 0603, X7R	5-00764
C226	4700P	Capacitor, 0603, X7R	5-00748
C227	1000P	Capacitor, 0603, NPO	5-00740
C228	0.1U	Capacitor, 0603, X7R	5-00764
C229	0.1U	Capacitor, 0603, X7R	5-00764
C230	1000P	Capacitor, 0603, NPO	5-00740
C231	0.1U	Capacitor, 0603, X7R	5-00764
C232	0.1U	Capacitor, 0603, X7R	5-00764
C233	1000P	Capacitor, 0603, NPO	5-00740
C234	100P	Capacitor, 0603, NPO	5-00716
D100	BAT54S	Dual schottky diode, series	3-00945
J100	15 PIN	Connector	1-01264
J101	BULKHEAD JACK	SMA PCB Launch	1-00550
J102	SMA, VERTICAL	Connector	1-01271
J103	BULKHEAD JACK	SMA PCB Launch	1-00550
J200	BULKHEAD JACK	SMA PCB Launch	1-00550
J201	BULKHEAD JACK	SMA PCB Launch	1-00550
L100	2506031517YO	Inductor BEAD 0603	6-00759

L101	2506031517Y0	Inductor BEAD 0603	6-00759
L102	2506031517Y0	Inductor BEAD 0603	6-00759
L103	2506031517Y0	Inductor BEAD 0603	6-00759
L104	2506031517Y0	Inductor BEAD 0603	6-00759
L105	2506031517Y0	Inductor BEAD 0603	6-00759
L106	2506031517Y0	Inductor BEAD 0603	6-00759
L107	82nH	INDUCTOR 82NH	6-01009
L108	.47UH - SMT	Inductor, 1210, Iron	6-00650
L200	2506031517Y0	Inductor BEAD 0603	6-00759
L201	2506031517Y0	Inductor BEAD 0603	6-00759
L202	2506031517Y0	Inductor BEAD 0603	6-00759
L203	120NH Fixed inductor	6-00991
L204	22NH	Inductor SMD 22nH	6-00999
L205	22NH	Inductor SMD 22nH	6-00999
L206	33NH	Fixed inductor	6-00992
L207	5.6NH	Fixed inductor	6-00771
L208	5.6NH	Fixed inductor	6-00771
L209	2506031517Y0	Inductor BEAD 0603	6-00759
L210	3.9UH	Fixed inductor	6-01003
L211	2506031517Y0	Inductor BEAD 0603	6-00759
L212	2506031517Y0	Inductor BEAD 0603	6-00759
PC1	SG385 OPT.1 & 2	Fabricated component	7-02102
Q100	MBT3906DW1	Dual PNP Transistor	3-01419
Q101	MMBT3906LT1	PNP Transistor	3-00580
Q102	MBT3906DW1	Dual PNP Transistor	3-01419
Q103	MBT3904DW1T1	Dual NPN	3-01154
Q104	MBT3904DW1T1	Dual NPN	3-01154
Q105	BSP52T1G	NPN Darlington	3-02101
Q106	BSP52T1G	NPN Darlington	3-02101
R100	15.0K	Resistor, 0603, Thin Film	4-02270
R101	10.0K	Resistor, 0603, Thin Film	4-02253
R102	10.0K	Resistor, 0603, Thin Film	4-02253
R103	10.0K	Resistor, 0603, Thin Film	4-02253
R104	1.33K	Resistor, 0603, Thin Film	4-02169
R105	100	Resistor, 0603, Thin Film	4-02061
R106	453	Resistor, 0603, Thin Film	4-02124
R107	1.00K	Resistor, 0603, Thin Film	4-02157
R108	100	Resistor, 0603, Thin Film	4-02061
R109	1.00K	Resistor, 0603, Thin Film	4-02157
R110	1.00K	Resistor, 0603, Thin Film	4-02157
R111	10.0K	Resistor, 0603, Thin Film	4-02253
R113	110	Resistor, 0603, Thin Film	4-02065
R114	110	Resistor, 0603, Thin Film	4-02065
R115	110	Resistor, 0603, Thin Film	4-02065
R116	110	Resistor, 0603, Thin Film	4-02065
R117	10.0K	Resistor, 0603, Thin Film	4-02253
R118	49.9	Resistor, 0603, Thin Film	4-02032
R119	49.9	Resistor, 0603, Thin Film	4-02032
R120	56.2	Resistor, 0603, Thin Film	4-02037
R121	56.2	Resistor, 0603, Thin Film	4-02037
R122	75	Resistor, 0603, Thin Film	4-02049
R123	75	Resistor, 0603, Thin Film	4-02049
R124	499	Resistor, 0603, Thin Film	4-02128
R125	499	Resistor, 0603, Thin Film	4-02128
R126	1.00K	Resistor, 0603, Thin Film	4-02157
R127	1.00K	Resistor, 0603, Thin Film	4-02157
R128	301	Resistor, 0603, Thin Film	4-02107
R129	124	Resistor, 0603, Thin Film	4-02070
R130	24.9 /0.75W	Surface mount, Power	4-02512
R131	100	Resistor, 0603, Thin Film	4-02061
R132	100	Resistor, 0603, Thin Film	4-02061
R133	133	Resistor, 0603, Thin Film	4-02073
R134	133	Resistor, 0603, Thin Film	4-02073
R135	10.0K	Resistor, 0603, Thin Film	4-02253
R136	10.0K	Resistor, 0603, Thin Film	4-02253
R137	1	Resistor, 0603, Thick Film	4-01407
R138	10	Resistor, 0603, Thin Film	4-01965
R139	200	Resistor, 0603, Thin Film	4-02090
R140	200	Resistor, 0603, Thin Film	4-02090
R141	499	Resistor, 0603, Thin Film	4-02128
R142	499	Resistor, 0603, Thin Film	4-02128
R143	100	Resistor, 0603, Thin Film	4-02061
R144	100	Resistor, 0603, Thin Film	4-02061
R145	1.50K	Resistor, 0603, Thin Film	4-02174
R146	499	Resistor, 0603, Thin Film	4-02128
R147	4.99K	Resistor, 0603, Thin Film	4-02224
R148	10.0K	Resistor, 0603, Thin Film	4-02253
R149	10.0K	Resistor, 0603, Thin Film	4-02253
R200	1.00K	Resistor, 0603, Thin Film	4-02157
R201	49.9 / 1W	Surface mount, Power	4-02510

Parts List 149

R202	6.98K Resistor, 0603, Thin Film	4-02238
R203	6.98K Resistor, 0603, Thin Film	4-02238
R204	2.00K Resistor, 0603, Thin Film	4-02186
R205	2.00K Resistor, 0603, Thin Film	4-02186
R208	10.0K Resistor, 0603, Thin Film	4-02253
R210	10 Resistor, 0603, Thin Film	4-01965
R211	37.4 Resistor, 0603, Thin Film	4-02020
R214	499 Resistor, 0603, Thin Film	4-02128
R215	499 Resistor, 0603, Thin Film	4-02128
R216	499 Resistor, 0603, Thin Film	4-02128
R217	10.0K Resistor, 0603, Thin Film	4-02253
R218	49.9 Resistor, 0603, Thin Film	4-02032
R219	499 Resistor, 0603, Thin Film	4-02128
R220	2.00K Resistor, 0603, Thin Film	4-02186
R221	2.00K Resistor, 0603, Thin Film	4-02186
R222	49.9 Resistor, 0603, Thin Film	4-02032
R223	499 Resistor, 0603, Thin Film	4-02128
R224	49.9 Resistor, 0603, Thin Film	4-02032
R225	49.9 Resistor, 0603, Thin Film	4-02032
R226	2.00K Resistor, 0603, Thin Film	4-02186
R227	1.00K Resistor, 0603, Thin Film	4-02157
R228	499 Resistor, 0603, Thin Film	4-02128
R229	1.00K Resistor, 0603, Thin Film	4-02157
R230	1.00K Resistor, 0603, Thin Film	4-02157
R231	100 Resistor, 0603, Thin Film	4-02061
R232	4.02K Resistor, 0603, Thin Film	4-02215
R233	249 Resistor, 0603, Thin Film	4-02099
RN100	1.0KX4D Network, DIP, Isolated	4-00910
RN101	8x50	Resistor array, 4x50	4-02513
RN200	8X100	Resistor array, 8x104	4-02497
U100	LTC2624	Quad 12-bit DAC	3-02037
U101	ADTL082ARMZ	Dual JFET Op amp	3-02006
U102	74LVC1G1S7GW	Single 2-Input MPX	3-01766
U103	74HCT595PW	8-Bit Shift register	3-02169
U105	74HCT4051PW	8:1 Analog MPX	3-01996
U108	ADTL082ARMZ	Dual JFET Op amp	3-02006
U109	MAX3942	10 GBPS Laser diode driver	3-02038
U110	ADCLK925BCPZ	2:1 PECL Buffer	3-02026
U111	LM337T THICK	POS ADJ voltage regulator	3-02063
U112	ADA4860-1YRJZ	Current FB Op-amp	3-02003
U113	LM45CIM3	Centigrade Temp Sensor	3-00775
U114	TLV271DBVR	Single R-R Op Amp	3-02048
U115	74LVC1G3157	SPST Analog switch	3-02046
U200	LM7171AIM	High speed opamp	3-00819
U201	TLV2372IDGK	Dual RRIO CMOS Op-Amp	3-01434
U202	TS5A3166DBVR	SPST Analog switch	3-02049
U203	TS5A3166DBVR	SPST Analog switch	3-02049
U205	SKY65015-92LF	RF Gain Block	3-02167
U206	SKY65013-92LF	RF Gain Block	3-02043
U207	HMC788LP2E	RF Gain Block	3-02168
U208	LFCN-3800	FILTER LP 3.8GHz	6-00996
U209	HMC189MS8	Passive RF Doubler	3-02029
U210	HMC346MS8G	VC RF atten	3-02032
U211	HMC424LP3	DC-13 GHz 6-bit atten	3-02034
U212	TLV271DBVR	Single R-R Op Amp	3-02048
U213	AD8130ARM	Differential Amplifier	3-02000
U214	74LVC1G125DBV	Single tri-state buffer	3-01886
U215	74HCT4053PW	Triple 2:1 Analog MPX	3-01997
U216	74HCT595PW	8-Bit Shift register	3-02169
Z0	4-40X1/4PP	Hardware	0-00187
Z1	1-32, #4 SHOULD	Hardware	0-00231
Z2	TO-220	Hardware	0-00243
Z3	SG385 BRACKET	Fabricated component	7-02111
Z4	SIM-PCB S/N	Label	9-01570

Option 3: Rear panel I/Q BNCs (Assembly 335)

Ref	Value	Description	SRS P/N
C1	0.1U	Capacitor, 0603, X7R	5-00764
C2	0.1U	Capacitor, 0603, X7R	5-00764
C3	0.1U	Capacitor, 0603, X7R	5-00764
C4	0.1U	Capacitor, 0603, X7R	5-00764
C5	0.1U	Capacitor, 0603, X7R	5-00764
C6	0.1U	Capacitor, 0603, X7R	5-00764
C7	0.1U	Capacitor, 0603, X7R	5-00764
C8	0.1U	Capacitor, 0603, X7R	5-00764
C9	0.1U	Capacitor, 0603, X7R	5-00764
C10	0.1U	Capacitor, 0603, X7R	5-00764
C11	0.1U	Capacitor, 0603, X7R	5-00764
C12	0.1U	Capacitor, 0603, X7R	5-00764
C13	0.1U	Capacitor, 0603, X7R	5-00764
J1	73100-0195	Panel Mount BNC	1-01158
J2	73100-0195	Panel Mount BNC	1-01158
J3	73100-0195	Panel Mount BNC	1-01158
J4	15 PIN	Connector	1-01264
J5	73100-0195	Panel Mount BNC	1-01158
L1	2506031517Y0	Inductor BEAD 0603	6-00759
L2	2506031517Y0	Inductor BEAD 0603	6-00759
L3	2506031517Y0	Inductor BEAD 0603	6-00759
L4	2506031517Y0	Inductor BEAD 0603	6-00759
L5	2506031517Y0	Inductor BEAD 0603	6-00759
L6	2506031517Y0	Inductor BEAD 0603	6-00759
L7	2506031517Y0	Inductor BEAD 0603	6-00759
L8	2506031517Y0	Inductor BEAD 0603	6-00759
L9	2506031517Y0	Inductor BEAD 0603	6-00759
L10	2506031517Y0	Inductor BEAD 0603	6-00759
L11	2506031517Y0	Inductor BEAD 0603	6-00759
L12	2506031517Y0	Inductor BEAD 0603	6-00759
PCB1	SG385 OPT.3	Fabricated component	7-02103
R1	49.9	Resistor, 0603, Thin Film	4-02032
R2	2.00K	Resistor, 0603, Thin Film	4-02186
R3	2.00K	Resistor, 0603, Thin Film	4-02186
R4	2.00K	Resistor, 0603, Thin Film	4-02186
R5	2.00K	Resistor, 0603, Thin Film	4-02186
R6	49.9	Resistor, 0603, Thin Film	4-02032
R7	49.9	Resistor, 0603, Thin Film	4-02032
R8	1.37K	Resistor, 0603, Thin Film	4-02170
R9	1.00K	Resistor, 0603, Thin Film	4-02157
R10	1.15K Resistor, 0603, Thin Film	4-02163
R11	2.00K Resistor, 0603, Thin Film	4-02186
R12	2.00K Resistor, 0603, Thin Film	4-02186
R13	1.15K Resistor, 0603, Thin Film	4-02163
R14	10.0K Resistor, 0603, Thin Film	4-02253
R15	49.9 Resistor, 0603, Thin Film	4-02032
R16	49.9 Resistor, 0603, Thin Film	4-02032
R17	52.3 Resistor, Thin Film, MELF	4-00994
R18	24.9 Resistor, 0603, Thin Film	4-02003
R19	49.9 Resistor, 0603, Thin Film	4-02032
R20	1.15K Resistor, 0603, Thin Film	4-02163
R21	49.9 Resistor, 0603, Thin Film	4-02032
R22	49.9 Resistor, 0603, Thin Film	4-02032
R23	1.37K Resistor, 0603, Thin Film	4-02170
R24	1.00K Resistor, 0603, Thin Film	4-02157
R25	2.00K Resistor, 0603, Thin Film	4-02186
R26	2.00K Resistor, 0603, Thin Film	4-02186
R27	2.00K Resistor, 0603, Thin Film	4-02186
R28	2.00K Resistor, 0603, Thin Film	4-02186
R29	1.15K Resistor, 0603, Thin Film	4-02163
R30	2.00K Resistor, 0603, Thin Film	4-02186
R31	2.00K Resistor, 0603, Thin Film	4-02186
R32	1.15K Resistor, 0603, Thin Film	4-02163
R33	10.0K Resistor, 0603, Thin Film	4-02253
R34	49.9 Resistor, 0603, Thin Film	4-02032
R35	49.9 Resistor, 0603, Thin Film	4-02032
R36	52.3 Resistor, Thin Film, MELF	4-00994
R37	24.9 Resistor, 0603, Thin Film	4-02003
R38	1.15K Resistor, 0603, Thin Film	4-02163
R39	21.5K Resistor, 0603, Thin Film	4-02285

Parts List 150

R40 21.5K Resistor, 0603, Thin Film 4-02285
R41 21.5K Resistor, 0603, Thin Film 4-02285
R42 21.5K Resistor, 0603, Thin Film 4-02285
R5 2.00K Resistor, 0603, Thin Film 4-02186
R6 49.9 Resistor, 0603, Thin Film 4-02032
R7 49.9 Resistor, 0603, Thin Film 4-02032
R8 1.37K Resistor, 0603, Thin Film 4-02170
R9 1.00K Resistor, 0603, Thin Film 4-02157
U1 AD8130ARM Differential Amplifier 3-02000
U2 TLV3502AIDR R-R Comapartor			3-02019
U3 74LVC32AD Quad 2-Input OR gate			3-01087
U4 AD8131AR Diff Amp			3-01129
U5 AD8130ARM Differential Amplifier 3-02000
U6 65LVDS1DBV LVDS Driver			3-01769
U7 TLV3502AIDR R-R Comapartor			3-02019
U8 AD8131AR Diff Amp			3-01129
Z0 4-40X3/16PP Hardware			0-00241
Z1 1/2 CUSTOM Wire			0-01259
Z2 SG385 BRACKET Fabricated component			7-02112
Z3 SIM-PCB S/N Label			9-01570

Power Supply (Assemblies 337 & 338)

Ref	Value	Description	SRS P/N
C1	820UF	Electrolytic, 50V, T/H 5-00844
C2	10U/T35	SMD TANTALUM, D-Case	5-00319
C3	330U HIGH RIPPL Capacitor, High Ripple	5-00516
C4	10U/T35	SMD TANTALUM, D-Case	5-00319
C5	1000P	Capacitor, Ceramic, 1kV	5-00143
C6	10U/T35	SMD TANTALUM, D-Case	5-00319
C7	330U HIGH RIPPL Capacitor, High Ripple	5-00516
C8	10U/T35	SMD TANTALUM, D-Case	5-00319
C9	1000P	Capacitor, Ceramic, 1kV	5-00143
C10	.1U	Capacitor, X7R, 1207	5-00299
C11	330U HIGH RIPPL Capacitor, High Ripple	5-00516
C12	10U/T35	SMD TANTALUM, D-Case	5-00319
C13	1000P	Capacitor, Ceramic, 1kV	5-00143
C14	.1U	Capacitor, X7R, 1208	5-00299
C15	330U HIGH RIPPL Capacitor, High Ripple	5-00516
C16	10U/T35	SMD TANTALUM, D-Case	5-00319
C17	.001U	SMD PPS Film	5-00442
C18	820UF	Electrolytic, 50V, T/H 5-00844
C19	1000P	Capacitor, Ceramic, 1kV	5-00143
C20	.01U	Capacitor, X7R, 1206	5-00298
C21	330U HIGH RIPPL Capacitor, High Ripple	5-00516
C22	10U/T35	SMD TANTALUM, D-Case	5-00319
C23	1000P	Capacitor, Ceramic, 1kV	5-00143
D1	RED	LED, T1 Package	3-00011
D2	ES2D	Diode, SMB, Fast	3-02090
D3	MBRS230LT3G	DIODE Schottky	3-02091
D4	ES2D	Diode, SMB, Fast	3-02090
D5	ES2D	Diode, SMB, Fast	3-02090
D6	MBRS230LT3G	DIODE Schottky	3-02091
D7	ES2D	Diode, SMB, Fast	3-02090
D8	ES2D	Diode, SMB, Fast	3-02090
D9	MBRS230LT3G	DIODE Schottky	3-02091
D10	ES2D	Diode, SMB, Fast	3-02090
D11	ES2D	Diode, SMB, Fast	3-02090
D12	MBRS230LT3G	DIODE Schottky	3-02091
D13	ES2D	Diode, SMB, Fast	3-02090
D14	ES2D	Diode, SMB, Fast	3-02090
D15	MBRS230LT3G	DIODE Schottky	3-02091
D16	ES2D	Diode, SMB, Fast	3-02090
J1	4 PIN, WHITE	Header, Polarized	1-00260
J2	HEADER10	Header, 10 Pins	1-00554
J3	2 PIN, WHITE	Header, Polarized	1-00473
L1	10 UH / SMT	INDUCTOR 10U 2.5A	6-01016
L2	10 UH / SMT	INDUCTOR 10U 2.5A	6-01016
L3	10 UH / SMT	INDUCTOR 10U 2.5A	6-01016

L4	10 UH / SMT	INDUCTOR 10U 2.5A	6-01016
L5	10 UH / SMT	INDUCTOR 10U 2.5A	6-01016
L6	10 UH / SMT	INDUCTOR 10U 2.5A	6-01016
L7	10 UH / SMT	INDUCTOR 10U 2.5A	6-01016
PCB1	SG385 P/S PCB	Fabricated component	7-02205
Q1	PZT3904	NPN Transistor	3-01664
Q2	IRF530/IRF532	N Channel MOSFET	3-00283
Q3	IRF530/IRF532	N Channel MOSFET	3-00283
R1	7.50K Resistor, Thin Film, MELF	4-01201
R10	49.9 Resistor, Thin Film, MELF	4-00992
R11	0.15 OHM /2W	Shunt, 3008 Size	4-02530
R2	121	Resistor, Thin Film, MELF	4-01029
R3	100K	Resistor, Thin Film, MELF	4-01309
R4	2.00K Resistor, Thin Film, MELF	4-01146
R5	1.33K Resistor, Thin Film, MELF	4-01129
R6	49.9 Resistor, Thin Film, MELF	4-00992
R7	1.00K Resistor, Thin Film, MELF	4-01117
R8	49.9 Resistor, Thin Film, MELF	4-00992
R9	7.50K Resistor, Thin Film, MELF	4-01201
RN1	100Kx4D 5%	Network, DIP, Isolated	4-01704
RN2	100Kx4D 5%	Network, DIP, Isolated	4-01704
T1	DG645/SG385	Transformer	6-00765
U1	LM358	Dual op amp	3-00773
U2	LM45CIM3	Centigrade Temp Sensor	3-00775
U3	LM1085IT-ADJ	POS ADJ voltage regulator	3-02111
U4	LM2990T-15	LDO Negative regulator	3-01787
U5	UA78L12ACPK	REG LIN POS 12V	3-02092
U6	LM1085IT-5.0/NO	Positive +5V Regulator	3-02112
U7	3525A	IC Switcher	3-00919
U8	LM2990T-5	LDO Negative regulator	3-01789
U9	LM1085IT-3.3/NO	Positive +3.3 V Regulator	3-02093
Z0	13 PIN, ORANGE	Connector, 13 Pins	1-00601
Z1	2 PIN, 24AWG	Non board mount	1-00472
Z2	4-40 KEP	Hardware	0-00043
Z3	36154	Hardware	0-00084
Z4	10-32 KEP	Hardware	0-00160
Z5	6-32X1/2RP	Hardware	0-00167
Z6	4-40X1/4PP	Hardware	0-00187
Z7	4-40X3/8PF	Hardware	0-00208
Z8	6-32X1/4PP	Hardware	0-00222
Z9	1-32, #4 SHOULD	Hardware	0-00231
Z10	TO-220	Hardware	0-00243
Z11	10-32X1/2PP	Hardware	0-00493
Z12	4-40X5/16PF	Hardware	0-00589
Z13	2-520184-2	Hardware	0-00634
Z14	4GREEN W/YELL	Wire	0-01014
Z15	KDE1205PHV2	Fan	0-01181
Z16	3 BLACK	Wire	0-01191
Z17	3 RED	Wire	0-01192
Z18	10 WHITE	Wire	0-01231
Z19	10 BLACK	Wire	0-01238
Z20	FN9222R-3-06	Power entry module	0-01333
Z21	AFM03	Silicone fan mount	0-01335
Z22	SILICONE TUBING	Hardware	0-01345
Z23	5 PIN, 18AWG/OR	Non board mount	1-00033
Z24	4 PIN, 18AWG/OR	Non board mount	1-00259
Z25	120W - 24V	OEM Power supply, +24V	6-01017
Z26	SG385 P/S ENCLO	Fabricated component	7-02198
Z27	SG385 P/S COVER	Fabricated component	7-02199
Z28	SG385 INSULATOR	Fabricated component	7-02200
Z29	SG385 SPACER BL	Fabricated component	7-02207

OCXO Timebase (Assembly 605)

Ref Value Description SRS P/N

J1 SSW-107-01-S-S Connector 1-01078
J3 09-52-3101 Connector 1-01058
PC1	CG635 TIMEBASE	Fabricated component	7-01586
R1	3.01K	Resistor, Metal Film	4-00176
R2	2.00K	Resistor, Metal Film	4-00158
R3	3.01K	Resistor, Metal Film	4-00176
R4	12.1K	Resistor, Metal Film	4-00148
U1 LM358 Dual OpAmp 3-00508
Z0	6-32 KEP	Hardware	0-00048
Z1	4-40X1/4PP	Hardware	0-00187
Z2	3403	Hardware	0-01090
Z3	26-48-1101	Connector	1-01057
Z4	SC10-24V - CG	Crystal Oscillator	6-00079
Z5	CG635, OPT	Fabricated component	7-01614

Option 4: Rubidium Timebase (Assembly 607)

Ref Value Description SRS P/N

J1 SSW-107-01-S-S Connector 1-01078
J3 09-52-3101 Connector 1-01058
PC1	CG635 TIMEBASE	Fabricated component	7-01586
R1	3.01K	Resistor, Metal Film	4-00176
R2	2.00K	Resistor, Metal Film	4-00158
R3	3.01K	Resistor, Metal Film	4-00176
R4	12.1K	Resistor, Metal Film	4-00148
U1 LM358 Dual OpAmp 3-00508
Z0	6-32 KEP	Hardware	0-00048
Z1	4-40X1/4PP	Hardware	0-00187
Z2	3403	Hardware	0-01090
Z3	26-48-1101	Connector	1-01057
Z4	SC10-24V - CG	Crystal Oscillator	6-00079
Z5	CG635, OPT	Fabricated component	7-01614

Main Chassis Kit (Assembly 336)

Ref Value Description SRS P/N

J1 25 PIN		Connector 1-01277
J2 15 PIN		Connector 1-01276
J3 15 PIN		Connector 1-01276
Z0	9-PIN	Connector	1-01309
Z1	132360	Connector	1-01334
Z2	141-14SM+	Connector	1-01335
Z3	DG535-36	Fabricated component	7-00122
Z4	SG385 MB TO RP	Fabricated component	7-02105
Z5	SG385 RR CHASSI	Fabricated component	7-02107
Z6	SG385 COVER PLT	Fabricated component	7-02114
Z7	SG, OPT.COVR	Fabricated component	7-02134
Z8	SG385 TOP COVER	Fabricated component	7-02167
Z9	SG385 BOT. COVE	Fabricated component	7-02168
Z10	SG385 EMI SHIEL	Fabricated component	7-02169
Z11	SG385 BAR RF BL	Fabricated component	7-02170
Z12	SG385 LEXAN	Fabricated component	7-02171
Z13	SG385 CRYSTAL S	Fabricated component	7-02197
Z14	SG385 S/N LABEL Label		9-01641
Z15	4-40X3/16 M/F	Hardware	0-00079
Z16	4-40X1/4PF	Hardware	0-00150
Z17	RIGHT FOOT	Hardware	0-00179
Z18	LEFT FOOT	Hardware	0-00180
Z19	6-32X3/8PP	Hardware	0-00185
Z20	4-40X1/4PP	Hardware	0-00187
Z21	F0104	Hardware	0-00189
Z22	REAR FOOT	Hardware	0-00204
Z23	4-40X3/16PP	Hardware	0-00241
Z24	8-32X1/4PF	Hardware	0-00242
Z25	10-32X3/8	Hardware	0-00248
Z26	6-32X7/16 PP	Hardware	0-00315
Z27	6-32X1/2FP BLK	Hardware	0-00492
Z28	554043-1	Hardware	0-00500
Z29	4-40X3/8PF UNDR	Hardware	0-00835
Z30	6-32X1/4 BLACK	Hardware	0-01212
Z31	10-32 x 3/8	Hardware	0-01331
Z32	4-40 x 1/8 UNDE	Hardware	0-01334
Z33	FOOT PLUG	Hardware	0-01352
Z4	SG385 MB TO RP	Fabricated component	7-02105
Z5	SG385 RR CHASSI	Fabricated component	7-02107
Z6	SG385 COVER PLT	Fabricated component	7-02114
Z7	SG, OPT.COVR	Fabricated component	7-02167
Z8	SG385 TOP COVER	Fabricated component	7-02168
Z9	SG385 BOT. COVE	Fabricated component

Appendix C : Schematic Diagrams

Schematic 1: Block Diagram

Schematic 2: Front Panel Display

Schematic 3: Display EMI Filter

Schematic 4: Mother Board 1, Frequency Refs

Schematic 5: Mother Board 2, 19 MHz Ref

Schematic 6: Mother Board 3, CPU

Schematic 7: Mother Board 4, Modulation Processor

Schematic 8: Mother Board 5, Modulation ADC / DACs

Schematic 9: Mother Board 6, RF Reference

Schematic 10: Mother Board 7, Interface

Schematic 11: Mother Board 8, Power Supplies

Schematic 12: Mother Board to RF Jumper

Schematic 13: SG384 Synthesizer 1, 2-4 GHz and Control

Schematic 14: SG384 Synthesizer 2, Dividers and LPF

Schematic 15: SG386 Synthesizer 1, 3-6 GHz and Control

Schematic 16: SG386 Synthesizer 2, Dividers and LPF

Schematic 17: SG384 Output 1, Attenuation & Controls

Schematic 18: SG384 Output 2, RF Stage

Schematic 19: SG384 Output 3, BNC

Schematic 20: SG386 Output 1, Attenuation & Controls

Schematic 21: SG386 Output 2, RF Stage

Schematic 22: SG386 Output 3, BNC

Schematic 23: Power Supply

Schematic 24: Rear Panel Option Jumper

Schematic 25: Option #1 Clock Outputs

Schematic 26: Option #2 4-8 GHz Doubler

Schematic 27: Option #3 I/Q Modulator

Schematic 28: Timebase Adaptor Interface

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Blank white image with no visible content, text, or symbols

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Blank white image with no visible content, text, or symbols

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Blank white image with no visible content, text, or symbols

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Electrical schematic diagram of a multi-pin integrated circuit with labeled components and connections

722M P251 P258 712M L1 R1/40 L2 R2/40 L3 R3/3 200V C1 R1/20 C2 R2/2 C3 R3/1 C4 R4/1 C5 R5/1 C6 R6/1 C7 R7/1 C8 R8/1 C9 R9/1 C10 R10/1 C11 R11/1 C12 R12/1 C13 R13/1 C14 R14/1 C15 R15/1 C16 R16/1 C17 R17/1 C18 R18/1 C19 R19/1 C20 R20/1 C21 R21/1 C22 R22/1 C23 R23/1 C24 R24/1 C25 R25/1 C26 R26/1 C27 R27/1 C28 R28/1 C29 R29/1 C30 R30/1 C31 R31/1 C32 R32/1 C33 R33/1 C34 R34/1 C35 R35/1 C36 R36/1 C37 R37/1 C38 R38/1 C39 R39/1 C40 R40/1 C41 R41/1 C42 R42/1 C43 R43/1 C44 R44/1 C45 R45/1 C46 R46/1 C47 R47/1 C48 R48/1 C49 R49/1 C50 R50/1 C51 R51/1 C52 R52/1 C53 R53/1 C54 R54/1 C55 R55/1 C56 R56/1 C57 R57/1 C58 R58/1 C59 R59/1 C60 R60/1 C61 R61/1 C62 R62/1 C63 R63/1 C64 R64/1 C65 R65/1 C66 R66/1 C67 R67/1 C68 R68/1 C69 R69/1 C70 R70/1 C71 R71/1 C72 R72/1 C73 R73/1 C74 R74/1 C75 R75/1 C76 R76/1 C77 R77/1 C78 R78/1 C79 R79/1 C80 R80/1 C81 R81/1 C82 R82/1 C83 R83/1 C84 R84/1 C85 R85/1 C86 R86/1 C87 R87/1 C88 R88/1 C89 R89/1 C90 R90/1 C91 R91/1 C92 R92/1 C93 R93/1 C94 R94/1 C95 R95/1 C96 R96/1 C97 R97/1 C98 R98/1

Electrical schematic diagram with labeled components, ICs, and signal paths for a power supply or control circuit.

Electrical schematic diagram with multiple circuit components, voltage regulators, and component labels in Chinese.

Electrical schematic diagram with labeled components, ICs, resistors, capacitors, and wiring connections

Electrical schematic diagram of a power supply circuit with labeled components, ICs, and wiring connections

Electrical schematic diagram of a power supply circuit with labeled components and connections

Electrical schematic diagram with component labels, traces, and Chinese explanatory text on the upper left.

LED/ULF INPUT SWITCH R2000 MP 1.25V CNTFS CONTINENT GND 4.5V DC 400V_126C 80V 1.21A 300V 4.27A 300V 1.21A 300V 4.27A 300V 1.21A 300V 4.27A 300V 1.21A 300V 4.27A 300V 1.21A 300V 4.27A 300V 1.21A 30V 1.21A 30V 1.21A 30V 1.21A 30V 1.21A 30V 1.21A 30V 1.21A 30V 1.21A 30V 1.21A 30V 1.21A 30V 1.21A 400V_126C 290V LEVELS: 2.9V FORED, 2.9V FORED. 400V_126C 400V_126C 400V_126C 400V_126C 400V_126C 400V_126C 400V_126C 400V_126C 400V_126C 400V_126C 400V_126C

LCC STAGS_LFE3 +257 LEAD_001 56 +257 LEAD_002 +257 LEAD_003 +257 LEAD_004 +257 LEAD_005 +257 LEAD_006 +257 LEAD_007 +257 LEAD_008 +257 LEAD_009 +257 LEAD_010 +257 LEAD_011 +257 LEAD_012 +257 LEAD_013 +257 LEAD_014 +257 LEAD_015 +257 LEAD_016 +257 LEAD_017 +257 LEAD_018 +257 LEAD_019 +257 LEAD_020 +257 LEAD_021 +257 LEAD_022 +257 LEAD_023 +257 LEAD_024 +257 LEAD_025 +257 LEAD_026 +257 LEAD_027 +257 LEAD_028 +257 LEAD_029 +257 LEAD_030 +257 LEAD_031 +257 LEAD_032 +257 LEAD_033 +257 LEAD_034 +257 LEAD_035 +257 LEAD_036 +257 LEAD_037 +257 LEAD_038 +257 LEAD_039 +257 LEAD_040 +257 LEAD_041 +257 LEAD_042 +257 LEAD_043 +257 LEAD_044 +257 LEAD_045 +257 LEAD_046 +257 LEAD_047 +257 LEAD_048 +257 LEAD_049 +257 LEAD_050 +257 LEAD_051 +257 LEAD_052 +257 LEAD_053 +257 LEAD_054 +257 LEAD_055 +257 LEAD_056 +257 LEAD_057 +257 LEAD_058 +257 LEAD_059 +257 LEAD_060 +257

Title
SARAY POWER SUPPLY INTERFACE
Code C	SARAY NUMBER TAT
	SARAY NETHERGARD REV C.004 C
Color Color		# # #

1.0V/1.0V/1.0V 2.0V/1.0V/1.0V 3.0V/1.0V/1.0V 4.0V/1.0V/1.0V 5.0V/1.0V/1.0V 6.0V/1.0V/1.0V 7.0V/1.0V/1.0V 8.0V/1.0V/1.0V 9.0V/1.0V/1.0V 10.0V/1.0V/1.0V 11.0V/1.0V/1.0V 12.0V/1.0V/1.0V 13.0V/1.0V/1.0V 14.0V/1.0V/1.0V 15.0V/1.0V/1.0V 16.0V/1.0V/1.0V 17.0V/1.0V/1.0V 18.0V/1.0V/1.0V 19.0V/1.0V/1.0V 20.0V/1.0V/1.0V 21.0V/1.0V/1.0V 22.0V/1.0V/1.0V 23.0V/1.0V/1.0V 24.0V/1.0V/1.0V 25.0V/1.0V/1.0V 26.0V/1.0V/1.0V 27.0V/1.0V/1.0V 28.0V/1.0V/1.0V 29.0V/1.0V/1.0V 30.0V/1.0V/1.0V 31.0V/1.0V/1.0V 32.0V/1.0V/1.0V 33.0V/1.0V/1.0V 34.0V/1.0V/1.0V 35.0V/1.0V/1.0V 36.0V/1.0V/1.0V 37.0V/1.0V/1.0V 38.0V/1.0V/1.0V 39.0V/1.0V/1.0V 40.0V/1.0V/1.0V 41.0V/1.0V/1.0V 42.0V/1.0V/1.0V 43.0V/1.0V/1.0V 44.0V/1.0V/1.0V 45.0V/1.0V/1.0V 46.0V/1.0V/1.0V 47.0V/1.0V/1.0V 48.0V/1.0V/1.0V 49.0V/1.0V/1.0V 50.0V/1.0V/1.0V 51.0V/1.0V/1.0V 52.0V/1.0V/1.0V 53.0V/1.0V/1.0V 54.0V/1.0V/1.0V 55.0V/1.0V/1.0V 56.0V/1.0V/1.0V 57.0V/1.0V/1.0V 58.0V/1.0V/1.0V 59.0V/1.0V/1.0V 60.0V/1.0V/1.0V 61.0V/1.0V/1.0V 62.0V/1.0V/1.0V 63.0V/1.0V/1.0V 64.0V/1.0V/1.0V 65.0V/1.0V/1.0V 66.0V/1.0V/1.0V 67.0V/1.0V/1.0V 68.0V/1.0V/1.0V 69.0V/1.0V/1.0V 70.0V/1.0V/1.0V 71.0V/1.0V/1.0V 72.0V/1.0V/1.0V 73.0V/1.0V/1.0V 74.0V/1.0V/1.0V 75.0V/1.0V/1.0V 76.0V/1.0V/1, 2, 3, 4, 5, 6, 7, 8, 9, 12, 23, 34, 45, 56, 67, 78, 89, 9A, 9B, 9C, 9D, 9E, 9F, 9G, 9H, 9I, 9J, 9K, 9L, 9M, 9N, 9O, 9P, 9Q, 9R, 9S, 9T, 9U, 9W, 9X, 9Y, 9Z, 9A, 9B, 9C, 9D, 9E, 9F, 9G, 9H, 9I, 9J, 9K, 9L, 9M, 9N, 9O, 9P, 9Q, 9R, 9S, 9T, 9U, 9W, 9X, 9Y, 9P, 9Q, 9R, 9S, 9T, 9U, 9W, 9X, 9Y, 9Z, 9A, 9B, 9C, 9D, 9E, 9F, 9G, 9H, 9I, 9J, 9K, 9L, 9M, 9N, 9A, 9B, 9C, 9D, 9E, 9F, 9G, 9H, 9I, 9J, 9K, 9L, 9M, 9N, 9A, 9B, 9C, 9D, 9E, 9F, 9G, 9H, 9I, 9J, 9M, 9N, 9A, 9B, 9C, 9D, 9E, 9F, 9G, 9H, 9I, A B C D E F G H I N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T M N T

HONG KONG, JIYUEN BAAND BETWEEN MOTI EFOBANO AND IT BLOCK.

Title
SPECIALTY, NOVEMBER AND THOMBOOD TO BE RICHEN
Date: 01/03/2014
Date: 01/03/2014
Date: 01/03/2014

Electrical schematic diagram of a power supply circuit with labeled components, ICs, resistors, capacitors, and connections.

Electrical schematic diagram with component labels and connections, including ICs, resistors, capacitors, and power supply lines.

Electrical schematic diagram with component labels and wiring connections, including capacitors, transistors, inductors, and a highlighted circuit block.

Electrical schematic diagram with labeled components, traces, and wiring connections for a power supply or control circuit.

Electrical schematic diagram with component labels, values, and Chinese annotations for electronic circuitry or signal processing.

Electrical schematic diagram of a multi-channel power supply circuit with labeled components and connections

Electrical schematic diagram with labeled components, ICs, resistors, capacitors, and connections for a power supply or circuit analysis system.

TITLE
SANDY RASSFRAK'S OUTPUT TO FRONT PANEL RING
COW DUCT, TENT NUMBER TAYC	SCORE OF OUTPUTS REV 0.024 C
Color Sheet		3 -1 -3

Electrical schematic diagram with labeled components, traces, and wiring connections for a power supply or circuit analysis system.

ALL POINT CTORING SWITCH/CALE SWITCH/CALE SWITCH A POWER AS TRANSFER PERECEUT ROLLAR SWITCH/CALE SWITCH IN THE BANETRONE (0-120V) 425V 72 E' F' O' H C L G L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L ATC-LA 6.00V 100Ω 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0MΩ 6.00V 100Ω 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.5V 6.00V 100Ω 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.0V 1.5V 6.00V 100Ω 1.0V 1.0V 1.0V 1.5V 2.5V 3.5V 4.5V 5.5V 6.5V 7.5V 8.5V 9.5V 10.5V 11.5V 12.5V 13.5V 14.5V 15.5V 16.5V 17.5V 18.5V 22.5V 6.00V 100Ω 1.0V 1.0V 1.0V 2.5V 3.5V 4.5V 5.5V 6.5V 7.5V 8.5V 9.5V 10.5V 11.5V 12.5V 13.5V 14.5V 22.5V 6.00V 100Ω 1.0V 1.0V 2.5V 3.5V 4.5V 5.5V 6.5V 7.5V 8.5V 9.5V 10.5V 11.5V 12.5V 13.5V 14.5V 22.5V 6.00V 100Ω 1,2,3,4,5,6,7,8,9,10,12,14,16,24,36,48,64,76,88,98,12,24,36,48,64,76,88,98,12,24,36,48,64,76,88,98,12,24,36,48,64,76,88,98,12,24,36,48,64,76,88,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,97, ATTENATION: TCI & LAC SFPPTON: TCIC TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK TELK

Electrical circuit diagram with labeled components, ICs, resistors, capacitors, and measurement instruments

CONDUCTOR TO NOT ENDCARD LTD. 10V VOLTAGE ARE FREED FOR EN (120V) 15V (120V) 15V (120V) 15V LUT. 10V VOLTAGE ARE FREED FOR EN (120V) 15V (120V) 15V (120V) 15V CONDUCTOR LTD. 10V VOLTAGE ARE FREED FOR EN (120V) 15V (120V) 15V (120V) 15V LUT. 10V VOLTAGE ARE FREED FOR EN (120V) 15V (120V) 15V (120V) 15V CONDUCTOR TO NOT ENDCARD LTD. 10V VOLTAGE ARE FREED FOR EN (120V) 15V (120V) 15V (120V) 15V CONDUCTOR TO NOT ENDCARD LTD. 10V VOLTAGE ARE FREED FOR EN (120V) 15V (120V) 15V (120V) 15V

SUPPORT CONNECT TO SPIN PANEL SWITCH (30 NATIONAL) SUPPORT SUPPORT SWITCH TO 50% PANE (100% OFF) SUPPORT SWITCH TO 50% PANE (100% OFF) SUPPORT SWITCH TO 50% PANE SUPPORT SWITCH TO 50% PANE SUPPORT SWITCH TO 50% PANE SUPPORT SWITCH TO 50% PANE SUPPORT SWITCH TO 50% PANE SUPPORT SWITCH TO 50% PANE SUPPORT SWITCH TO 50% PANE SUPPORT SWITCH TO 50% PANE SUPPORT SWITCH TO 50% PANE SUPPORT SWITCH TO 50% PANE TODANCE

Sr. No.	SALAD, PHEKPHOR, VENIPE, OPLCNS
Sr. D### H### T##s Inc.	A##P##, S##N##
Date: 2014		S

Electrical schematic diagram of a power supply circuit with labeled components, ICs, and wiring connections

Electrical schematic diagram with labeled components, ICs, and signal paths for electronic circuit analysis

OFF-OUTRUNS SELECT ON OCCLES OF REACH ITEMS OF FLU.2012 3.0V 7.4V 2.6V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.0V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.0V 7.4V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.5V 7.4V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.5V 7.9V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.6V 7.9V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.8V 1.6V 7.9V 1.6W 1.6W 1.6W 1.6W 1.6W 1.6W 1.6W 1.6W 1.6W 1.6W 1.6W 1.6W 1.6W 1.6W 1.6W 1.6W 1.6W 1.6W

Title
SANSY OPTION 1 & 1 HOODULATOR REAR PWR NO
Low Document Number ForC	SANSY OPTION 2 FEV A CEN B
Code Sheet		a'

CONNECTOR TO SC-10 OCXO. SSM-107-01-S-S J1 +V 2 OND 3 +RP 4 -RP 5 RDP 6 OND 7 EPC HED7A SRS 10MHz/+24V OCXO P/N SC-10-24-1-J-J-J-J MOUNT SC-10 WITH POUR KEYSTONE SPACERS. (P/N 3403 (.25" DIA, 0.125" LENGTH.) EITHER THE SC10 OCXO OR THE PRS10 BUBIDIUM CAN BE INSTALLED THE SAME PCB & BRACKET ARE USED FOR OCXO & RS. CONNECTOR TO PRS-10 ED. J2 LOCK/1PR9 RXD/RPC POT W 8 POT+ 3 POT- 10MHz SHIELD 13 SHIELD 14 SHELL 15 TxD/PHOTO +24 CLEAN 1PDG IN GROUND +24 HEAT DSM-11W13 RUBIDIUM OSCILLATOR SRS P/N PRS10 U2B 4 74HC94 U2A 1 2 U2A 74HC94 U1A LM350 8 3 1 2 4 R1 3.01K R2 2.00K U1B LM350 7 5 6 R3 3.01K R4 12.1K GAIN = 2.50X (PCR SC-10) U2C 6 74HC94 U2D 8 74HC94 U2E 10 74HC94 U2F 12 74HC94 CONNECTOR TO MOTHER BOARD RXD PRPO CTL TXD -DC10 SHENSE -PES10 SHENSE 10MHz OUT 10MHz SHIELD GROUND +24VDC GROUND CONN10F156 U3 LM78L05 VCC C1 C +5V FOR INVERTER 0.187" THRU HOLES FOR SC-10 STANFORD RESEARCH SYSTEMS Title TIMEMASE OPTION ADAPTER Size Document Number REV C SG TB1B B Date: February 15, 2005 Sheet 1 of 1