X8DAH+ - Motherboard Supermicro - Free user manual and instructions

USER MANUAL X8DAH+ Supermicro

The information in this User's Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note: For the most up-to-date version of this manual, please see our website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except as expressly permitted by the terms of said license.

IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the manufacturer's instruction manual, may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case you will be required to correct the interference at your own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. "Perchlorate Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate".

WARNING: Handling of lead solder materials used in this product may expose you to lead, a chemical known to the State of California to cause birth defects and other reproductive harm.

Manual Revision 1.0c

Release Date: April 26, 2010

Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this document.

Information in this document is subject to change without notice. Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders.

Copyright © 2010 by Super Micro Computer, Inc.

All rights reserved.

Printed in the United States of America

Preface

About this Manual

This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the SUPER● X8DAH+/X8DAH+-F motherboard.

About this Motherboard

The SX8DAH+/X8DAH+-F supports the Intel® 5500/5600 Series Processor platform, the first dual-processing platform that supports the Intel QuickPath Interconnect (QPI) Technology, providing the next generation point-to-point system interface to replace the current Front Side Bus. With the Intel 5520 chipset built in, the X8DAH+/X8DAH+-F substantially enhances system performance with increased bandwidth and unprecedented scalability optimized for HPC/Cluster systems and intensive applications. Please refer to our website (http://www.supermicro.com/products/) for updates on supported processors. This product is intended to be installed and serviced by professional technicians.

Manual Organization

Chapter 1 describes the features, specifications and performance of the motherboard and provides detailed information about the chipset.

Chapter 2 provides hardware installation instructions. Read this chapter when installing the processor, memory modules and other hardware components into the system. If you encounter any problems, see Chapter 3, which describes troubleshooting procedures for video, memory and system setup stored in the CMOS.

Chapter 4 includes an introduction to the BIOS and provides detailed information on running the CMOS Setup utility.

Appendix A lists BIOS POST Error Codes. Appendix B and Appendix C provide the Windows OS and Other Software Installation Instructions.

Conventions Used in the Manual

Special attention should be given to the following symbols for proper installation and to prevent damage done to the components or injury to yourself.

Danger/Caution: Instructions to be strictly followed to prevent catastrophic system failure or to avoid bodily injury.

Warning: Important information given to ensure proper system installation or to prevent damage to the components.

Note: Additional Information given to differentiate various models or to ensure correct system setup.

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Website: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Asia-Pacific

Address: Super Micro Computer, Inc.

4F, No. 232-1, Liancheng Rd.

Chung-Ho 235, Taipei County

Taiwan, R.O.C.

Tel: +886-(2)

8226-3990

Fax: +886-(2)

8226-3991

Website: www.supermicro.com.tw

Technical Support:

Email: [e-mail]

Tel: [phone], ext.132 or 139

Table of Contents

Preface

Chapter 1 Introduction

1-1 Overview 1-1

1-2 Chipset Overview 1-10

1-3 Special Features 1-11

1-4 PC Health Monitoring 1-11

1-5 ACPI Features.... 1-12

1-6 Power Supply 1-13

1-7 Super I/O.... 1-13

1-8 Overview of the Winbond WPCM450 Controller (For X8DAH+-F Only) ..... 1-14

Chapter 2 Installation

2-1 Static-Sensitive Devices 2-1

2-2 Motherboard Installation 2-2

2-3 Processor and Heatsink Installation.... 2-3

2-4 Memory Installation 2-7

2-5 Control Panel Connectors/IO Ports 2-12

1. Back Panel Connectors/IO Ports 2-12

ATX PS/2 Keyboard and PS/2 Mouse Ports 2-13

Serial Ports 2-14

Video Connector 2-14

Universal Serial Bus (USB) 2-15

Ethernet Ports 2-16

(Back_Panel) High Definition Audio (HD Audio) 2-17

CD &10-pin Audio Headers....2-17

1. Front Control Panel 2-18

2. Front Control Panel Pin Definitions 2-19

NMI Button 2-19

Power LED 2-19

HDD LED 2-20

NIC1/NIC2 LED Indicators 2-20

Overheat (OH)/Fan Fail LED 2-21

Power Fail LED 2-21

Reset Button 2-22

Power Button 2-22

2-6 Connecting Cables 2-23

Power Connectors 2-23

Fan Headers....2-24

Chassis Intrusion 2-24

Internal Speaker 2-25

Power LED/Speaker 2-25

Overheat LED/Fan Fail (JOH1) 2-26

System Management Bus 2-27

Power SMB (I²C) Connector 2-27

2-7 Jumper Settings 2-28

Explanation of Jumpers 2-28

GLAN Enable/Disable 2-28

CMOS Clear 2-29

Watch Dog Enable/Disable 2-29

I²C Bus to PCI-Exp. Slots 2-30

VGA Enable 2-31

1394a-1/1394a-2 Enable 2-31

2-8 Onboard LED Indicators 2-32

GLAN LEDs 2-32

IPMI Dedicated LAN LEDs (X8DAH+-F) 2-32

Onboard Power LED 2-33

BMC Heartbeat LED (X8DAH+-F) 2-33

2-9 Floppy Drive, Serial ATA and SAS Connections 2-34

Floppy Connector 2-34

Serial ATA Ports.... 2-36

Chapter 3 Troubleshooting

3-1 Troubleshooting Procedures 3-1

Before Power On 3-1

No Power 3-1

No Video 3-2

Losing the System's Setup Configuration....3-2

Memory Errors 3-2

3-2 Technical Support Procedures 3-3

3-3 Frequently Asked Questions 3-3

3-4 Returning Merchandise for Service.... 3-4

Chapter 4 BIOS

4-1 Introduction.... 4-1

Starting BIOS Setup Utility 4-1

How To Change the Configuration Data.... 4-1

Starting the Setup Utility 4-2

4-2 Main Setup 4-2
4-3 Advanced Setup Configurations.... 4-4
4-4 Security Settings 4-24
4-5 Boot Configuration 4-25
4-6 Exit Options.... 4-27
4-7 BIOS Recovery 4-29

How to Recover the AMIBIOS Image (-the Main BIOS Block) 4-29

4.7.1 Boot Sector Recovery from a USB Device 4-29
4.7.2 Boot Sector Recovery from an IDE CD-ROM 4-30
4.7.3 Boot Sector Recovery from a Serial Port ("Serial Flash") 4-30

Appendix A BIOS Error Beep Codes

A-1 BIOS Error Beep Codes ......A-1

Appendix B Installing the Windows OS

B-1 Installing the Windows OS to a RAID System......B-1
B-2 Installing the Windows OS to a Non-RAID System ......B-2

Appendix C Software Installation Instructions

C-1 Installing Software Programs ......C-1
C-2 Configuring Supero Doctor III ......C-2

Chapter 1

Introduction

1-1 Overview

Checklist

Congratulations on purchasing your computer motherboard from an acknowledged leader in the industry. Supermicro boards are designed with the utmost attention to detail to provide the highest standards in quality and performance. Check that the following items have all been included with your motherboard. If anything listed here is damaged or missing, contact your retailer.

The following items are included in the retail box.

• One (1) Supermicro Mainboard

• One (1) floppy ribbon cable (CBL-022L)

One (1) IDE ATA66 cable (CBL-036L-03) •

Six (6) Serial ATA cables (CBL-0044L) •

One I/O backpanel shield (MCP-260-00025-0N)

One (1) Supermicro CD containing drivers and utilities •

One (1) User's/BIOS Manual •

SX8DAH+/X8DAH+-F Image

Top-down view of a green computer motherboard with multiple CPU and cooling units (no visible text or labels)

Note: The drawings and pictures shown in this manual were based on the latest PCB Revision available at the time of publishing of the manual. The motherboard you've received may or may not look exactly the same as the graphics shown in the manual.

SUPER X8DAH+/X8DAH+-F Layout

P2 DIMM3A P2 DIMM3B P2 DIMM3C P2 DIMM2A P2 DIMM2B P2 DIMM2C P2 DIMM1A P2 DIMM1B P2 DIMM1C CPU1 ALWAYS POPULATE DIMM1 FIRST CPU2 Skt7 PCI-E 2.0 x5 Skt8 PCI-E 2.0 x18 Skt9 PCI-E 2.0 x4 (in x6, 8bit) Skt10 PCI-E 2.0 x5 (in x16, 8bit) Skt11 PCI-E 2.0 x8 Skt12 PCI-E 2.0 x15 Skt13 PCI-E 2.0 x9 Skt14 PCI-E 2.0 x16 Skt15 PCI-E 2.0 x17 Skt16 PCI-E 2.0 x18 Skt17 PCI-E 2.0 x19 Skt18 PCI-E 2.0 x20 Skt19 PCI-E 2.0 x21 Skt20 PCI-E 2.0 x22 Skt21 PCI-E 2.0 x23 Skt22 PCI-E 2.0 x24 Skt23 PCI-E 2.0 x25 Skt24 PCI-E 2.0 x26 Skt25 PCI-E 2.0 x27 Skt26 PCI-E 2.0 x28 Skt27 PCI-E 2.0 x29 Skt28 PCI-E 2.0 x30 Skt29 PCI-E 2.0 x31 Skt30 PCI-E 2.0 x32 Skt31 PCI-E 2.0 x33 Skt32 PCI-E 2.0 x34 Skt33 PCI-E 2.0 x35 Skt34 PCI-E 2.0 x36 Skt35 PCI-E 2.0 x37 Skt36 PCI-E 2.0 x38 Skt37 PCI-E 2.0 x39 Skt38 PCI-E 2.0 x40 SUPERO X8DAH+ Rev. 2.0 SP1 JBAT1* FANS I/BATA5 ISATA3 ISUA1 JUASA JUNA ICH-3CD INTC IOH-3CD BIOS JBT1 ICH-1CR (SouthBrings) FLUXCY JPG1 JPG1 COM2 SIHO DP4 IPD1 IPD1 IPD1 IPD1 IPD1 IPD1 IPD1 IPD1 IPD1 IPD1 IPD1 IPD1 IPD1

Differences between X8DAH+/X8DAH+-F

	X8DAH+ X8DAH+-F
SATA (ICH10R) Yes Yes
IPMI 2.0 w/KVM No Yes
WPCM450 BMC No Yes
Dedicated LAN & PHY chip No Yes

Notes:

1. IPMI 2.0, WPCM450 BMC Controller, the PHY chip and Dedicated LAN port w/KVM support are available on the X8DAH+-F only. For more information, refer to the user guide posted on our website @ http://www.supermicro.com/support/manuals/.
2. The I-FAN 1 and I-FAN2 are available for a R. 2.0 or later version motherboard only.

Quick Reference

P2 DIMM3A P2 DIMM3B P2 DIMM3C P2 DIMM2A P2 DIMM2B P2 DIMM2C P2 DIMM1A P2 DIMM1B P2 DIMM1C CPU1 ALWAYS POPULATE DIMM1 FIRST CPU2 P1 DIMM1C P1 DIMM1B P1 DIMM1A P1 DIMM2C P1 DIMM2B P1 DIMM2A P1 DIMM3C P1 DIMM3B P1 DIMM3A ALWAYS POPULATE DIMM1 FIRST SUPER X8DAH+ Rev. 2.0 Intel IOH-36D FAN2 JBAT1+ JBAT1- Intel ICH 10R (SouthBrings) BIOS JBT1- I384 CTRI S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/O S I/C L S A T A5 L S A T A3 L S A T A1 L S A T A0 L S A T A9 L S A T A8 L S A T A7 L S A T A6 L S A T A5 L S A T A4 L S A T A3 L S A T A2 L S A T A1 L S A T A0 L S A T A9 L S A T A8 L S A T A7 L S A T A6 L S A T A5 L S A T A4 L S A T A3 L S A T A2 L S A T A1 L S A T A0 L S A T A9 L S A T A8 S I/O

Notes

Jumpers not indicated are for test purposes only. 1.

"■" indicates the location of Pin 1.2.

When DP4 is on, the onboard power connection is on. Make sure to unplug 3. the power cables before removing or installing components.

Warning:

1. To prevent damage to the power supply or motherboard, please use a power supply that contains a 24-pin and two 8-pin power connectors. Be sure to connect these connectors to the 24-pin (JPW1) and the two 8-pin (JPW2,JPW3) power connectors on the motherboard. Failure in doing so will void the manufacturer warranty on your power supply and motherboard.
2. To prevent system overheating, be sure to provide adequate airflow to the system.

X8DAH+/X8DAH+-F Quick Reference
Jumper Description Default Setting

JBT1 CMOS Clear Open (Normal)
JPIDE1 Compact Flash Enabled Pins 1-2 (Enabled)
JI2C1/JI2C2 SMB to PCI/PCI-E Slots Open/Open (Disabled)
JPG1 VGA Enable Pins 1-2 (Enabled)
JPI1 1394-1/1394 Enable Pins 1-2 (Enabled)
JPL1 LAN1/2 Enable Pins 1-2 (Enabled)
JWD1 Watch Dog Pins 1-2 (Reset)
Connector	Description
CNF1/CNF2	1394a-1/-2 Ports
Audio Connections	BP 7.1 HD Audio, BP Audio Header, CD_In
COM1/COM2	Backplane Serial Port/FP Serial Header
FAN 1-8	System/CPU Fan Headers (Fans 7~8: CPU Fans 1/2)
I-FAN 1/2	Fans 1/2 Headers for IOH Chips 1/2
Floppy	Floppy Drive
IDE	IDE Drive
JD1	PWR LED/Speaker Header (Pins 1~3: Power LED, Pins 6~7: Onboard Buzzer, Pins 4~7: External Speaker)
JF1	Front Panel Connector
JL1	Chassis Intrusion Header
JOH1	Overheat LED Header
JPI2C	Power Supply SMBbus I2C Header
JPW1, JPW2/JPW3	24-pin ATX PWR, 8-pin Secondary PWR (See Warning on Page 1-4)
LAN1/2, Dedicated LAN	G-LAN (RJ45) Ports (Dedicated LAN: X8DAH+-F)
I-SATA0 ~ I-SATA5	(Intel South Bridge) SATA Ports
SMBUS1	System Management Bus Header
SP1	Onboard Buzzer/Internal Speaker
USB 0/1, 2~5	Backpanel Universal Serial Bus (USB) Ports 0/1, 2~5
USB 6/7, 8, 9	Front Panel (Accessible) USB Ports 6/7 (JUSB4), USB 8 (JUSB2), USB 9 (JUSB5)
VGA	VGA Connector
LED	Description
DP4	Onboard Standby Power LED Indicator
DP5	BMC Heartbeat LED Indicator (X8DAH+F only)

Motherboard Features

CPU

Two Intel® 5500/5600 Series (LGA 1366) processors. Each processor supports two full-width Intel QuickPath Interconnect (QPI) @6.4 GT/s with a total of up to 51.2 GB/s Data Transfer Rate (6.4 GB/s per direction) (See Note 2 on P. 1-3.)

Memory

18 240-pin DIMM sockets support up to 192 GB of Reg. ECC or up to 48 GB of Unbuffered ECC/Non-ECC DDR3 1333/1066/800 MHz Memory modules (See Section 2-4 in Chapter 2 for DIMM Slot Population.) (See Note 2 on P. 1-3.)

Chipset

Intel 5520 chipset, including: two IOH-36D (I/O Hub) • One ICH10R (South Bridge) •

Expansion Slots

Three PCI-E 2.0 x8 slots (Slot 1/Slot 3/Slot7) • Two PCI-E 2.0 x16 slots (Slot 2/Slot 6) • One PCI-E 2.0 x4 (in x8) slots (Slot 5) • One PCI-E 2.0 x8 (in x16) slots (Slot 4) •

BIOS

32 Mb AMI SPI Flash ROM • PCI 2.2, ACPI 1.0/2.0/3.0, Plug and Play (PnP), DMI 2.3, USB Keyboard support, and SMBIOS 2.3

PC Health Monitoring

Onboard voltage monitors for CPU0 Vcore, CPU1 Vcore, 1.5V, 5V, 5VSB, 12V, -12V, 3.3Vcc, 3.3VSB, VBAT and Vtt

• Fan status monitor with firmware control
• CPU/chassis temperature monitors
• Platform Environment Control Interface (PECI) ready
• Thermal Monitor 2 (TM2) support
• CPU fan auto-off in sleep mode
• CPU slow-down on temperature overheat
- Pulse Width Modulation (PWM) Fan Control
• CPU thermal trip support for processor protection, power LED
• Power-up mode control for recovery from AC power loss
• Auto-switching voltage regulator for CPU cores
• System overheat/Fan Fail LED Indicator and control
• Chassis intrusion detection

System resource alert via Supero Doctor III •

ACPI Features

Slow blinking LED for suspend state indicator •

Main switch override mechanism •

ACPI Power Management •

Keyboard Wakeup from Soft-off •

Onboard I/O

Intel ICH10R supports six SATA2 ports (with RAID0, RAID1, RAID10, RAID5 - supported in the Windows OS Environment, and RAID0, RAID1, RAID10 for Linux Platforms) (Note 1)

• Intel 82576 Gigabit Ethernet controllers supports Giga-bit LAN1/2 ports

• A PHY chip supports the Dedicated IPMI LAN (X8DAH+-F only) (Note 2)

- One VGA Port supported by the Winbond WPCM 450R BMC Controller PS/2 mouse/keyboard ports, one COM port and one Serial header •

Up to ten USB 2.0 (Universal Serial Bus) (six Backpanel USB Ports, and four Front Panel/Front Accessible USB connections)

• Super I/O: Winbond W83627DHG

ALC 8830 Audio Controller supports 7.1 HD Audio with Line-in, Line-out and • Microphone, Backpanel Audio and CD connections

• Two Internal1394 headers

One EIDE Ultra DMA/100 bus master interface supports UDMA Mode 5 and • PIO Mode 4

• IPMI 2.0 with full KVM support (X8DAH+-F only) (Note 2)

Other

- Console redirection

- Onboard Fan Speed Control by Thermal Management via BIOS

CD/Diskette Utilities

• BIOS flash upgrade utility and device drivers

Dimensions

- Ext. ATX 13.68" (L) x 13.00" (W) (347.47 mm x 330.20 mm)

Note 1: For more information on SATA HostRAID configuration, please refer to the Intel SATA HostRAID User's Guide posted on our website @ http://www.supermicro.com/support/manuals/.

Note 2: For more information on IPMI configuration, please refer to the Embedded IPMI User's Guide posted on our website @ http://www.super-micro.com/support/manuals/.

X8DAH+ System Diagram

graph TD
    subgraph X8DAH+
        A["CPU1"] -->|QPI| B["CPU2"]
        B --> C["DDR3 800/1066/1333"]
        D["PCI-E X16"] -->|SLOT#2 PCI-E X16| E["Ports 3~6 (IOH 36D) Intel 5520"]
        F["PCI-E X8"] -->|SLOT#3 PCI-E X8| G["Ports 7&8 Ports 9&10"]
        H["PCI-E X16"] -->|SLOT#1 PCI-E X8| I["Ports 1&2 Ports 1&2"]
        J["LAN1"] --> K["INTEL 82576"]
        L["LAN2"] --> K
        M["PCI-E X8"] --> K
        N["PCI-E X16"] --> K
        O["PCI-E X16"] --> P["PCI-E X4"]
        Q["PCI-E X16"] --> R["PCI-E X16"]
        S["PCI-E X16"] --> T["PCI-E X16"]
        U["PCI-E X16"] --> V["PCI-E X16"]
    end

    W["PCI E X4"] --> X["Ports 1&2 (IOH 36D) Intel 5520"]
    X --> Y["Ports 3&4 Ports 5&6"]
    Z["PCI-E X8"] --> AA["Ports 7~10"]
    AB["PCI-E X8"] --> AC["Ports 7~10"]
    AD["PCI-E X16"] --> AE["Ports 7~10"]
    AF["PCI-E X16"] --> AG["Ports 7~10"]
    AH["PCI-E X16"] --> AI["Ports 7~10"]
    AJ["PCI-E X16"] --> AK["Ports 7~10"]
    AL["PCI-E X16"] --> AM["Ports 7~10"]
    AN["PCI-E X16"] --> AO["Ports 7~10"]
    AP["PCI-E X16"] --> AQ["Ports 7~10"]
    AR["PCI-E X16"] --> AS["Ports 7~10"]
    AT["PCI-E X4"] --> AU["Ports 33MHz HD"]
    AV["PCI-E X8"] --> AW["Ports 33MHz HD"]
    AX["PCI-E X8"] --> AY["Ports 33MHz HD"]
    AZ["PCI-E X8"] --> BA["Ports 33MHz HD"]
    BB["PCI-E X8"] --> BC["Ports 33MHz HD"]
    BD["PCI-E X8"] --> BE["Ports 33MHz HD"]
    BF["PCI-E X8"] --> BG["Ports 33MHz HD"]
    BH["PCI-E X8"] --> BI["Ports 33MHz HD"]
    BJ["PCI-E X8"] --> BK["Ports 33MHz HD"]
    BL["PCI-E X8"] --> BM["Ports 33MHz HD"]
    BN["PCI-E X8"] --> BO["Ports 33MHz HD"]
    BP["PCI-E X8"] --> BQ["Ports 33MHz HD"]
    BR["PCI-E X8"] --> BS["Ports 33MHz HD"]
    BT["PCI-E X8"] --> BU["Ports 33MHz HD"]
    BV["PCI-E X8"] --> BW["Ports 33MHz HD"]
    BX["PCI-E X8"] --> BY["Ports 33MHz HD"]
    BZ["PCI-E X8"] --> CA["Ports 33MHz HD"]
    CB["PCI-E X8"] --> CC["Ports 33MHz HD"]
    DD["PCI-E X8"] --> DE["Ports 33MHz HD"]
    FD["PCI-E X8"] --> ED["Ports 33MHz HD"]
    EF["X8DAH+"] --> AG["X8DAH+ Block Diagram"]
    AG --> AH["X8DAH+ Block Diagram"]
    AH --> AI["X8DAH+ Block Diagram"]
    AI --> AJ["X8DAH+ Block Diagram"]

    subgraph Inputs
        AK["SATAC2 #0-5"] --> AL["#0-9 USB2.0"]
        AL --> AM["#0-9"]
        AM --> AN["SATO WPCM150"]
        AN --> AO["VGA"]
        AN --> AP["SIO WB3627DHG"]
        AP --> AQ["FLOPPY"]
        AR["VGA"] --> AS["LPC BUS"]
        AT["VGA"] --> AU["SATO WPCM150"]
        AV["VGA"] --> AW["SATO WPCM150"]
        AX["VGA"] --> AY["SATO WPCM150"]
        AZ["VGA"] --> AZ["SATO WPCM150"]
        BA["VGA"] --> BB["SATO WPCM150"]
        BC["VGA"] --> BD["SATO WPCM150"]
        BD --> BE["SATO WPCM150"]
        BF["SATO WPCM150"] --> BG["VGA"]
        BH["SATO WPCM150"] --> BH["SATO WPCM150"]
        BI["SATO WPCM150"] --> BJ["VGA"]
        BK["SATO WPCM150"] --> BK["SATO WPCM150"]
        BL["SATO WPCM150"] --> BM["SATO WPCM150"]
        BN["SATO WPCM150"] --> BO["SATO WPCM150"]
        BP["SATO WPCM150"] --> BP["SATO WPCM150"]
        BQ["SATO WPCM150"] --> BR["SATO WPCM150"]
        BS["SATO WPCM150"] --> BT["SATO WPCM150"]
        BU["SATO WPCM150"] --> BU["SATO WPCM150"]
        BV["SATO WPCM150"] --> BW["SATO WPCM150"]
        BX["SATO WPCM150"] --> BX["SATO WPCM150"]
        BY["SATO WPCM150"] --> BY["SATO WPCM150"]
        BZ["SATO WPCM150"] --> BZ["SATO WPCM150"]
        BW["SATO WPCM150"] --> BW["SATO WPCM150"]
        BX["SATO WPCM150"] --> BX["SATO WPCM150"]
        BY["SATO WPCM150"] --> BY["SATO WPCM150"]
        BZ["SATO WPCM150"] --> BZ["SATO WPCM150"]
        BW["SATO WPCM150"] --> BW["SATO WPCM150"]

    subgraph Inputs
        CA["SATAC2 #0-5"] --> AL
        AL --> AM
        AM --> AN
        AN --> AO
        AO --> AP
        AP --> AQ
        AQ --> AR
        AR --> AS
        AS --> AT
        AT --> AU
        AU --> AV
        AV --> AW
        AW --> AX
        AX --> AY
        AY --> AZ
        AZ --> BA
        BA --> BB
        BB --> BC
        BC --> BD
        BD --> BE
        BE --> BF
        BF --> BG
        BG --> BH
        BH --> BH
        BH --> BH
        BH --> BH
        BH --> BH
        BH --> BH
        BH --> BH
    end

    subgraph Inputs
        BI["SATO WPCM150"] --> BJ["SATO WPCM150"]
        BJ --> BK["SATO WPCM150"]
        BK --> BL
        BL --> BM
        BM --> BN
        BN --> BO
        BO --> BP
        BP --> BR
        BR --> BR
        BR --> BR
    end

    subgraph Inputs
        CA["SATAC2 #0-5"] --> AL
        AL --> AM
        AM --> AN
        AN --> AO
        AO --> AP
        AP --> AQ
        AQ --> AR
        AR --> BR
        BR --> BR
        BR --> BR
    end

    subgraph Inputs
        CA["SATAC2 #0-5"] --> AL
        AL --> AM
        AM --> AN
        AN --> AO
        AO --> AP
        AP --> AR
        AR --> AR
        AR --> BR
    end

    subgraph Inputs
        CA["SATAC2 #0-5"] --> AL
        AL --> AM
        AM --> AN
        AN --> AO
        AO --> AP
        AP --> AR
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] --> AL
        AL --> AM
        AM --> AN
        AN --> AO
        AO --> AP
        AP --> AR
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] --> AL
        AL --> AM
        AM --> AN
        AN --> AO
        AO --> AP
        AP --> AR
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] --> AL
        BL <-->|SLOT#2| AL
        BL <-->|SLOT#3| AL
        BL <-->|SLOT#4| AL
        BL <-->|SLOT#5| AL
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] | AL |
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] | AL |
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] | AL |
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] | AL |
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] | AL |
    end

    subgraph Inputs
        CA["SATAAC2 #0-9"] | AL |
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] | AL |
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] | AL |
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] | AL |
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] | AL |
    subgraph Inputs
        CA["SATAC2 #0-9"] | AL |
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] | AL |
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] | AL |
    end

    subgraph Inputs
        CA["SATAC2 #0-9"] | AL |
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#2| A
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#3| A
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#4| A
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#5| A
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#6| A
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#7| A
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#8| A
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#9| A
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#A| A
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#B| A
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#C| A
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#D| A
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#E| A
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#F| A
    end

    subgraph Inputs
        CA["SATAC2 @4_             "] <-->|SLOT#G| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#H| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#I| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#J| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#K| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#L| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#M| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#N| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#O| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#P| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#Q| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#R| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#S| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#T| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#U| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#V| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#W| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#X| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#Y| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#Z| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#W| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#X| A
    end

    subgraph Inputs:
        CA["SATAC2 @4_             "] <-->|SLOT#Y| A

Block Diagram for the X8DAH+

Note: This is a general block diagram. Please see the previous Motherboard Features pages for details on the features of each motherboard.

X8DAH+-F System Diagram

graph TD
    subgraph "X8DAH+" -F Block Diagram
        direction TB
        A["CPU1"] -->|QPI| B["CPU2"]
        B --> C["PCI-E X4 SLOT#5"]
        B --> D["PCI-E X8 SLOT#7"]
        B --> E["PCI-E X8 SLOT#4"]
        B --> F["PCI-E X16 SLOT#6"]
        G["PCI-E X16"] --> H["SLOT#2 PCI-E X16"]
        G --> I["SLOT#3 PCI-E X8"]
        G --> J["SLOT#1 PCI-E X8"]
        K["PCI-E X8"] --> L["SLOT#3 PCI-E X8"]
        K --> M["SLOT#1 PCI-E X8"]
        N["PCI-E X16"] --> O["SLOT#3 PCI-E X8"]
        N --> P["SLOT#1 PCI-E X8"]
        Q["PCI-E X16"] --> R["SLOT#3 PCI-E X8"]
        Q --> S["SLOT#1 PCI-E X8"]
        T["PCI-E X16"] --> U["SLOT#3 PCI-E X8"]
        T --> V["SLOT#1 PCI-E X8"]
        W["PCI-E X16"] --> X["SLOT#3 PCI-E X8"]
        W --> Y["SLOT#1 PCI-E X8"]
        Z["PCI-E X16"] --> AA["SLOT#3 PCI-E X8"]
        Z --> AB["SLOT#1 PCI-E X8"]
        AC["PCI-E X16"] --> AD["SLOT#3 PCI-E X8"]
        AE["PCI-E X16"] --> AF["SLOT#1 PCI-E X8"]
        AG["PCI-E X16"] --> AH["SLOT#3 PCI-E X8"]
        AI["PCI-E X16"] --> AJ["SLOT#3 PCI-E X8"]
        AK["PCI-E X16"] --> AL["SLOT#3 PCI-E X8"]
        AM["PCI-E X16"] --> AN["SLOT#3 PCI-E X8"]
        AO["PCI-E X16"] --> AP["SLOT#3 PCI-E X8"]
        AQ["PCI-E X16"] --> AR["SLOT#3 PCI-E X8"]
        AS["PCI-E X16"] --> AT["SLOT#3 PCI-E X8"]
        AU["PCI-E X16"] --> AV["SLOT#3 PCI-E X8"]
        AW["PCI-E X16"] --> AX["SLOT#3 PCI-E X8"]
        AY["PCI-E X8"] --> AZ["SLOT#2 PCI-E X16"]
        BA["PCI-E X8"] --> BB["SLOT#3 PCI-E X8"]
        BC["PCI-E X8"] --> BD["SLOT#1 PCI-E X8"]
        BE["PCI-E X8"] --> BF["SLOT#1 PCI-E X8"]
        BG["PCI-E X8"] --> BH["SLOT#3 PCI-E X8"]
        BI["PCI-E X8"] --> BJ["SLOT#3 PCI-E X8"]
        BK["PCI-E X8"] --> BL["SLOT#3 PCI-E X8"]
        BM["PCI-E X8"] --> BN["SLOT#3 PCI-E X8"]
        BO["PCI-E X8"] --> BP["SLOT#3 PCI-E X8"]
        BQ["PCI-E X8"] --> BR["SLOT#3 PCI-E X8"]
        BS["PCI-E X8"] --> BT["SLOT#3 PCI-E X8"]
        BU["PCI-E X8"] --> BV["SLOT#3 PCI-E X8"]
        BW["PCI-E X8"] --> BX["SLOT#3 PCI-E X8"]
        BY["PCI-E X8"] --> BZ["SLOT#3 PCI-E X8"]
        CA["PCI-E X8"] --> CB["SLOT#3 PCI-E X8"]
        CC["PCI-E X8"] --> CD["SLOT#3 PCI-E X8"]
        ED["PCI-E X8"] --> DE["SLOT#3 PCI-E X8"]
        EF["PCI-E X8"] --> EG["SLOT#3 PCI-E X8"]
        EH["PCI-E X8"] --> EI["SLOT#3 PCI-E X8"]
        IJ["PCI-E X8"] --> IJ_SLS["PCI E 36D (IOH 36D)"]
        JX["PCI-E X8"] --> YX_SLS["Port 7&8 Ports 9&10"]
        ZL["PCI-E X8"] --> YL_SLS["Port 7&8 Ports 9&10"]
        BQL["PCI-E X8"] --> YL_SLS["Port 7&8 Ports 9&10"]
        ZM["PCI-E X8"] --> YM_SLS["Port 7&8 Ports 9&10"]
        AAV["PCI-E X8"] --> YV_SLS["Port 7&8 Ports 9&10"]
        ABV["PCI-E X8"] --> YV_SLS["Port 7&8 Ports 9&10"]
        BZL["PCI-E X8"] --> YV_SLS["Port 7&8 Ports 9&10"]
        ZM_II["PCI-E X4"] --> ZM_SLS["ESI ESI"]
        ZM_CTRL["IDE CTRL"] --> ZM_CTRL_PICIE_X1
        ZM_CTRL_PICIE_X1 --> ZM_CTRL_PICIE_X1
        ZM_CTRL_PICIE_X1 --> ZM_CTRL_PICIE_X1
        ZM_CTRL_PICIE_X1 --> ZM_CTRL_PICIE_X1
    end

    subgraph "X8DAH+" -F Block Diagram
        direction TB
        A --> A
        B --> B
        C --> C
        D --> D
        E --> E
        F --> F
        G --> G
        H --> H
        IJ --> IJ_SLS
        AJ --> AJ_SLS
    end

    subgraph "X8DAH+" -F Block Diagram
        direction TB
        A --> A
        B --> B
        C --> C
        D --> C
        E --> D
        F --> E
        G --> G
        H --> H
        IJ --> IJ_SLS
        AJ --> AJ_SLS
    end

    subgraph "X8DAH+" -F Block Diagram
        direction TB
        A --> A
        B --> B
        C --> C
        D --> C
        E --> D
        F --> D
        G --> E
    end

    subgraph "X8DAH+" -F Block Diagram
        direction TB
        A --> A
        B --> B
        C --> C
        D --> C
    end

    subgraph "X8DAH+" -F Block Diagram
        direction TB
        A --> A
        B --> B
        C --> C
    end

    subgraph "X8DAH+" -F Block Diagram
        direction TB
        A --> A
        B --> B
        C --> C
    end

    subgraph "X8DAH+" -F Block Diagram
        direction TB
        A --> A
        B --> B
        C --> C
    end

    subgraph "X8DAH+" -F Block Diagram
        direction TB
        A --> B
        B --> C
    end

    subgraph "X8DAH+" -F Block Diagram
        direction TB
        A --> A
        B --> B
    end

    subgraph "X8DAH+" -F Block Diagram
        direction TB
        A --> A
        B --> B
    end

    subgraph "X8DAH+" -F Block Diagram
        direction TB
        A --> A
        B --> B
    end

    subgraph "X8DAH+" -F Block Diagram
        direction TB
        A --> A
        B --> B
    end

    sub-Block Diagrams:
    direction TB
    A2["PCIE-X4 SLOTS #5"] --> A2_2["PCIE-X4 SLOTS #5"]
    A2_2 --> A2_2_2["PCIE-X4 SLOTS #5"]
    A2_2_2_2["PCIE-X4 SLOTS #5"]
    A2_2_2_2_2["PCIE-X4 SLOTS #5"]

    direction TB
    A2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2

    direction TB
    A2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2_2

    direction TB
    A2_2_2_2_2_2_2_2-4["SLOS 33MHz HD"] --> A2_2-4_SLOS 33MHz HD & USB & LPC BUS & RF/RF ports & memory control & interface & memory management & system architecture & memory management & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture & system architecture, etc.

    sub-Block Diagrams:
    direction TB
    A1["IDE CTRL"] --> A1a["IDE CTRL"]
    A1b["HDR1 CTRL"] --> A1c["HDR1 CTRL"]
    A1d["AUDIO CTRL"] --> A1e["Audio CTRL"]
    A1f["BIOS"] --> A1g["BIOS"]
    A1h["RMI"] <--> A1i["RMI"]
    A1j["LDC WPCM450"] <--> A1k["LDC WPCM450"]
    A1l["DDDR II"] <--> A1m["VGA"]
    A1n["SIO W83627DHG"] <--> A1o["FLOPPY"]

    direction TB
    A1a -.->|PID| A1b
    A1b -.->|PID| A1c
    A1c -.->|PID| A1d
    A1d -.->|PID| A1e

    direction TB
    A1a -.->|PID| A1b
    A1b -.->|PID| A1c
    A1c -.->|PID| A1d

    direction TB
    A1a -.->|PID| A1b
    A1b -.->|PID| A1c

    direction TB
    A1a -.->|PID| A1b

    direction TB
    A1a -.->|PID| A1c

    direction TB
    A1a -.->|PID| A1b

    direction TB
    A1a -.->|PID| A1c

    direction TB
    A1a -.->|PID| A1b

    direction TB
    A1a -.->|PID| A1c

    direction TB
    A1a -.->|PID| A1b

    direction TB
    style "X8DAH+" -F Block Diagram fill:#f9f,stroke:#333,stroke-width:2px,stroke-dasharray: 5 5;

    note right of "PCIE-X4 SLOTS"

Block Diagram for the X8DAH+-F

Note: This is a general block diagram. Please see the previous Motherboard Features pages for details on the features of each motherboard.

1-2 Chipset Overview

Built upon the functionality and the capability of the 5500/5600 Series Processor platform, the X8DAH+/X8DAH+-F motherboard provides the performance and feature set required for dual-processor/IOH-based high-end systems optimized for High Performance Computing (HPC)/Cluster platforms. The 5520 chipset consists of the IOH 36D (I/O Hub), and the ICH10R (South Bridge). With the Intel QuickPath Interconnect (QPI) controller built in, the 5520 platform offers the next generation point-to-point system interconnect interface that replaces the current Front Side Bus Technology, substantially enhancing system performance and scalability.

The IOH-36D connects to each processor through an independent QPI link. Each link consists of 20 pairs of unidirectional differential lanes for transmission and receiving in addition to a differential forwarded clock. A full-width QPI link pair provides 84 signals.

The 5520 chipset supports up to 36 PCI Express Gen2 lanes, peer-to-peer read and write transactions. The ICH10R provides up to seven PCI-Express ports, six SATA ports and 10 USB connections.

In addition, the 5520 platform also offers a wide range of RAS (Reliability, Availability and Serviceability) features. These features include memory interface ECC, x4/x8 Single Device Data Correction (SDDC), Cyclic Redundancy Check (CRC), parity protection, out-of-band register access via SMBus, memory mirroring, memory sparing, and Hot-plug support on the PCI-Express Interface.

Features of the 5500/5600 Processor and the 5520 Chipset

Four processor cores in each processor with 8MB shared cache among cores •

• Two full-width Intel QPI links, up to 6.4 GT/s of data transfer rate in each direction
  • Virtualization Technology, Integrated Management Engine supported
• Point-to-point cache coherent interconnect, Fast/narrow unidirectional links, and Concurrent bi-directional traffic
• Error detection via CRC and Error correction via Link level retry

1-3 Special Features

Recovery from AC Power Loss

BIOS provides a setting for you to determine how the system will respond when AC power is lost and then restored to the system. You can choose for the system to remain powered off (in which case you must hit the power switch to turn it back on) or for it to automatically return to a power-on state. See the Advanced BIOS Setup section to change this setting. The default setting is Last State.

1-4 PC Health Monitoring

This section describes the PC health monitoring features of the X8DAH+/X8DAH+-F. All have an onboard System Hardware Monitor chip that supports PC health monitoring. An onboard voltage monitor will scan these onboard voltages continuously: CPU0 Vcore, CPU1 Vcore, 1.5V, 5V, 5VSB, 12V, -12V, 3.3Vcc, 3.3VSB, VBAT and Vtt. Once a voltage becomes unstable, a warning is given or an error message is sent to the screen. The user can adjust the voltage thresholds to define the sensitivity of the voltage monitor.

Fan Status Monitor with Firmware Control

The PC health monitor can check the RPM status of the cooling fans. The onboard CPU and chassis fans are controlled by Thermal Management via BIOS (under Hardware Monitoring in the Advanced Setting).

Environmental Temperature Control

The thermal control sensor monitors the CPU temperature in real time and will turn on the thermal control fan whenever the CPU temperature exceeds a user-defined threshold. The overheat circuitry runs independently from the CPU. Once it detects that the CPU temperature is too high, it will automatically turn on the thermal fan control to prevent any overheat damage to the CPU. The onboard chassis thermal circuitry can monitor the overall system temperature and alert users when the chassis temperature is too high.

Note: To prevent system overheating, be sure to provide adequate airflow to the system.

CPU Fan Auto-Off in Sleep Mode

The CPU fan becomes active when the power is turned on. It continues to operate when the system enters the Standby mode. When in the sleep mode, the CPU will not run at full power, thereby generating less heat.

System Resource Alert

This feature is available when used with Supero Doctor III in the Windows OS environment or used with Supero Doctor II in Linux. Supero Doctor is used to notify the user of certain system events. For example, you can also configure Supero Doctor to provide you with warnings when the system temperature, CPU temperatures, voltages and fan speeds go beyond a pre-defined range.

1-5 ACPI Features

ACPI stands for Advanced Configuration and Power Interface. The ACPI specification defines a flexible and abstract hardware interface that provides a standard way to integrate power management features throughout a PC system, including its hardware, operating system and application software. This enables the system to automatically turn on and off peripherals such as CD-ROMs, network cards, hard disk drives and printers.

In addition to enabling operating system-directed power management, ACPI provides a generic system event mechanism for Plug and Play and an operating system-independent interface for configuration control. ACPI leverages the Plug and Play BIOS data structures while providing a processor architecture-independent implementation that is compatible with both Windows 2000 and Windows 2003 Operating Systems.

Slow Blinking LED for Suspend-State Indicator

When the CPU goes into a suspend state, the chassis power LED will start blinking to indicate that the CPU is in suspend mode. When the user presses any key, the CPU will wake-up and the LED will automatically stop blinking and remain on.

Main Switch Override Mechanism

When an ATX power supply is used, the power button can function as a system suspend button to make the system enter a SoftOff state. The monitor will be suspended and the hard drive will spin down. Pressing the power button again will cause the whole system to wake-up. During the SoftOff state, the ATX power supply provides power to keep the required circuitry in the system "alive." In case the system malfunctions and you want to turn off the power, just press and hold the power button for 4 seconds. This option can be set in the Power section of the BIOS Setup routine.

1-6 Power Supply

As with all computer products, a stable power source is necessary for proper and reliable operation. It is even more important for processors that have high CPU clock rates.

The X8DAH+/X8DAH+-F can accommodate 24-pin ATX power supplies. Although most power supplies generally meet the specifications required by the CPU, some are inadequate. In addition, the two 12V 8-pin power connections are also required to ensure adequate power supply to the system. Also your power supply must supply 1.5A for the Ethernet ports.

Warning: To prevent damage to the power supply or motherboard, please use a power supply that contains a 24-pin and two 8-pin power connectors. Be sure to connect these connectors to the 24-pin (JPW1) and the two 8-pin (JPW2, JPW3) power connectors on the motherboard for adequate power supply to your system. Failure in doing so will void the manufacturer warranty on your power supply and motherboard.

It is strongly recommended that you use a high quality power supply that meets ATX power supply Specification 2.02 or above. It must also be SSI compliant (For more information, please refer to the website at http://www.ssiforum.org/). Additionally, in areas where noisy power transmission is present, you may choose to install a line fi Iter to shield the computer from noise. It is recommended that you also install a power surge protector to help avoid problems caused by power surges.

1-7 Super I/O

The disk drive adapter functions of the Super I/O chip include a floppy disk drive controller that is compatible with industry standard 82077/765, a data separator, write pre-compensation circuitry, decode logic, data rate selection, a clock generator, drive interface control logic and interrupt and DMA logic. The wide range of functions integrated onto the Super I/O greatly reduces the number of components required for interfacing with floppy disk drives. The Super I/O supports 360 K, 720 K, 1.2 M, 1.44 M or 2.88 M disk drives and data transfer rates of 250 Kb/s, 500 Kb/s or 1 Mb/s. It also provides two high-speed, 16550 compatible serial communication ports (UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable baud rate generator, complete modem control capability and a processor interrupt system. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which support higher speed modems.

The Super I/O provides functions that comply with ACPI (Advanced Configuration and Power Interface), which includes support of legacy and ACPI power manage-

ment through an SMI or SCI function pin. It also features auto power management to reduce power consumption.

1-8 Overview of the Winbond WPCM450 Controller (For X8DAH+-F Only)

The Winbond WPCM450 Controller is a Baseboard Management Controller (BMC) that supports the 2D/VGA-compatible Graphics Core with the PCI interface, Virtual Media, and Keyboard/Video/Mouse Redirection (KVMR) modules. With blade-oriented Super I/O capability built-in, the WPCM450 Controller is ideal for legacy-reduced server platforms.

The WPCM450 interfaces with the host system via a PCI interface to communicate with the Graphics core. It supports USB 2.0 and 1.1 for remote keyboard/mouse/virtual media emulation. It also provides LPC interface to control Super IO functions. The WPCM450 is connected to the network via an external Ethernet PHY module.

The WPCM450 communicates with onboard components via six SMBus interfaces, fan control, and Platform Environment Control Interface (PECI) buses.

Chapter 2

Installation

2-1 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic components. To prevent damage to your system board, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD.

Precautions

Use a grounded wrist strap designed to prevent static discharge.

Touch a grounded metal object before removing the board from the antistatic bag.

• Handle the board by its edges only; do not touch its components, peripheral chips, memory modules or gold contacts.
• When handling chips or modules, avoid touching their pins.

Put the motherboard and peripherals back into their antistatic bags when not in use.

- For grounding purposes, make sure your computer chassis provides excellent conductivity between the power supply, the case, the mounting fasteners and the motherboard.

- Use only the correct type of onboard CMOS battery as specified by the manufacturer. Do not install the onboard battery upside down to avoid possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking the board, make sure the person handling it is static protected.

2-2 Motherboard Installation

All motherboards have standard mounting holes to fit different types of chassis. Make sure that the locations of all the mounting holes for both motherboard and chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended because they ground the motherboard to the chassis. Make sure that the metal standoffs click in or are screwed in tightly. Then use a screwdriver to secure the motherboard onto the motherboard tray. Note: Some components are very close to the mounting holes. Please take precautionary measures to prevent damage to these components when installing the motherboard to the chassis. Locations of Mounting Holes

Tools Needed

1. Phillips Screwdriver

1. Pan head #6 screws

Installation Instructions

Install the IO shield into the chassis. 1.

Locate the mounting holes on the moth-2. erboard. Refer to the layout above for mounting hole locations.

Locations of Mounting Holes

Computer layout diagram with pixelated image of a computer monitor and labeled buttons like 'Sunset X30A4h'

Locate the matching mounting holes on 3. the chassis. Align the mounting holes on the motherboard against the mounting holes on the chassis.

Install standoffs in the chassis as needed.4.

Install the motherboard into the chassis carefully to avoid damage to mother-5. board components.

Warning: To avoid damaging the motherboard and its components, please do not apply any force greater than 8 lb/sq.in (8 lbs. per square inch) when installing a screw into a mounting hole.

Insert a Pan head #6 screw into a mounting hole on the motherboard and its 6. matching mounting hole on the chassis, using a Phillips screwdriver.

Repeat Step 4 to insert #6 screws to all mounting holes.7.

Make sure that the motherboard is securely placed on the chassis.8.

2-3 Processor and Heatsink Installation

When handling the processor package, avoid placing direct pressure on the label area of the fan.

Notes:

Always connect the power cord last and always remove it before adding, re-1. moving or changing any hardware components. Make sure that you install the processor into the CPU socket before you install the CPU heatsink.

Make sure to install the motherboard into the chassis before you install the 2. CPU heatsink and heatsink fans.

When purchasing a motherboard without a 5500/5600 Series processor pre-3. installed, make sure that the CPU socket plastic cap is in place, and none of the CPU socket pins are bent; otherwise, contact the retailer immediately.

Refer to the MB Features Section for more details on CPU support.4.

Installing an LGA 1366 Processor

Press the socket clip to release 1. the load plate, which covers the CPU socket, from its locking position.

Gently lift the socket clip to 2. open the load plate.

Hold the plastic cap at its north 3. and south center edges to remove it from the CPU socket.

Close-up of a computer motherboard with a yellow component being inserted, no visible text or symbols

Load Plate

Socket Clip

Plastic Cap

Close-up of a hand pressing down on a computer motherboard with a yellow arrow pointing to the component (no visible text or symbols)

Hold the north & south edges of the plastic cap to remove it

After removing the plastic cap, 4. using your thumb and the index fi nger, hold the CPU at the north and south center edges.

Align the CPU key, the semi-5. circle cutout, against the socket key, the notch below the gold color dot on the side of the socket.

Once both the CPU and the 6. socket are aligned, carefully lower the CPU straight down into the socket. (Do not rub the CPU against the surface of the socket or its pins to avoid damaging the CPU or the socket.)

With the CPU inside the socket, 7. inspect the four corners of the CPU to make sure that the CPU is properly installed.

Once the CPU is securely 8. seated on the socket, lower the CPU load plate to the socket.

Use your thumb to gently push 9. the socket clip down to the clip lock.

Warning: Please save the plastic cap. The motherboard must be shipped with the plastic cap properly installed to protect the CPU socket pins. Shipment without the plastic cap properly installed will cause damage to the socket pins.

Installing a CPU Heatsink

Do not apply any thermal 1. grease to the heatsink or the CPU die because the required amount has already been applied.

Place the heatsink on top of the 2. CPU so that the four mounting holes are aligned with those on the retention mechanism.

Install two diagonal screws (ie 3. the #1 and the #2 screws) and tighten them until just snug (-do not fully tighten the screws to avoid possible damage to the CPU.)

Finish the installation by fully 4. tightening all four screws.

Screw#1 Screw#2

Screw#1 Screw#2

Install Screw#1

Close-up of a computer RAM module with visible cooling fins and circuit board (no text or symbols)

Close-up of a computer motherboard with a heatsink and three yellow circular annotations highlighting specific components (no text or symbols present)

Removing the Heatsink

Warning: We do not recommend that the CPU or the heatsink be removed. However, if you do need to remove the heatsink, please follow the instructions below to uninstall the heatsink and prevent damage to the CPU or other components.

Unplug the power cord from the 1. power supply.

Disconnect the heatsink fan 2. wires from the CPU fan header.

Using a screwdriver, loosen and 3. remove the heatsink screws from the motherboard in the sequence as show in the picture on the right.

Hold the heatsink as shown 4. in the picture on the right and gently wriggle the heatsink to loosen it from the CPU. (Do not use excessive force when wriggling the heatsink.)

Once the heatsink is loosened, 5. remove it from the CPU socket.

To reinstall the CPU and the 6. heatsink, clean the surface of the CPU and the heatsink to get rid of the old thermal grease. Reapply the proper amount of thermal grease on the surface before reinstalling them on the motherboard.

Close-up of a computer motherboard with visible circuit board and green components (no text or symbols)

Using a screwdriver to remove Screw#1

Close-up of a computer motherboard with visible cooling fins and soldered components (no text or symbols)

Remove Screw#2

Close-up of a hand holding a green CPU socket on a motherboard (no visible text or symbols)

2-4 Memory Installation

Note: Check the Supermicro website for recommended memory modules.

CAUTION

STOP

Exercise extreme care when installing or removing DIMM modules to prevent any possible damage. Also note that the memory is interleaved to improve performance (See step 1).

DIMM Installation

Insert the desired number of DIMMs into the mem-1. ory slots, starting with DIMM #P1-DIMM1A. When populating DIMM modules always start with Channel1 (#P1-DIMM1A, 1B and 1C) first. For optimal memory performance, please use memory modules of the same type and the same speed on the motherboard. (See the Memory Installation Table.)

Insert each DIMM module vertically into its slot. 2. Pay attention to the notch along the bottom of the module to prevent inserting the DIMM module incorrectly.

Gently press down on the DIMM module until it 3. snaps into place in the slot. Repeat for all modules.

Press down the release tabs

Close-up of a computer motherboard with blue and green components, no visible text or symbols

Insert & press down a DIMM module into the slot

Close-up of hands installing a computer RAM module into a motherboard (no visible text or symbols)

Installing and Removing DIMMs

DIMM DDR3 Notch Release Tab Note: Notch should align with the receptive point on the slot Release Tab To Install: Insert module vertically and press down until it snaps into place. Pay attention to the alignment notch at the bottom.

To Remove:

Use your thumbs to gently push the release tabs near both ends of the module. This should release it from the slot.

Top View of DDR3 Slot

Release Tab Release Tab

Memory Support

The X8DAH+/X8DAH+-F supports up to 192 GB Registered ECC or up to 48GB Unbuffered ECC/Non-ECC DDR3 1333 MHz/1066 MHz/800 MHz in 18 DIMMs.

Note: Memory Speed support depends on the type(s) of CPU(s) used.

DIMM Module Population Configuration

For memory to work properly, follow the tables below for memory installation:

Memory Population for Optimal Performance-For a Motherboard with One CPU (CPU1) Installed
P1-DIMMs To Populate	P1-DIMMs
	Branch 0 Branch 1 Branch 2
3 DIMMs P1-1A P1-2A P1-3A
6 DIMMs P1-1A P1-1B P1-2A P1	2B P1-3A	P1-3B
9 DIMMs(RDIMMs only) (Note)	P1-1A	P1-1B	P1-1C	P1-2A	P1-2B	P1-2C	P1-3A	P1-3B	P1-3C
Note: Max. of 6 UDIMM modules are supported by a CPU.

Memory Population for Optimal Performance-For a Motherboard with One CPU (CPU2) Installed
P2-DIMMs	To Populate P2-DIMMs
	Branch 0			Branch 1			Branch 2
3 DIMMs	P2-1A			P2-2A			P2-3A
6 DIMMs	P2-1A	P2-1B		P2-2A	P2-2B		P2-3A	P2-3B
9 DIMMs(RDIMMs only (Note)	P2-1A	P2-1B	P2-1C	P2-2A	P2-2B	P2-2C	P2-3A	P2-3B	P2-3C
Note: Max. of 6 UDIMM modules are supported by a CPU.

Memory Population for Optimal Performance-For a Motherboard with Two CPUs Installed
	CPU 1 (To Populate P1-DIMMs)			CPU 2 (To Populate P2-DIMMs)
	Branch 0	Branch 1	Branch 2	Branch 0	Branch 1	Branch 2
6 DIMMs	P1-1A	P1-2A	P1-3A	P2-1A	P2-2A	P2-3A
12 DIMMs	P1-1A/1B	P1-2A/2B	P1-3A/3B	P2-1A/1B	P2-2A/2B	P2-3A/3B
18 DIMMs(For RDIMMs only) (Note)	P1-1A/1B/1C	P1-2A/2B/2C	P1-3A/3B/3C	P2-1A/1B/1C	P2-2A/2B/2C	P2-3A/3B/3C
Note: Max. of 6 UDIMM modules are supported by a CPU.

Memory Support for the Motherboard with the 5500 Processor(s) Installed

RDIMM Population for the Motherboard w/5500 Processors Installed
DIMM Slots per Channel	DIMMs Populated per Channel	DIMM Type (Reg.= Registered)	Speeds (in MHz) Ranks per DIMM (any combination; SR=Single Rank, DR=Dual Rank, QR=Quad Rank)
3 1 Reg. DDR3	ECC 800,1066	1333 SR or DR
3 1 Reg. DDR3	ECC 800,1066	QR
3 2 Reg. DDR3	ECC 800,1066	Mixing SR, DR
3 2 Reg. DDR3	ECC 800 (Note)	Mixing SR, DR, QR
3 3 Reg. DDR3	ECC 800 (Note)	Mixing SR, DR
Note: 1066 RDIMMs will run at 800 MHz (-BIOS automatic downgrading)

UDIMM Population for the Motherboard w/5500 Processors Installed
DIMM Slots per Channel	DIMMs Populated per Channel	DIMM Type (Unb.= Unbuffered)	Speeds (in MHz)	Ranks per DIMM (any combination; SR=Single Rank, DR=Dual Rank, QR=Quad Rank)
3 1 Unb. DDR3 ECC/Non-ECC	800,1066,1333 SR or DR
3 2 Unb. DDR3 ECC/Non-ECC	800,1066 Mixing SR, DR
3 3 Not available Not available	Not available

Memory Support for the Motherboard with the 5600 Processor(s) Installed
1.5V DIMMs ●

1.5V RDIMM Population for the Motherboard w/5600 Processors Installed
DIMM Slots per Channel	DIMMs Populated per Channel	DIMM Type (Reg.=Registered)	Speeds (in MHz) Ranks	per DIMM (any combination; SR=Single Rank, DR=Dual Rank, QR=Quad Rank)
3 1 Reg. DDR3	ECC 800,1066	1333 SR or DR
3 1 Reg. DDR3	ECC 800,1066	(Note 1) QR
3 2 Reg. DDR3	ECC 800,1066	1333 Mixing SR,	DR
3 2 Reg. DDR3	ECC 800 (Note 2)	Mixing SR, DR, QR
3 3 Reg. DDR3	ECC 800 (Note 2)	Mixing SR, DR
Note 1: 1333 MHz RDIMMs will run at 1066 MHz (-BIOS automatic downgrading).Note 2: 1333/1066 MHz RDIMMs will run at 800 MHz (-BIOS automatic downgrading).Note 3: Mixing of 1.35V and 1.5V DIMMs is not recommended.
1.5V UDIMM Population for the Motherboard w/5600 Processors Installed
DIMM Slots per Channel	DIMMs Populated per Channel	DIMM Type (Unb.= Unbuffered)	Speeds (in MHz) Ranks	per DIMM (any combination; SR=Single Rank, DR=Dual Rank, QR=Quad Rank)
3 1 Unb. DDR3 ECC/Non-ECC	800,1066,1333 SR or DR
3 2 Unb. DDR3 ECC/Non-ECC	800,1066, 1333 Mixing SR, DR
3 3 Not Available Not Available	Not Available
Note 1: 1333 MHz for two DIMMs per channel is supported when Unbuf./ECC DIMMs are used. Note 2: Mixing of 1.35V and 1.5V DIMMs is not recommended.

1.35V DIMMs •

1.35V RDIMM Population for the Motherboard w/5600 Processors Installed
DIMM Slots per Channel	DIMMs Populated per Channel	DIMM Type (Reg.=Registered)	Speeds (in MHz) Ranks	per DIMM (any combination; SR=Single Rank, DR=Dual Rank, QR=Quad Rank)
3 1 Reg. DDR3 ECC 800,1066,1333 SR or DR
3 1 Reg. DDR3 ECC 800 (Note 1) QR
3 2 Reg. DDR3 ECC 800,1066 (Note 2) Mixing SR, DR
3 2 Reg. DDR3 ECC 800 (Note 3) Mixing SR, DR, QR
3 3 Not Available Not Available Not Available
Note 1: 1333/1066 MHz QR RDIMMs will run at 800 MHz (-BIOS automatic downgrading).Note 2: 1333 MHz SR/DR RDIMMs will run at 800 MHz (-BIOS automatic downgrading).Note 3: 1333/1066 MHz SR/DR/QR RDIMMs will run at 800 MHz (-BIOS automatic downgrading).Note 4: Mixing of 1.35V and 1.5V DIMMs is not recommended.

1.35V UDIMM Population for the Motherboard w/5600 Processors Installed
DIMM Slots per Channel	DIMMs Populated per Channel	DIMM Type (Unb.= Unbuffered)	Speeds (in MHz) Ranks	per DIMM (any combination; SR=Single Rank, DR=Dual Rank, QR=Quad Rank)
3 1 Unb. DDR3 ECC 800,1066,1333 SR or DR
3 2 Unb. DDR3 ECC 800,1066 Mixing SR, DR
3 3 Not Available Not Available		Not Available
Note 1: 1333 MHz for two DIMMs per channel is supported when Unbuf./ECC DIMMs are used. Note 2: Mixing of 1.35V and 1.5V DIMMs is not recommended.

Note 1: Due to OS limitations, some operating systems may not show more than 4 GB of memory.

Note 2: Due to memory allocation to system devices, the amount of memory that remains available for operational use will be reduced when 4 GB of RAM is used. The reduction in memory availability is disproportional. (See the following Table.)

Possible System Memory Allocation & Availability
System Device Size Physical Memory		Remaining (-Available) (4 GB Total System Memory)
Firmware Hub i ash memory (System BIOS)	1 MB 3.99 GB
Local APIC 4 KB 3.99 GB
Area Reserved for the chipset 2 MB 3.99 GB
I/O APIC (4 Kbytes) 4 KB 3.99 GB
PCI Enumeration Area 1 256 MB 3.76 GB
PCI Express (256 MB) 256 MB 3.51 GB
PCI Enumeration Area 2 (if needed)-Aligned on 256-MB boundary-	512 MB 3.01 GB
VGA Memory 16 MB 2.85 GB
TSEG 1 MB 2.84 GB
Memory available for the OS & other applications		2.84 GB

2-5 Control Panel Connectors/IO Ports

The I/O ports are color coded in conformance with the PC 99 specification. See the picture below for the colors and locations of the various I/O ports.

1. Back Panel Connectors/IO Ports
   

Diagram of computer motherboard with labeled components and connectors, showing internal layout and terminal connections.

Back Panel I/O Port Locations and Definitions

Back Panel Connectors

Keyboard (Purple)1.

PS/2 Mouse (Green)2.

VGA (Blue) 3.

COM Port 1 (Turquoise)4.

USB 05.

USB16.

IPMI_Dedicated LAN (X8DAH+-F only)7.

USB 28.

USB 39.

USB 410.

USB 511.

LAN 212.

LAN 113.

Side_surround14.

15. Back_surround

16. CEN/LFE

17. Microphone_In

18. Front

19. Line_In

ATX PS/2 Keyboard and PS/2 Mouse Ports

The ATX PS/2 keyboard and PS/2 mouse are located next to the Back Panel COM Port1 and VGA port on the motherboard. See the table at right for pin definitions.

PS/2 Keyboard/Mouse Pin Definitions
PS2 Keyboard PS2 Mouse
Pin#	Definition	Pin#	Definition
1 KB	Data 1 Mouse Data
2 No	Connection 2 No Connection
3 Ground	3 Ground
4 Mouse	+5V)	4 Mouse	+5V)
5 KB	Clock 5 Mouse Clock
6 No	Connection 6 No Connection
VCC: with 1.5A PTC (current limit)

1. Keyboard (Purple) 2. Mouse (Green) ① ② ①

Serial Ports

Two COM connections (COM1 & COM2) are located on the motherboard. COM1 is located on the Backplane IO panel. COM2 is located next to PCI-E Slot 1 to provide additional serial connection support. See the table on the right for pin definitions.

Serial Ports-COM1/COM2Pin Definitions
Pin #	Definition	Pin #	Definition
1 DCD 6 DSR
2 RXD 7 RTS
3 TXD 8 CTS
4 DTR 9 RI
5 Ground 10 N/A

Video Connector

A Video (VGA) connector is located above COM Port1 on the IO backplane. This connector is used to provide video display. Refer to the board layout below for the location.

1. COM 1 2. COM 2 3. VGA

Universal Serial Bus (USB)

Six Universal Serial Bus ports (USB 0/1, 2\~5) are located on the I/O back panel. Additionally, four USB connections (USB 6/7, 8, 9) are on the motherboard to provide front chassis access. (Cables are not included). See the tables on the right for pin definitions.

Back Panel USB(USB 0/1, 2~5)
Pin#	Definitions
1 +5V
2 PO-
3 PO+
4 Ground
5 N/A

Front Panel USBPin Definitions (USB6/7, 8/9)
USB 6/8Pin # Definition	USB 7/9Pin # Definition
1 +5V 1 +5V
2 PO- 2 PO-
3 PO+ 3 PO+
4 Ground 4 Ground
5 Key 5 No connection

1. Backpanel USB 0
2. Backpanel USB 1
3. Backpanel USB 2
4. Backpanel USB 3
5. Backpanel USB 4
6. Backpanel USB 5
7. (JUSB4) Front Panel USB 6/7
8. (JUSB2) Front Panel USB 8
9. (JUSB5) Front Panel USB 9

Diagram of computer motherboard with labeled components and connection points for system architecture

Ethernet Ports

Two Ethernet ports (LAN 1/LAN2) are located at on the IO backplane. In addition, a dedicated LAN is also located on the X8DAH+-F to provide KVM support for IPMI 2.0. All these ports accept RJ45 type cables. (Note: Please refer to the LED Indicator Section for LAN LED information.)

LAN PortsPin Definition
Pin#	Def nition
1	P2V5SB 10 SGND
2	TD0+ 11 Act LED
3	TD0- 12 P3V3SB
4	TD1+ 13 Link 100 LED(Yellow, +3V3SB)
5	TD1- 14 Link 1000 LED(Yellow, +3V3SB)
6	TD2+ 15 Ground
7	TD2- 16 Ground
8	TD3+ 17 Ground
9	TD3- 88 Ground

(NC: No Connection)

1. LAN2 2. LAN1 3. IPMI_LAN (X8DAH+-F only) ① ② ③

(Back\_Panel) High Definition Audio (HD Audio)

This motherboard features a 7.1+2 Channel High Definition Audio (HDA) codec that provides 10 DAC channels. The HD Audio connections simultaneously supports multiple-streaming 7.1 sound playback with 2 channels of independent stereo output through the front panel stereo out for front L&R, rear L&R, center and subwoofer speakers. Use the Advanced software included in the CD-ROM with your motherboard to enable this function.

(BP) HD Audio
Conn#	Signal
1	Side_Surround
2	Back_Surround
3	CEN/LFE
4	Microphone_In
5	Front
6	Line_In

HD Audio ③ ② ① ⑥ ⑤ ④

CD &10-pin Audio Headers

A 4-pin CD header (CD1) and a 10-pin Audio header are also located on the motherboard. These headers allow you to use the onboard sound for audio CD play-back. Connect an audio cable from your CD drive to the CD header that fits your cable's connector. See the tables at right for pin definitions for these headers.

CD1 PinDefi nition
Pin#	Defi nition
1 Left
2 Ground
3 Ground
4 Right

10-in AudioPin Dea nitions
Pin#	Signal
1	Microphone_Left
2	Audio_Ground
3	Microphone_Right
4	Audio_Detect
5	Line_2_Right
6	Ground
7	Jack_Detect
8	Key
9	Line_2_Left
10	Ground

Diagram of a computer motherboard layout with numbered components and labeled connectors

1. HD Audio (See the graphics above for details)
2. CD1
3. 10-pin Audio

①

2. Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally located on a control panel at the front of the chassis. These connectors are designed specifically for use with Supermicro server chassis. See the figure below for the descriptions of the various control panel buttons and LED indicators. Refer to the following section for descriptions and pin definitions.

JF1 Header Pins

Diagram of a computer motherboard layout with labeled components and an arrow indicating a specific area.

20 19 Ground X Power LED HDD LED NIC1 LED NIC2 LED OH/Fan Fail LED PWR Fail LED Ground Ground NMI X Vcc Vcc Vcc Vcc Vcc Vcc Reset Reset Button PWR Power Button

3. Front Control Panel Pin Definitions

NMI Button

The non-maskable interrupt button header is located on pins 19 and 20 of JF1. Refer to the table on the right for pin definitions.

NMI ButtonPin Defi nitions (JF1)
Pin#	Defi nition
19 Control
20 Ground

Power LED

The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table on the right for pin definitions.

Power LEDPin Defi nitions (JF1)
Pin#	Defi nition
15 +5V
16 Ground

A. NMI B. PWR LED 20 19 A Ground X Power LED HDD LED NIC1 LED NIC2 LED OH/Fan Fail LED PWR Fail LED Ground Ground 2 1 NMI X Vcc Vcc Vcc Vcc Vcc Reset Reset Button PWR Power Button

HDD LED

The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable here to indicate HDD activities. See the table on the right for pin definitions.

HDD LEDPin Defi nitions (JF1)
Pin#	Defi nition
13 +5V
14 HD	Active

NIC1/NIC2 LED Indicators

The NIC (Network Interface Controller) LED connection for GLAN port 1 is located on pins 11 and 12 of JF1, and the LED connection for GLAN Port 2 is on Pins 9 and 10. Attach the NIC LED cables to display network activity. Refer to the table on the right for pin definitions.

GLAN1/2 LEDPin Defi nitions (JF1)
Pin#	Defi nition
9/11 Voc
10/12 Ground

A. HDD LED B. NIC1 LED C. NIC2 LED Ground X Power LED A HDD LED B NIC1 LED C NIC2 LED OH/Fan Fail LED PWR Fail LED Ground Ground 2 1 20 19 NMI X Vcc Vcc Vcc Vcc Vcc Vcc Reset Reset Button PWR Power Button

Overheat (OH)/Fan Fail LED

Connect an LED cable to the Front UID and OH/Fan Fail connections on pins 7 and 8 of JF1 to provide advanced warnings for chassis overheat/fan failure. Refer to the table on the right for pin definitions.

OH/Fan Fail LEDPin Den nitions (JF1)
Pin#	Defi nition
7 Voc
8 OH/Fan Fail LED

OH/Fan Fail Indicator Status
State	Defi nition
Off Normal
On Overheat
Flashing	Fan Fail

Power Fail LED

The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table on the right for pin definitions.

PWR Fail LEDPin Definitions (JF1)
Pin#	Definition
5 Vcc
6 Ground

A. OH/Fan Fail & UID LEDs

B. PWR Supply Fail

20 19 Ground X Power LED HDD LED NIC1 LED NIC2 LED A OH/Fan Fail LED B PWR Fail LED Ground Ground NMI X Vcc Vcc Vcc Vcc Vcc Reset Reset Button PWR Power Button 2 1

Reset Button

The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset switch on the computer case. Refer to the table on the right for pin definitions.

Reset ButtonPin Defi nitions (JF1)
Pin#	Defi nition
3 Reset
4 Ground

Power Button

The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both pins will power on/off the system. This button can also be configured to function as a suspend button (with a setting in the BIOS - see Chapter 4). To turn off the power when set to suspend mode, press the button for at least 4 seconds. Refer to the table on the right for pin definitions.

Power ButtonPin Defi nitions (JF1)
Pin#	Defi nition
1 Signal
2 +3V	Standby

A. Reset Button B. PWR Button 20 19 Ground X Power LED HDD LED NIC1 LED NIC2 LED OH/Fan Fail LED PWR Fail LED Ground Ground NMI X Vcc Vcc Vcc Vcc Vcc Vcc Reset Reset Button A PWR Power Button B 2 1

2-6 Connecting Cables

Power Connectors

A24-pin main power supply connector(JPW1) and two 8-pin CPU PWR connectors (JPW2/JPW3) on the motherboard. These power connectors meet the SSI EPS 12V specification. In addition to the 24-pin ATX power connector, the 12V 8-pin CPU PWR connectors at JPW2/JPW3 must also be connected to your power supply. See the table on the right for pin definitions.

Warning: To prevent damage to the power supply or motherboard, please use a power supply that contains a 24-pin and two 8-pin power connectors. Be sure to connect these connectors to the 24-pin (JPW1) and the two 8-pin (JPW2,JPW3) power connectors on the motherboard. Failure in doing so will void the manufacturer warranty on your power supply and motherboard.

ATX Power 24-pin Connector Pin Definitions
Pin#	Definition	Pin # Definition
13 +3.3V	1 +3.3V
14 -12V	2 +3.3V
15 COM	3 COM
16 PS_ON	4 +5V
17 COM	5 COM
18 COM	6 +5V
19 COM	7 COM
20 Res (NC)	8 PWR_OK
21 +5V	9 5VSB
22 +5V	10 +12V
23 +5V	11 +12V
24 COM	12 +3.3V

12V 8-pin PWR Connector Pin Dea nitions
Pins	Dea nition
1 through 4	Ground
5 through 8	+12V

(Required)

A B C PTEKINCA PTEKINCA PTEKINCA PTEKINCA PTEKINCA PTEKINCA PTEKINCA PTEKINCA PTEKINCA PTEKINCA PTEKINCA PTEKINCA CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7 CPU8 CPU9 CPU10 CPU11 CPU12 CPU13 CPU14 CPU15 CPU16 CPU17 CPU18 CPU19 CPU20 CPU21 CPU22 CPU23 CPU24 CPU25 CPU26 CPU27 CPU28 CPU29 CPU30 CPU31 CPU32 CPU33 CPU34 CPU35 CPU36 CPU37 CPU38 CPU39 CPU40 CPU41 CPU42 CPU43 CPU44 CPU45 CPU46 CPU47 CPU48 CPU49 CPU50 CPU51 CPU52 CPU53 CPU54 CPU55 CPU56 CPU57 CPU58 CPU59 CPU60 CPU61 CPU62 CPU63 CPU64 CPU65 CPU66 CPU67 CPU68 CPU69 CPU70 CPU71 CPU72 CPU73 CPU74 CPU75 CPU76 CPU77 CPU78 CPU79 CPU80 CPU81 CPU82 CPU83 CPU84 CPU85 CPU86 CPU87 CPU88 CPU89 CPU90 CPU91 CPU92 CPU93 CPU94 CPU95 CPU96 CPU97 CPU98 CPU99 CPU100

A. 24-pin ATX PWR (Req'd) B/C.8-pin Processor PWR (Req'd)

Fan Headers

This motherboard has six chassis/system fan headers (Fan 1 to Fan6) and two CPU fans (CPU1 Fan/CPU2 Fan) on the motherboard. In addition, I-Fan 1 and I-Fan 2 are available on a R 2.0 or newer version motherboard for IOH-36D cooling. The 4-pin fans headers are backward compatible with the traditional 3-pin fans. However, fan speed control is available for 4-pin fans only via Hardware Monitoring in the Advanced Setting in the BIOS. See the table on the right for pin definitions.

Fan HeaderPin Defnitions
Pin#	Defnition
1 Ground
2 +12V
3 Tachometer
4 PWR Modulation

Chassis Intrusion

A Chassis Intrusion header is located at JL1 on the motherboard. Attach an appropriate cable from the chassis to inform you of a chassis intrusion when the chassis is opened.

Chassis Intrusion Pin Definitions (JL1)
Pin#	Definition
1	Intrusion Input
2	Ground

F E P2.0 M6V3A P2.0 M6V3B P2.0 M6V3C P2.0 M6V3D P2.0 M6V3E P2.0 M6V3F P2.0 M6V3G P2.0 M6V3H P2.0 M6V3I P2.0 M6V3J P2.0 M6V3K P2.0 M6V3L P2.0 M6V3M CPU2 P1.1 P1.2 P1.3 P1.1 P1.4 P1.5 P1.1 P1.6 P1.7 P1.1 P1.8 P1.9 P1.1 P1.10 P1.11 P1.1 P1.11 P1.12 P1.1 P1.12 P1.13 P1.1 P1.13 P1.14 P1.1 P1.14 P1.15 P1.1 P1.15 P1.16 P1.1 P1.16 P1.17 P1.1 P1.17 P1.18 P1.1 P1.18 P1.19 P1.1 P1.19 P1.20 P1.1 P1.20 P1.21 P1.1 P1.21 P1.22 P1.1 P1.22 P1.23 P1.1 P1.23 P1.24 P1.1 P1.24 P1.25 P1.1 P1.25 P1.26 P1.1 P1.26 P1.27 P1.1 P1.27 P1.28 P1.1 P1.28 P1.29 P1.1 P1.29 P1.30 P1.1 P1.30 P1.31 P1.1 P1.31 P1.32 P1.1 P1.32 P1.33 P1.1 P1.33 P1.34 P1.1 P1.34 P1.35 P1.1 P1.35 P1.36 P1.1 P1.36 P1.37 P1.1 P1.37 P1.38 P1.1 P1.38 P1.39 P1.1 P1.39 P1.40 P1.1 P1.40 P1.41 P1.1 P1.41 P1.42 P1.1 P1.42 P1.43 P1.1 P1.43 P1.44 P1.1 P1.44 P1.45 P1.1 P1.45 P1.46 P1.1 P1.46 P1.47 P1.1 P1.47 P1.48 P1.1 P1.48 P1.49 P1.1 P1.49 P1.50 P 5/6/7 CPU 5/6/7 PCI 5/6/7 PCI 5/6/7 PCI 5/6/7 PCI 5/6/7 PCI 5/6/7 PCI 5/6/7 PCI 5/6/7 PCI 5/6/7 PCI 5/6/7 PCI 5/6/7 PCI 5/6/7 PCI 5/6/7 PCI 5/6/7 PCI 5/6/7 PCI 6/6/7 PCI 6/6/7 PCI 6/6/7 PCI 6/6/7 PCI 6/6/7 PCI 6/6/7 PCI 6/6/7 PCI 6/6/7 PCI 6/6/7 PCI 6/6/7 PCI 6/6/7 PCI 6/6/7 PCI 6/6/7 PCI 6/6/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/8 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI 6/8/7 PCI

A. Fan 1

B. Fan 2

C. Fan 3

D. Fan 4

E. Fan 5

F. Fan 6

G. CPU1 Fan

H. CPU2 Fan

I. Chassis Intrusion

Internal Speaker

The Internal Speaker, located at SP1, can be used to provide audible indications for various beep codes. See the table on the right for pin definitions. Refer to the layout below for the locations of the Internal Buzzer (SP1).

Internal Buzzer (SP1)Pin Definition
Pin#	Definitions
Pin 1 Pos. (+) Beep	In
Pin 2 Neg. (-) Alarm	Speaker

DEEP IN SP1 1 POS 2 ALARM_SPK NEG

Power LED/Speaker

On the JD1 header, pins 1-3 are used for power LED indication, and pins 4-7 are for the speaker. See the tables on the right for pin definitions. Please note that the speaker connector pins (4-7) are for use with an external speaker. If you wish to use the onboard speaker, you should close pins 6-7 with a jumper.

PWR LED ConnectorPin Denitions
Pin Setting	Denition
Pin 1 Anode (+)
Pin2	Cathode (-)
Pin3 NA

Speaker ConnectorPin Defi nitions
Pin Setting	Defi nition
Pins 4-7	External Speaker
Pins 6-7	Internal Speaker

CPU2 X8DAH: Rev 2.0 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94 A95 A96 A97 A98 A99 A100

A. Internal Speaker (Buzzer)
B. PWR LED/Speaker

IEEE 1394a Connection

CNF1 and CNF2 provide the IEEE 1394a connections on the motherboard. See the tables on the right for pin definitions.

CNF1Pin Defn nitions
Pin#	Defin.	Pin#	Defin
1	PTPA0+ 2 PTPA0-
3	GND 4 GND
5	PTPB0+ 6 PTPB0-
7	PWR 1394a 8 PWR 1394a
		10 ZX
CNF2Pin Defn nitions
Pin#	Defin.	Pin#	Defin
1	PTPA1+ 2	PTPA1-
3	GND 4	GND
5	PTPB1+ 6	PTPB1-
7	PWR 1394a 8	PWR 1394a
		10 ZY

Overheat LED/Fan Fail (JOH1)

The JOH1 header is used to co an LED indicator to provide warnings of chassis overheating or fan failure. This LED will blink when a fan failure occurs. Refer to the table on right for pin definitions.

In e ctOverheat LEDPin Definitions
Pin#	Definition
1	5vDC
2	OH Active

OH/Fan Fail LED Pin Definitions
State	Message
Solid	Overheat
Blinking	Fan Fail

PZDINYSA PZDINYSD PZDINYSC PZDINYSA PZDINYSD PZDINYSC PZDINYSA PZDINYSD PZDINYSC PZDINYSA PZDINYSD PZDINYSC CPU2 PZDINYSA PZDINYSD PZDINYSC PZDINYSA PZDINYSD PZDINYSC PZDINYSA PZDINYSD PZDINYSC PZDINYSA PZDINYSD PZDINYSC PZDINYSA PZDINYSD PZDINYSC PZDINYSA PZDINYSD ALWAYS POSTULATE 2.0kV TIRIOT SUPER-X8DAH+ Rev 2.0 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC- JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-19 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC- JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-20 JAC-30 JAC-30 JAC-30 JAC-30 JAC-30 JAC-30 JAC-30 JAC-30 JAC-30 JAC-30 JAC-30 JAC-30 JAC-30 JAC-30 JAC-30 JAC-30 JAC-30 JAGA- AB- C

A. CNF1 (1394a-1)
B. CNF2 (1394a-2)
C. Overheat LED (JOH1)

System Management Bus

A System Management Bus header is located at SUBUS1 on the motherboard. Connect the appropriate cable here to use the SMB connection on your system.

SMB HeaderPin Defi nitions
Pin#	Defi nition
1 Data
2 Ground
3 Clock
4 No Connection

Power SMB (I²C) Connector

Power System Management Bus ( ^12 C) Connector (JPI ^2 C) monitors power supply, fan and system temperatures. See the table on the right for pin definitions.

PWR SMBPin Defi nitions
Pin#	Defi nition
1 Clock
2 Data
3 PWR Fail
4 Ground
5 +3.3V

P2E M25A P2E M25B P2E M25C P2E M25D P2E M25E P2E M25F P2E M25G P2E M25H P2E M25I CPU2 +1.0V/360V +1.0V/360A +1.0V/360A +1.0V/360A +1.0V/360A +1.0V/360A +1.0V/360A +1.0V/360A ALAW'S POPULATE 2 MIN PRINT SUPER X8DAH: Rev 2.0 SPT ICN-350 ICN-360 ICN-100 (pack-in copy) ICN-100 (pack-in copy) ICN-100 (pack-in copy) ICN-100 (pack-in copy) ICN-100 (pack-in copy) ICN-100 (pack-in copy) ICN-100 (pack-in copy) ICN-100 (pack-in copy) ICN-100 (pack-in copy) ICN-100 (pack-in copy) IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU IFU ICN-350 ICN-360 ICN-100 (pack-in copy) ICN-100 (pack-in copy) ICN-100 (pack-in copy) ICN-100 (pack-in copy) ICN-100 (pack-in copy) ICN-100 (pack-in copy) ICN-100 (pack-in copy) ICN-100 (PACK-IN) ICN-100 (PACK-IN) ICN-100 (PACK-IN) ICN-100 (PACK-IN) ICN-100 (PACK-IN) ICN-100 (PACK-IN) ICN-100 (PACK-IN) ICN-100 (PACK-IN) ICN-100 (PACK-IN) ICN-100 (PACK-IN) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-II) ICN-100 (PACK-II) ICN-100 (PACK-II) ICN-100 (PACK-II) ICN-100 (PACK-II) ICN-100 (PACK-II) ICN-100 (PACK-II) ICN-100 (PACK-II) ICN-100 (PACK-II) ICN-100 (PACK-II) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-V) ICN-100 (PACK-V) ICN-100 (PACK-V) ICN-100 (PACK-V) ICN-100 (PACK-V) ICN-100 (PACK-V) ICN-100 (PACK-V) ICN-100 (PACK-V) ICN-100 (PACK-V) ICN-100 (PACK-V) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-100 (PACK-I) ICN-10O ICN-1O ICN-1O ICN-1O ICN-1O ICN-1O ICN-1O ICN-1O ICN-1O ICN-1O ICN-1O ICN-1O ICN-1O ICN-1O ICN-1O ICN-1O ICN-1O ICN-1O ICIN 354 ICIN 354 ICIN 354 ICIN 354 ICIN 354 ICIN 354 ICIN 354 ICIN 354 ICIN 354 ICIN 354 ICIN 354 ICIN 354 ICIN 354 ICIN 354 ICIN 354 IPX 79777777777777777777777777777777777777777777777777777777777777777777777777777777

A. SMB
B. PWR SMB

2-7 Jumper Settings

Explanation of Jumpers

To modify the operation of the motherboard, jumpers can be used to choose between optional settings. Jumpers create shorts between two pins to change the function of the connector. Pin 1 is identified with a square solder pad on the printed circuit board. See the motherboard layout pages for jumper locations.

Note: On two pin jumpers, "Closed" means the jumper is on and "Open" means the jumper is off the pins.

GLAN Enable/Disable

Use JPL1 to enable or disable GLAN Port1/GLAN Port2 on the motherboard. See the table on the right for jumper settings. The default setting is Enabled.

GLAN EnableJumper Settings
Pin#	Definition
1-2	Enabled (default)
2-3	Disabled

PC 3M0124 PC 3M0125 PC 3M0126 PC 3M0127 PC 3M0128 PC 3M0129 PC 3M0130 PC 3M0131 PC 3M0132 PC 3M0133 PC 3M0134 PC 3M0135 PC 3M0136 PC 3M0137 PC 3M0138 PC 3M0139 PC 3M0140 CPU2 P1 CINJ5A P1 CINJ5B P1 CINJ5C P1 CINJ5D P1 CINJ5E P1 CINJ5F P1 CINJ5G P1 CINJ5H P1 CINJ5I P1 CINJ5J P1 CINJ5K P1 CINJ5L P1 CINJ5M P1 CINJ5N P1 CINJ5O P1 CINJ5P P1 CINJ5Q P1 CINJ5R P1 CINJ5S P1 CINJ5T P1 CINJ5U P1 CINJ5V P1 CINJ5W P1 CINJ5X P1 CINJ5Y P1 CINJ5Z P1 CINJ5A P1 CINJ5B P1 CINJ5C P1 CINJ5D P1 CINJ5E P1 CINJ5F P1 CINJ5G P1 CINJ5H P1 CINJ5I P1 CINJ5J P1 CINJ5K P1 CINJ5L P1C PCH 2.1 V 2.2 V 2.3 V 2.4 V 2.5 V 2.6 V 2.7 V 2.8 V 2.9 V 3.0 V 3.1 V 3.2 V 3.3 V 3.4 V 3.5 V 3.6 V 3.7 V 3.8 V 3.9 V 4.0 V 4.1 V 4.2 V 4.3 V 4.4 V 4.5 V 4.6 V 4.7 V 4.8 V 4.9 V 5.0 V 5.1 V 5.2 V 5.3 V 5.4 V 5.5 V 5.6 V 5.7 V 5.8 V 5.9 V 6.0 V 6.1 V 6.2 V 6.3 V 6.4 V 6.5 V 6.6 V 6.7 V 6.8 V 6.9 V 7.0 V 7.1 V 7.2 V 7.3 V 7.4 V 7.5 V 7.6 V 7.7 V 7.8 V 7.9 V 8.0 V 8.1 V 8.2 V 8.3 V 8.4 V 8.5 V 8.6 V 8.7 V 8.8 V 8.9 V 9.0 V 9.1 V 9.2 V 9.3 V 9.4 V 9.5 V 9.6 V 9.7 V 9.8 V 9.9 V 10.0 V 10.1 V 10.2 V 10.3 V 10.4 V 10.5 V 10.6 V 10.7 V 10.8 V 10.9 V 11.0 V 11.1 V 11.2 V 11.3 V 11.4 V 11.5 V 11.6 V 11.7 V 11.8 V 11.9 V 12.0 V 12.1 V 12.2 V 12.3 V 12.4 V 12.5 V 12.6 V 12.7 V 12.8 V 12.9 V 13.0 V 13.1 V 13.2 V 13.3 V 13.4 V 13.5 V 13.6 V 13.7 V 13.8 V 13.9 V 14.0 V

A. GLAN Port 1/2 Enable

CMOS Clear

JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact pads to prevent the accidental clearing of CMOS. To clear CMOS, use a metal object such as a small screwdriver to touch both pads at the same time to short the connection. Always remove the AC power cord from the system before clearing CMOS.

Note: For an ATX power supply, you must completely shut down the system, remove the AC power cord and then short JBT1 to clear CMOS.

Watch Dog Enable/Disable

Watch Dog (JWD) is a system monitor that can reboot the system when a software application hangs. Close Pins 1-2 to reset the system if an application hangs. Close Pins 2-3 to generate a non-maskable interrupt signal for the application that hangs. See the table on the right for jumper settings. Watch Dog must also be enabled in the BIOS.

Watch DogJumper Settings (JWD)
Jumper Setting	Definition
Pins 1-2 Reset	(default)
Pins 2-3 NMI
Open Disabled

P2E M2V3A P2E M2V3B P2E M2V3C P2E M2V3D P2E M2V3E P2E M2V3F P2E M2V3G P2E M2V3H P2E M2V3I CPU2 SOP P04-2.5 V 1.5 SOP P04-2.5 V 1.5 LAB CHL SOP P04-2.5 V 1.5 SOP P04-2.5 V 1.5 SOP P04-2.5 V 1.5 SOP P04-2.5 V 1.5 SOP P04-2.5 V 1.5 SOP P04-2.5 V 1.5 SOP P04-2.5 V 1.5 SOP P04-2.6 V 1.5 SOP P04-2.6 V 1.5 SOP P04-2.6 V 1.5 SOP P04-2.6 V 1.5 SOP P04-2.6 V 1.5 SOP P04-2.6 V 1.5 SOP P04-2.6 V 1.5 SOP P13-33V SOP P13-33V SOP P13-33V SOP P13-33V SOP P13-33V SOP P13-33V SOP P13-33V SOP P13-33V SOP P13-33V SOP P13-33V SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33N SOP P13-33N SOP P13-33N SOP P13-33N SOP P13-33N SOP P13-33N SOP P13-33N SOP P13-33N SOP P13-33N SOP P13-33N SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33M SOP P13-33C SOP P13-33C SOP P13-33C SOP P13-33C SOP P13-33C SOP P13-33C SOP P13-33C SOP P13-33C SOP P13-33C SOP P13-37V SOP P13-69V SOP P13-69V SOP P13-69V SOP P13-69V SOP P13-69V SOP P14-69V SOP P14-69V SOP P14-69V SOP P14-69V SOP P14-69V SOP P14-69V SOP P14-69V SOP P14-69V SOP P14-69V SOP P14-69V SOP P15-69V SOP P15-69V SOP P15-69V SOP P15-69V SOP P15-69V SOP P15-69V SOP P15-69V SOP P15-69V SOP P15-69V SOP P15-69V SUPPER X8DAH1, Rev 2.0

A. Clear CMOS

B. Watch Dog Enable

I²C Bus to PCI-Exp. Slots

Jumpers JI²C1 and JI²C2 allow you to connect the System Management Bus (I℃) to PCI and PCI-Express slots. These two jumpers are to be set at the same time. The default setting is Open to disable the connections. See the table on the right for jumper settings.

I2C for PCI/PCI-E slotsJumper Settings
Jumper Setting	Defi nition
Closed Enabled
Open Disabled (Default)

Compact Flash Enable

A Compact Flash Jumper is located at JPIDE1. To use a Compact Flash Card on this motherboard, you will need Pins 1\~2 on this jumper to enable it. For the Compact Flash Card to work properly, please connect the Compact Flash Card power cable to JWF1 first. Refer to the board layout below for the location.

Compact Flash Card Enable Jumper Settings
Jumper	Definition
Open Disabled
Closed Enabled

PG 0.5M23A PG 0.5M23B PG 0.5M23C PG 0.5M23D PG 0.5M23E PG 0.5M23F PG 0.5M23G PG 0.5M23H PG 0.5M23I PG 0.5M23J PG 0.5M23K PG 0.5M23L PG 0.5M23M PG 0.5M23N PG 0.5M23O PG 0.5M23P CPU2 P1: Littered P1: Littered P1: Littered P1: Littered P1: Littered P1: Littered P1: Littered P1: Littered P1: Littered P1: Littered P1: Littered P1: Littered P1: Littered P1: Littered P1: Littered SUPER X8DAH1 P## 2.0 JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTINO JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTIN JOUTINA

A. JI^2C1
B. Jl²C2
C. Compact Flash Enable

VGA Enable

Jumper JPG1 allows you to enable video connections on the motherboard. See the table on the right for jumper settings.

VGA EnableJumper Settings
Jumper Setting	Definition
1~2 Enabled (Default)
2~3 Disabled

1394a-1/1394a-2 Enable

Use Jumper JPI1 to enable the 1394a connections at CNF1(1394a-1)/CNF2 (1394a-2) on the motherboard. See the table on the right for jumper settings.

1394a EnableJumper Settings
Jumper Setting	Definition
1~2 Enabled (Default)
2~3 Disabled

P2E M2V3A P2E M2V3B P2E M2V3C P2E M2V3D P2E M2V3E P2E M2V3F P2E M2V3G P2E M2V3H P2E M2V3I CPU2 +1.0V/1.0V +1.0V/1.0V +1.0V/1.0V +1.0V/1.0V +1.0V/1.0V +1.0V/1.0V +1.0V/1.0V +1.0V/1.0V +1.0V/1.0V +1.0V/1.0V ALWAYS POSTILLATED MIN FIRST SUPER●X8DAH1 Rev 2.0 A: 50% CTR COM PO4-2.7 V 5 LAD 6 V 5 DAC 6 V 5 B: 50% CTR COM PO4-2.7 V 5 SPLC 6 V 5 SPLC 6 V 5 SPLC 6 V 5 SPLC 6 V 5 SPLC 6 V 5 SPLC 6 V 5 SPLC 6 V 5 SPLC 6 V 5 SPLC 6 V 5 SPLC 6 V 5 SPLC 6 V 5 SPLC 6V 5 SPLC 6V 5 SPLC 6V 5 SPLC 6V 5 SPLC 6V 5 SPLC 6V 5 SPLC 6V 5 SPLC 6V 5 SPLC 6V 5 SPLC 6V 5 SPLC 6V 5 SPLC 6V

A. VGA Enable

B. 1394a 1/2 Enable

2-8 Onboard LED Indicators

GLAN LEDs

Two LAN ports (LAN 1/LAN 2) are located on the IO Backplane of the motherboard. Each Ethernet LAN port has two LEDs. The green LED indicates activity, while the other Link LED may be green, amber or off to indicate the speed of the connections. See the tables at right for more information.

IPMI Dedicated LAN LEDs (X8DAH+-F)

In addition to LAN 1/LAN 2, an IPMI Dedicated LAN is also located on the IO Backplane of the X8DAH+-F. The amber LED on the right indicates activity, while the green LED on the left indicates the speed of the connection. See the tables at right for more information.

Link LED Activity LED

Rear View (when facing the rear side of the chassis)

LAN 1/LAN 2 Activity LED (Right)LED State
Color	Status	Definition
Green Flashing Active

LAN 1/LAN 2 Link LED (Left)LED State
LED Color	Definition
Off No Connection or 10 Mbps
Green 100 Mbps
Amber 1 Gbps

IPMI LAN (X8DAH+-F only) Link LED Activity LED

IPMI LAN Link LED (Left) & Activity LED (Right)
Color	Status	Definition
Link (Left) Green: Solid 100 Mbps
Activity (Right) Amber: Blinking Active

PC 200015 PC 200020 PC 200025 PC 200030 PC 200035 PC 200040 PC 200045 PC 200050 PC 200055 PC 200060 PC 200065 PC 200070 PC 200075 PC 200080 PC 200085 PC 200090 PC 200095 PC 200100 PC 200105 PC 200110 PC 200115 PC 200120 PC 200125 PC 200130 PC 200135 PC 200140 PC 200145 PC 200150 PC 200155 PC 200160 PC 200165 PC 200170 PC 200175 PC 200180 PC 200185 PC 200190 PC 200195 PC 200200 PC 200205 PC 200210 PC 200215 PC 200220 PC 200225 PC 200230 PC 200235 PC 200240 PC 200245 PC 200250 PC 200255 PC 200260 PC 200265 PC 200270 PC 200275 PC 200280 PC 200285 PC 200290 PC 200295 PC 200300 PC 200315 PC 200320 PC 200325 PC 200330 PC 200335 PC 200340 PC 200345 PC 200350 PC 200355 PC 200360 PC 200365 PC 200370 PC 200375 PC 200380 PC 200385 PC 200390 PC 200395 PC 200400 PC 218X-1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1.1. SUPPER X8DAH+ Rev. 2.9

A. LAN1/2 LEDs

B. Dedicated LAN LEDs

(X8DAH+-F)

Onboard Power LED

An Onboard Power LED is located at DP4 on the motherboard. When this LED is lit, the system is on. Be sure to turn off the system and unplug the power cord before removing or installing components. See the tables at right for more information.

Onboard PWR LED (DP4) Settings
LED Color	De# nition
Off System	Off (PWR cable not connected)
On System	Power On

BMC Heartbeat LED (X8DAH+-F)

A BMC Heartbeat LED is located at DP5 on the motherboard. When DP5 is blinking, BMC functions normally. See the tables at right for more information.

BMC Heartbeat LED Indicator(DP5) Settings
LED Color	Definition
Blinking BMC: Normal

P2E M0V3A P2E M0V3B P2E M0V3C P2E M0V3D P2E M0V3E P2E M0V3F P2E M0V3G P2E M0V3H P2E M0V3I CPU2 +1.0V/76MΩ +1.0V/76MΩ +1.0V/76MΩ +1.0V/76MΩ +1.0V/76MΩ +1.0V/76MΩ +1.0V/76MΩ +1.0V/76MΩ ALWAYS POPULATED MIN FIRST SUPER-X8DAH1 Rev 2.0 CPU SOS: P04-2.0 V 1.5 SOS: P04-2.0 V 1.5 SOS: P04-2.0 V 1.5 SOS: P04-2.0 V 1.5 SOS: P04-2.0 V 1.5 SOS: P04-2.0 V 1.5 SOS: P04-2.0 V 1.5 SOS: SOS: P04-2.0 V 1.5 SOS: P04-2.0 V 1.5 SOS: P04-2.0 V 1.5 SOS: P04-2.0 V 1.5 SOS: P04-2.0 V 1.5 SOS: P04-2.0 V 1.5 SOS: SOD SOS: SOD SOS: SOD SOS: SOD SOS: SOD SOS: SOD SOS: SOD SOS: SOD SOS: SOD SOS: SOD SOS: SOD SOS: SOD SOS: SOD SOS: SOD SOS: SOD SOS: SOD SOS: SOD SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: SOS: TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN. TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TSN . TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TEN. TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TAI TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TCN. TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK TGK

A. Onboard PWR LED
B. BMC Heartbeat LED

2-9 Floppy Drive, Serial ATA and SAS Connections

Note the following when connecting the floppy and hard disk drive cables:

• The fl oppy disk drive cable has seven twisted wires.
• A red mark on a wire typically designates the location of pin 1.
• A single floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives. The connector with twisted wires always connects to drive A, and the connector that does not have twisted wires always connects to drive B.

Floppy Connector

The fl oppy connector is located next to the Super I/O chip on the motherboard. See the table on the right for pin definitions.

Floppy Drive ConnectorPin Denitions
Pin#	Definition	Pin # Definition
1 Ground 2 FDHDIN
3 Ground 4 Reserved
5 Key 6 FDEDIN
7 Ground 8 Index
9 Ground 10 Motor Enable
11 Ground 12 Drive Select B
13 Ground 14 Drive Select B
15 Ground 16 Motor Enable
17 Ground 18 DIR
19 Ground 20 STEP
21 Ground 22 Write Data
23 Ground 24 Write Gate
25 Ground 26 Track 00
27 Ground 28 Write Protect
29 Ground 30 Read Data
31 Ground 32 Side 1 Select
33 Ground 34 Diskette

graph TD
    A["CPU"] --> B["Memory"]
    B --> C["Data Flow"]
    C --> D["IO"]
    D --> E["Storage"]
    E --> F["Data Bus"]
    F --> G["Control Unit"]
    G --> H["Data Link"]
    H --> I["Data Output"]
    I --> J["Data Review"]
    J --> K["Data Support"]
    K --> L["Data Security"]
    L --> M["Data Management"]
    M --> N["Data Control"]
    N --> O["Data Output"]
    O --> P["Data Review"]
    P --> Q["Data Support"]
    Q --> R["Data Security"]
    R --> S["Data Management"]
    S --> T["Data Control"]
    T --> U["Data Output"]

A. Floppy

IDE Connector

AN IDE Connector is located on the motherboard. This connector can be used for a Compact Flash card. To use a Compact Flash card on this connector, you will need to enable the jumper located at JPIDE1. See the table on the right for pin definitions.

IDE Drive ConnectorPin Definitions
Pin#	Definition	Pin # Definition
1 Reset IDE 2 Ground
3 Host Data 7 4 Host Data 8
5 Host Data 6 6 Host Data 9
7 Host Data 5 8 Host Data 10
9 Host Data 4 10 Host Data 11
11 Host Data 3 12 Host Data 12
13 Host Data 2 14 Host Data 13
15 Host Data 1 16 Host Data 14
17 Host Data 0 18 Host Data 15
19 Ground 20 Key
21 DRQ3 22 Ground
23 I/O Write 24 Ground
25 I/O Read 26 Ground
27 IOCHRDY 28 BALE
29 DACK3 30 Ground
31 IRQ14 32 IOCS16
33 Addr1 34 Ground
35 Addr0 36 Addr2
37 Chip Select 0	38	Chip Select 1
39 Activity	40	Ground

Technical schematic diagram of a device layout with labeled components and connectors

A. IDE

Serial ATA Ports

There are Six Serial ATA Ports (I-SATA0\~I-SATA 5) located on the motherboard. These ports provide serial-link signal connections, which are faster than the connections of Parallel ATA. See the table on the right for pin definitions.

Serial ATA Pin Definitions
Pin#	Definition
1 Ground
2 TX_P
3 TX_N
4 Ground
5 RX_N
6 RX_P
7 Ground

PG 0.546234 PG 0.546239 PG 0.546242 PG 0.546245 PG 0.546249 PG 0.546253 PG 0.546257 PG 0.546263 PG 0.546267 PG 0.546273 PG 0.546279 PG 0.546283 CPU2 P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1; P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P P1: P1: P1: P1: P1: P1: P1: P1: P1: P1: P P1: P1: P1: P1: P1: P1: P1: P1: P P2: LTR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/TCR/ SUSPER X8DAH1, Pin 2.0 JGATM ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HSP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HPP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HFP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP ICU HTP

A. SATA 0\~5

Chapter 3

Troubleshooting

3-1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the 'Technical Support Procedures' and/or 'Returning Merchandise for Service' section(s) in this chapter. Note: Always disconnect the power cord before adding, changing or installing any hardware components.

Before Power On

Make sure that there are no short circuits between the motherboard and 1. chassis.

Disconnect all ribbon/wire cables from the motherboard, including those for 2. the keyboard and mouse.

Remove all add-on cards.3.

1. Install CPU 1 first (making sure it is fully seated) and connect the chassis speaker and the power LED to the motherboard. (Check all jumper settings as well.)

No Power

Make sure that there are no short circuits between the motherboard and the 1. chassis.

Make sure that all jumpers are set to their default positions.2.

Check that the 115V/230V switch on the power supply is properly set.3.

Turn the power switch on and off to test the system.4.

The battery on your motherboard may be old. Check to verify that it still sup-5. plies \~3VDC. If it does not, replace it with a new one.

No Video

If the power is on but you have no video, remove all the add-on cards and 1. cables.

Use the speaker to determine if any beep codes exist. Refer to the Appendix 2. for details on beep codes.

Losing the System's Setup Configuration

Make sure that you are using a high quality power supply. A poor quality 1. power supply may cause the system to lose the CMOS setup information. Refer to Section 1-6 for details on recommended power supplies.

The battery on your motherboard may be old. Check to verify that it still sup-2. plies \~3VDC. If it does not, replace it with a new one.

1. If the above steps do not fix the Setup Configuration problem, contact your vendor for repairs.

Memory Errors

When a No_Memory_Beep_Code is issued by the system, check the following:

Make sure that the DIMM modules are properly and fully installed. 1.

Check if different speeds of DIMMs have been installed and check if the BIOS 2. setup is configured for the fastest speed of RAM used. (It is recommended to use the same RAM speed for all DIMMs in the system.)

Make sure you are using the correct type of DDR3 Registered ECC or Unbuf-3. fered ECC/Non-ECC 1333 MHz/1066 MHz/800 MHz SDRAM (recommended by the manufacturer.)

Check for bad DIMM modules or slots by swapping a single module between 4. all memory slots and check the results.

Make sure that all memory modules are fully seated in their slots. Make sure 5. to follow the instructions given on DIMM population in Section 2-3 in Chapter 2.

Check the position of the 115V/230V switch on the power supply.6.

Please follow the instructions given in the DIMM Population Tables listed in 7. Section 2-4 to install your memory modules.

3-2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, please note that as a motherboard manufacturer, Supermicro does not sell directly to end-users, so it is best to first check with your distributor or reseller for troubleshooting services. They should know of any possible problem(s) with the specific system configuration that was sold to you.

Please go through the 'Troubleshooting Procedures' and 'Frequently Asked 1. Question' (FAQ) sections in this chapter or see the FAQs on our website (http://www.supermicro.com/support/faqs/) before contacting Technical Support.

BIOS upgrades can be downloaded from our website at http://www.supermicro.com/support/bios/).

If you still cannot resolve the problem, include the following information when 3. contacting Supermicro for technical support:

• Motherboard model and PCB revision number
  BIOS release date/version (this can be seen on the initial display when your • system fi rst boots up)
• System configuration
• An example of a Technical Support form is on our website at (http://www.super-micro.com/support/contact.cfm).
• Distributors: For immediate assistance, please have your account number ready when placing a call to our technical support department. We can be reached by e-mail at [e-mail] or by fax at: [phone], option 2.

3-3 Frequently Asked Questions

Question: What are the various types of memory that my motherboard can support?

Answer: This motherboard has 18 240-pin DIMM slots that support DDR3 Registered ECC or Unbuf. ECC/Non-ECC 1333 MHz/1066 MHz/800 MHz SDRAM

modules. It is strongly recommended that you do not mix memory modules of different speeds and sizes. Please follow all memory installation instructions given on Section 2-3 in Chapter 2.

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing any problems with your system. Updated BIOS files are located on our website at http://www.supermicro.com/support/bios/. Please check our BIOS warning message and the information on how to update your BIOS on our website. Select your motherboard model and download the BIOS file to your computer. Also, check the current BIOS revision and make sure that it is newer than your BIOS before downloading. You can choose from the zip file and the .exe file. If you choose the zip BIOS file, please unzip the BIOS file onto a bootable USB device. Run the batch file using the format flash.bat filename.rom from your bootable USB device to flash the BIOS. Then, your system will automatically reboot. Please note that this process may take a few minutes to complete. Do not be concerned if the screen is paused for a few minutes.

Warning: Do not shut down or reset the system while updating the BIOS to prevent possible system boot failure!

Note: The SPI BIOS chip used on this motherboard cannot be removed. Send your motherboard back to our RMA Department for repair.

Question: What's on the CD that came with my motherboard?

Answer: The supplied CD has drivers and programs that are needed for your system. Please review the CD and install the applications you need. Applications on the CD include chipset drivers for the Windows OS, security and audio drivers.

3-4 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA number should be prominently displayed on the outside of the shipping carton, and mailed prepaid or hand-carried. Shipping and handling charges will be applied for all orders that must be mailed when service is complete. For faster service, You can also request a RMA authorization online (http://www.supermicro.com/support/rma/).

This warranty only covers normal consumer use and does not cover damages incurred in shipping or from failure due to the alternation, misuse, abuse or improper maintenance of products.

During the warranty period, contact your distributor first for any product problems.

Chapter 4

BIOS

4-1 Introduction

This chapter describes the AMI BIOS Setup Utility for the X8DAH+/X8DAH+-F. The AMI ROM BIOS is stored in a Flash EEPROM and can be easily updated. This chapter describes the basic navigation of the AMI BIOS Setup Utility setup screens.

Starting BIOS Setup Utility

To enter the AMI BIOS Setup Utility screens, press the key while the system is booting up.

Note: In most cases, the key is used to invoke the AMI BIOS setup screen. There are a few cases when other keys are used, such as , , etc.

Each main BIOS menu option is described in this manual. The Main BIOS setup menu screen has two main frames. The left frame displays all the options that can be configured. Grayed-out options cannot be configured. Options in blue can be configured by the user. The right frame displays the key legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white. Often a text message will accompany it. (Note: the AMI BIOS has default text messages built in. Supermicro retains the option to include, omit, or change any of these text messages.)

The AMI BIOS Setup Utility uses a key-based navigation system called "hot keys". Most of the AMI BIOS setup utility "hot keys" can be used at any time during the setup navigation process. These keys include , , , , arrow keys, etc.

Note: Options printed in Bold are default settings.

How To Change the Configuration Data

The configuration data that determines the system parameters may be changed by entering the AMI BIOS Setup utility. This Setup utility can be accessed by pressing at the appropriate time during system boot.

Starting the Setup Utility

Normally, the only visible Power-On Self-Test (POST) routine is the memory test. As the memory is being tested, press the key to enter the main menu of the AMI BIOS Setup Utility. From the main menu, you can access the other setup screens. An AMI BIOS identification string is displayed at the left bottom corner of the screen below the copyright message.

Warning! Do not upgrade the BIOS unless your system has a BIOS-related issue. Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall Supermicro be liable for direct, indirect, special, incidental, or consequential damages arising from a BIOS update. If you have to update the BIOS, do not shut down or reset the system while the BIOS is updating. This is to avoid possible boot failure.

4-2 Main Setup

When you first enter the AMI BIOS Setup Utility, you will enter the Main setup screen. You can always return to the Main setup screen by selecting the Main tab on the top of the screen. The Main BIOS Setup screen is shown below.

BIOS SETUP UTILITY Main Advanced Security Boot Exit System Overview System Time [06:31:10] System Date [Sat 04/04/2009] SuperMicro X8DAH Version :1.0 Build Date :03/25/09 Processor Intel(R) Xeon(R) CPU E5506 @ 2.13GHz Speed :2133MHz Physical Count :1 Logical Count :4 System Memory Populated Size :1024MB Available Size :1016MB Use [ENTER], [TAB] or [SHIFT-TAB] to select a field. Use [+] or [-] to configure system Time. ↑↓→:Move Enter:Select -/-/:Value F10:Save ESC:Exit F1:General Help F8:Fail-Safe Defaults F9:Optimized Defaults v02.67 (C) Copyright 1985-2009, American Megatrends, Inc.

System Overview: The following BIOS information will be displayed:

System Time/System Date

Use this option to change the system time and date. Highlight System Time or System Date using the arrow keys. Key in new values through the keyboard and press . Press the key to move between fields. The date must be entered in Day MM/DD/YY format. The time is entered in HH:MM:SS format. (Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.)

SuperMicro X8DAH

• Versions item displays the BIOS revision used in your system.
• Build Dateem displays the date when this BIOS was completed.

Processor

The AMI BIOS will automatically display the status of the processor used in your system:

• CPUType tem displays the type of CPU used in the motherboard.
• SpeedThis item displays the speed of the CPU detected by the BIOS.
• Physical Count displays the number of processors installed in your system as detected by the BIOS.
• LogicalsObumtdisplays the number of CPU Cores installed in your system as detected by the BIOS.

System Memory

This displays the size of memory available in the system:

• Populated Size displays the installed memory size detected by the BIOS.
• Available size displays the available memory detected by the BIOS.

4-3 Advanced Setup Configurations

Use the arrow keys to select Boot Setup and hit to access the submenu items:

BIOS SETUP UTILITY
Main Advanced Security Boot Exit
Advanced Settings	Configure BOOT Features.
BOOT Feature Processor & Clock Options Advanced Chipset Control IDE / Floppy Configuration PCI/PnP Configuration SuperIO Device Configuration Remote Access Configuration Hardware Health Configuration ACPI Configuration Trusted Computing IPMI Configuration Event Log Configuration	↑↓←→:Move Enter:Select +/-/::Value F10:Save ESC:Exit F1:General Help F8:Fail-Safe Defaults F9:Optimized Defaults

▶BOOT Features

Quick Boot

If Enabled, this option will skip certain tests during POST to reduce the time needed for system boot. The options are Enabled and Disabled.

Quiet Boot

This option allows the bootup screen options to be modified between POST messages or the OEM logo. Select Disabled to display the POST messages. Select Enabled to display the OEM logo instead of the normal POST messages. The options are Enabled and Disabled.

AddOn ROM Display Mode

This sets the display mode for Option ROM. The options are Force BIOS and Keep Current.

Bootup Num-Lock

This feature selects the Power-on state for Numlock key. The options are Off and On.

PS/2 Mouse Support

This feature enables support for the PS/2 mouse. The options are Disabled, Enabled and Auto.

Wait For 'F1' If Error

This forces the system to wait until the 'F1' key is pressed if an error occurs. The options are Disabled and Enabled.

Hit 'Del' Message Display

This feature displays "Press DEL to run Setup" during POST. The options are Enabled and Disabled.

Watch Dog Function

If enabled, the Watch Dog Timer will allow the system to reboot when it is inactive for more than 5 minutes. The options are Enabled and Disabled.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Power-Off for the system power to remain off after a power loss. Select Power-On for the system power to be turned on after a power loss. Select Last State to allow the system to resume its last state before a power loss. The options are Power-On, Power-Off and Last State.

Interrupt 19 Capture

Interrupt 19 is the software interrupt that handles the boot disk function. When this item is set to Enabled, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at boot and allow the drives that are attached to these host adaptors to function as bootable disks. If this item is set to Disabled, the ROM BIOS of the host adaptors will not capture Interrupt 19, and the drives attached to these adaptors will not function as bootable devices. The options are Enabled and Disabled.

▶Processor and Clock Options

This submenu allows the user to configure the Processor and Clock settings.

CPU Ratio

If set to Manual, this option allows the user to set the ratio between the CPU Core Clock and the FSB Frequency. (Note: if an invalid ratio is entered, the AMI BIOS will restore the setting to the previous state.) The options are Auto and Manual.

Ratio CMOS Setting

If CPU Ratio is set to Manual (above), this option allows the user to set the ratio between the CPU Core Clock and the FSB Frequency. (Note: if an invalid ratio is entered, the AMI BIOS will restore the setting to the previous state.) The default setting depends on the type of CPU installed on the motherboard. The default setting for the CPU installed in your motherboard is [21]. Press "+" or "-" on your keyboard to change this value.

Clock Spread Spectrum

Select Enable to use the feature of Clock Spectrum, which will allow the BIOS to monitor and attempt to reduce the level of Electromagnetic Interference caused by the components whenever needed. The options are Disabled and Enabled.

Hardware Prefetcher (Available when supported by the CPU)

If set to Enabled, the hardware pre fetcher will pre fetch streams of data and instructions from the main memory to the L2 cache in the forward or backward manner to improve CPU performance. The options are Disabled and Enabled.

Adjacent Cache Line Prefetch (Available when supported by the CPU)

The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The CPU fetches both cache lines for 128 bytes as comprised if Enabled.

Intel® Virtualization Technology (Available when supported by the CPU)

Select Enabled to use the feature of Virtualization Technology to allow one platform to run multiple operating systems and applications in independent partitions, creating multiple "virtual" systems in one physical computer. The options are Enabled and Disabled. Note: If there is any change to this setting, you will need to power off and restart the system for the change to take effect. Please refer to Intel's web site for detailed information.

Execute-Disable Bit Capability (Available when supported by the OS and the CPU)

Set to Enabled to enable the Execute Disable Bit which will allow the processor to designate areas in the system memory where an application code can execute and where it cannot, thus preventing a worm or a virus from flooding illegal codes to overwhelm the processor or damage the system during an attack. The default is Enabled. (Refer to Intel and Microsoft Web Sites for more information.)

Simultaneous Multi-Threading (Available when supported by the CPU)

Set to Enabled to use the Simultaneous Multi-Threading Technology, which will result in increased CPU performance. The options are Disabled and Enabled.

Active Processor Cores

Set to Enabled to use a processor's Second Core and beyond. (Please refer to Intel's web site for more information.) The options are All, 1 and 2.

Intel® EIST Technology

EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically adjust processor voltage and core frequency in an effort to reduce power consumption and heat dissipation. Please refer to Intel's web site for detailed information. The options are Disabled and Enabled.

C1E Support

Select Enabled to use the feature of Enhanced Halt State. C1E significantly reduces the CPU's power consumption by reducing the CPU's clock cycle and voltage during a "Halt State." The options are Disabled and Enabled.

Intel® C-STATE Tech

If enabled, C-State is set by the system automatically to either C2, C3 or C4 state. The options are Disabled and Enabled.

C-State package limit setting (Available when Intel® C-State Tech is enabled)

If set to Auto, the AMI BIOS will automatically set the limit on the C-State package register. The options are Auto, C1, C3, C6 and C7.

C1 Auto Demotion

When enabled, the CPU will conditionally demote C3, C6 or C7 requests to C1 based on un-core auto-demote information. The options are Disabled and Enabled.

C3 Auto Demotion

When enabled, the CPU will conditionally demote C6 or C7 requests to C3 based on un-core auto-demote information. The options are Disabled and Enabled.

DCA Technology

This feature accelerates the performance of TOE devices. Note: A TOE device is a specialized, dedicated processor that is installed on an add-on card or a network card to handle some or all packet processing of this add-on card. For this motherboard, the TOE device is built inside the ESB 2 South Bridge chip. This feature is supported only by some types of processors (i.e., Intel Nehalem-WS 1S). The options are Enabled and Disabled.

DCA Prefetch Delay

A DCA Prefetch is used with TOE components to prefetch data in order to shorten execution cycles and maximize data processing efficiency. Prefetching too frequently can saturate the cache directory and delay necessary cache accesses. This feature reduces or increases the frequency the system prefetches data. The options are [8], [16], [32], [40], [48], [56], [64], [72], [80], [88], [96], [104], [112], [120]

▶Advanced Chipset Control

The items included in the Advanced Settings submenu are listed below:

▶QPI & IMC Configuration

QPI Links Speed

This feature selects QPI's data transfer speed. The options are Slow-mode, and Full Speed.

QPI Frequency

This selects the desired QPI frequency. The options are Auto, 4.800 GT, 5.866GT, 6.400 GT.

QPI L0s and L1

This enables the QPI power state to low power. L0s and L1 are automatically selected by the motherboard. The options are Disabled and Enabled.

Memory Frequency

This feature forces a DDR3 frequency slower than what the system has detected. The available options are Auto, Force DDR-800, Force DDR-1066, and Force DDR-1333.

Memory Mode

The options are Independent, Channel Mirror, Lockstep and Sparing.

Independent - All DIMMs are available to the operating system.

Channel Mirror - The motherboard maintains two identical copies of all data in memory for redundancy.

Lockstep - The motherboard uses two areas of memory to run the same set of operations in parallel.

Sparing - A preset threshold of correctable errors is used to trigger fail-over. The spare memory is put online and used as active memory in place of the failed memory.

Demand Scrubbing

A memory error-correction scheme where the Processor writes corrected data back into the memory block from where it was read by the Processor. The options are Enabled and Disabled.

Patrol Scrubbing

A memory error-correction scheme that works in the background looking for and correcting resident errors. The options are Enabled and Disabled.

Throttling - Closed Loop / Throttling - Open Loop

Throttling improves reliability and reduces power in the processor by automatic voltage control during processor idle states. Available options are Disabled and Enabled. If Enabled, the following items will appear:

Hysteresis Temperature (Closed Loop only)

Temperature Hysteresis is the temperature lag (in degrees Celsius) after the set DIMM temperature threshold is reached before Closed Loop Throttling begins. The options are Disabled, 1.5°C, 3.0°C, and 6.0°C.

Guardband Temperature (Closed Loop only)

This is the temperature which applies to the DIMM temperature threshold. Each step is in 0.5^ C increment. The default is [006]. Press "+" or "-" on your keyboard to change this value.

Inlet Temperature

This is the temperature detected at the chassis inlet. Each step is in 0.5^ C increment. The default is [070]. Press "+" or "-" on your keyboard to change this value.

Temperature Rise

This is the temperature rise to the DIMM thermal zone. Each step is in 0.5^ C increment. The default is [020]. Press "+" or "-" on your keyboard to change this value.

Air Flow

This is the air flow speed to the DIMM modules. Each step is one mm/sec. The default is [1500]. Press "+" or "-" on your keyboard to change this value.

Altitude

This feature defines how many meters above or below sea level the system is located. The options are Sea Level or Below, 1\~300, 301\~600, 601\~900, 901\~1200, 1201\~1500, 1501\~1800, 1801\~2100, 2101\~2400, 2401\~2700, 2701\~3000.

DIMM Pitch

This is the physical space between each DIMM module. Each step is in 1/1000 of an inch. The default is [400]. Press "+" or "-" on your keyboard to change this value.

HDA Controller

Select Enabled to activate the onboard High-Definition Audio controller. The options are Enabled and Disabled.

Intel VT-d

Select Enabled to enable Intel's Virtualization Technology support for Direct I/O VT-d by reporting the I/O device assignments to VMM through the DMAR ACPI Tables. This feature offers fully-protected I/O resource-sharing across the Intel platforms, providing the user with greater reliability, security and availability in networking and data-sharing. The settings are Enabled and Disabled.

SR-IOV Support

Single Root I/O Virtualization is an industry-standard mechanism that allows devices to advertise their capability to be simultaneously shared among several virtual machines. SR-IOV is capable of partitioning a PCI function into several virtual interfaces for sharing the resources of a PCI Express (PCIe) device under a virtual environment. The options are Disabled and Enabled.

NUMA Support

Select Enabled to use the feature of Non-Uniform Memory Access to improve CPU performance. The options are Enabled and Disabled.

Intel I/OAT

The Intel I/OAT (I/O Acceleration Technology) significantly reduces CPU overhead by leveraging CPU architectural improvements, freeing resources for more other tasks. The options are Disabled and Enabled.

Active State Power Management

Select Enabled to start Active-State Power Management for signal transactions between L0 and L1 Links on the PCI Express Bus. This maximizes power-saving and transaction speed. The options are Enabled and Disabled.

Route Port 80h Cycles to

This feature allows the user to decide which bus to send debug information to. The options are LPC and PCI.

USB Functions

This feature allows the user to decide the number of onboard USB ports to be enabled. The Options are: Disabled, 2 USB ports, 4 USB ports, 6 USB ports, 8 USB ports, 10 USB ports and 12 USB ports.

USB 2.0 Controller

Select Enabled to activate the onboard USB2.0 controller. The options are En-abled and Disabled.

Legacy USB Support

Select Enabled to use Legacy USB devices. If this item is set to Auto, Legacy USB support will be automatically enabled if a legacy USB device is installed on the motherboard, and vise versa. The settings are Disabled, Enabled and Auto.

▶IDE/Floppy Configuration

When this submenu is selected, the AMI BIOS automatically detects the presence of the IDE devices and displays the following items:

Floppy A

This feature allows the user to select the type of floppy drive connected to the system as specified. The options are Disabled, 360KB 5 1/4", 1.2MB 5 1/4", 720KB 3 1/2", 1.44MB 3 1/2" and 2.88MB 3 1/2". The default setting for Floppy A is 1.44MB 3 1/2", and for Floppy B is Disabled.

SATA#1 Configuration

If Compatible is selected, it sets SATA#1 to legacy compatibility mode, while selecting Enhanced sets SATA#1 to native SATA mode. The options are Disabled, Compatible and Enhanced.

Configure SATA#1 as

This feature allows the user to select the drive type for SATA#1. The options are IDE, RAID and AHCI. (When the option-RAID is selected, the item-ICH RAID Code Base will appear.)

ICH RAID Code Base (This feature is available when the option-RAID is selected)

Select Intel to enable Intel's SATA RAID firmware to configure Intel's SATA RAID settings. Select Adaptec to enable Adaptec's SATA RAID firmware to configure Adaptec's SATA RAID settings. The options are Intel and Adaptec.

SATA#2 Configuration (This feature is available when the option-IDE is selected)

Selecting Enhanced will set SATA#2 to native SATA mode. The options are Disabled, and Enhanced.

IDE Detect Timeout (sec)

Use this feature to set the time-out value for the BIOS to detect the ATA, ATAPI devices installed in the system. The options are 0 (sec), 5, 10, 15, 20, 25, 30, and 35.

Primary IDE Master/Slave, Secondary IDE Master/Slave, Third IDE Master, and Fourth IDE Master

These settings allow the user to set the parameters of Primary IDE Master/Slave, Secondary IDE Master/Slave, Third and Fourth IDE Master slots. Hit to activate the following submenu screen for detailed options of these items. Set the correct configurations accordingly. The items included in the submenu are:

Type

Select the type of device connected to the system. The options are Not Installed, Auto, CD/DVD and ARMD.

LBA/Large Mode

LBA (Logical Block Addressing) is a method of addressing data on a disk drive. In the LBA mode, the maximum drive capacity is 137 GB. For drive capacities over 137 GB, your system must be equipped with a 48-bit LBA mode addressing. If not, contact your manufacturer or install an ATA/133 IDE controller card that supports 48-bit LBA mode. The options are Disabled and Auto.

Block (Multi-Sector Transfer)

Block Mode boosts the IDE drive performance by increasing the amount of data transferred. Only 512 bytes of data can be transferred per interrupt if Block Mode is not used. Block Mode allows transfers of up to 64 KB per interrupt. Select Disabled to allow data to be transferred from and to the device one sector at a time. Select Auto to allow data transfer from and to the device occur multiple sectors at a time if the device supports it. The options are Auto and Disabled.

PIO Mode

The IDE PIO (Programmable I/O) Mode programs timing cycles between the IDE drive and the programmable IDE controller. As the PIO mode increases, the cycle time decreases. The options are Auto, 0, 1, 2, 3, and 4.

Select Auto to allow the AMI BIOS to automatically detect the PIO mode. Use this value if the IDE disk drive support cannot be determined.

Select 0 to allow the AMI BIOS to use PIO mode 0. It has a data transfer rate of 3.3 MBs.

Select 1 to allow the AMI BIOS to use PIO mode 1. It has a data transfer rate of 5.2 MBs.

Select 2 to allow the AMI BIOS to use PIO mode 2. It has a data transfer rate of 8.3 MBs.

Select 3 to allow the AMI BIOS to use PIO mode 3. It has a data transfer rate of 11.1 MBs.

Select 4 to allow the AMI BIOS to use PIO mode 4. It has a data transfer bandwidth of 32-Bits. Select Enabled to enable 32-Bit data transfer.

DMA Mode

Select Auto to allow the BIOS to automatically detect IDE DMA mode when the IDE disk drive support cannot be determined.

Select SWDMA0 to allow the BIOS to use Single Word DMA mode 0. It has a data transfer rate of 2.1 MBs.

Select SWDMA1 to allow the BIOS to use Single Word DMA mode 1. It has a data transfer rate of 4.2 MBs.

Select SWDMA2 to allow the BIOS to use Single Word DMA mode 2. It has a data transfer rate of 8.3 MBs.

Select MWDMA0 to allow the BIOS to use Multi Word DMA mode 0. It has a data transfer rate of 4.2 MBs.

Select MWDMA1 to allow the BIOS to use Multi Word DMA mode 1. It has a data transfer rate of 13.3 MBs.

Select MWDMA2 to allow the BIOS to use Multi-Word DMA mode 2. It has a data transfer rate of 16.6 MBs.

Select UDMA0 to allow the BIOS to use Ultra DMA mode 0. It has a data transfer rate of 16.6 MBs. It has the same transfer rate as PIO mode 4 and Multi Word DMA mode 2.

Select UDMA1 to allow the BIOS to use Ultra DMA mode 1. It has a data transfer rate of 25 MBs.

Select UDMA2 to allow the BIOS to use Ultra DMA mode 2. It has a data transfer rate of 33.3 MBs.

Select UDMA3 to allow the BIOS to use Ultra DMA mode 3. It has a data transfer rate of 66.6 MBs.

Select UDMA4 to allow the BIOS to use Ultra DMA mode 4. It has a data transfer rate of 100 MBs.

Select UDMA5 to allow the BIOS to use Ultra DMA mode 5. It has a data transfer rate of 133 MBs.

Select UDMA6 to allow the BIOS to use Ultra DMA mode 6. It has a data transfer rate of 133 MBs. The options are Auto, SWDMAn, MWDMAn, and UDMAn.

S.M.A.R.T. For Hard disk drives

Self-Monitoring Analysis and Reporting Technology (SMART) can help predict impending drive failures. Select Auto to allow the AMI BIOS to automatically detect hard disk drive support. Select Disabled to prevent the AMI BIOS from using the S.M.A.R.T. Select Enabled to allow the AMI BIOS to use the S.M.A.R.T. to support hard drive disk. The options are Disabled, Enabled, and Auto.

32Bit Data Transfer

Select Enable to enable the function of 32-bit IDE data transfer. The options are Enabled and Disabled.

▶PCI/PnP Configuration

Clear NVRAM

This feature clears the NVRAM during system boot. The options are No and Yes.

Plug & Play OS

Selecting Yes allows the OS to configure Plug & Play devices. (This is not required for system boot if your system has an OS that supports Plug & Play.) Select No to allow the AMI BIOS to configure all devices in the system.

PCI Latency Timer

This feature sets the latency Timer of each PCI device installed on a PCI bus. Select 64 to set the PCI latency to 64 PCI clock cycles. The options are 32, 64, 96, 128, 160, 192, 224 and 248.

PCI IDE BusMaster

When enabled, the BIOS uses PCI bus mastering for reading/writing to IDE drives. The options are Disabled and Enabled.

PCIe I/O Performance

This feature sets the PCIE maximum payload size. The options are 128B and 256B.

PCI-E Slot 1 x8, PCI-E Slot 2 x16, PCI-E Slot 3 x8, PCI-E Slot 4 x8 (in x16 slot), PCI-E Slot 5 PCI-E x4 (in x8 slot), PCI-E Slot 6 x16, PCI-E Slot 7 x8.

This feature allows you to Enable or Disable any of the PCI slots. The options are Enable and Disable.

Onboard LAN Option ROM Select

Select the onboard LAN option ROM type. The options are iSCSI and PXE.

Load Onboard LAN1 Option ROM/Load Onboard LAN2 Option ROM

Select Enabled to enable the onboard LAN1 or LAN2 Option ROM. This is to boot computer using a network interface. The options are Enabled and Disabled.

Boot Graphics Adapter Priority

This feature allows the user to select the priority graphics adapter for system boot. The options are Auto and Onboard VGA.

▶Super IO Device Configuration

Serial Port1 Address / Serial Port2 Address

This option specifies the base I/O port address and the Interrupt Request address of Serial Port 1 and Serial Port 2. Select Disabled to prevent the serial port from accessing any system resources. When this option is set to Disabled, the serial port physically becomes unavailable. Select 3F8/IRQ4 to allow the serial port to use 3F8 as its I/O port address and IRQ 4 for the interrupt address. The options for Serial Port1 are Disabled, 3F8/IRQ4, 3E8/IRQ4, 2E8/IRQ3. The options for Serial Port2 are Disabled, 2F8/IRQ3, 3E8/IRQ4, and 2E8/IRQ3.

Serial Port2 Mode

This feature allows the user to set the mode for Serial Port B. The options are Normal, IR (Infra-Red) and ASK-IR.

Onboard Floppy Controller

Select Enabled to enable the onboard floppy controller. The options are Disabled and Enabled.

▶ Remote Access Configuration

Remote Access

This allows the user to enable the Remote Access feature. The options are Disabled and Enabled.

If Remote Access is set to Enabled, the following items will display:

Serial Port Number

This feature allows the user decide which serial port to be used for Console Redirection. The options are COM 1 and COM 2.

Base Address, IRQ

This item displays the based address and IRQ of the serial port specified above.

Serial Port Mode

This feature allows the user to set the serial port mode for Console Redirection. The options are 115200 8, n 1; 57600 8, n, 1; 38400 8, n, 1; 19200 8, n, 1; and 9600 8, n, 1.

Flow Control

This feature allows the user to set the flow control for Console Redirection. The options are None, Hardware, and Software.

Redirection After BIOS POST

Select Disabled to turn off Console Redirection after Power-On Self-Test (POST). Select Always to keep Console Redirection active all the time after POST. (Note: This setting may not be supported by some operating systems.) Select Boot Loader to keep Console Redirection active during POST and Boot Loader. The options are Disabled, Boot Loader, and Always.

Terminal Type

This feature allows the user to select the target terminal type for Console Redirection. The options are ANSI, VT100, and VT-UTF8.

VT-UTF8 Combo Key Support

A terminal keyboard definition that provides a way to send commands from a remote console. Available options are Enabled and Disabled.

Sredir Memory Display Delay

This feature defines the length of time in seconds to display memory information. The options are No Delay, Delay 1 Sec, Delay 2 Sec, and Delay 4 Sec.

▶Hardware Health Monitor

This feature allows the user to monitor system health and review the status of each item as displayed.

CPU Overheat Alarm

This option allows the user to select the CPU Overheat Alarm setting which determines when the CPU OH alarm will be activated to provide warning of possible CPU overheat.

Warning! 1. Any temperature that exceeds the CPU threshold temperature predefined by the CPU manufacturer may result in CPU overheat or system instability. When the CPU temperature reaches this predefined threshold, the CPU and system cooling fans will run at full speed.

1. To avoid possible system overheating, please be sure to provide adequate airflow to your system.

The options are:

• The Early Alarm: Select this setting if you want the CPU overheat alarm (including the LED and the buzzer) to be triggered as soon as the CPU temperature reaches the CPU overheat threshold as predefined by the CPU manufacturer.
• The Defaulith Alaserting if you want the CPU overheat alarm (including the LED and the buzzer) to be triggered when the CPU temperature reaches about 5°C above the threshold temperature as predefined by the CPU manufacturer to give the CPU and system fans additional time needed for CPU and system cooling. In both the alarms above, please take immediate action as shown below.

CPU Temperature/System Temperature

This feature displays current temperature readings for the CPU and the System.

The following items will be displayed for your reference only:

CPU Temperature

The CPU Temperature feature will display the CPU temperature status as detected by the BIOS:

Low – This level is considered as the ‘normal’ operating state. The CPU temperature is well below the CPU ‘Temperature Tolerance’. The motherboard fans and CPU will run normally as configured in the BIOS (Fan Speed Control).

User intervention: No action required.

Medium – The processor is running warmer. This is a ‘precautionary’ level and generally means that there may be factors contributing to this condition, but the CPU is still within its normal operating state and below the CPU ‘Temperature Tolerance’. The motherboard fans and CPU will run normally as configured in the BIOS. The fans may adjust to a faster speed depending on the Fan Speed Control settings.

User intervention: No action is required. However, consider checking the CPU fans and the chassis ventilation for blockage.

High – The processor is running hot. This is a ‘caution’ level since the CPU’s ‘Temperature Tolerance’ has been reached (or has been exceeded) and may activate an overheat alarm. The system may shut down if it continues for a long period to prevent damage to the CPU.

User intervention: If the system buzzer and Overheat LED has activated, take action immediately by checking the system fans, chassis ventilation and room temperature to correct any problems.

Notes:

The CPU thermal technology that reports absolute temperatures (Celsius/Fahrenheit) has been upgraded to a more advanced feature by Intel in its newer processors. The basic concept is each CPU is embedded by unique temperature information that the motherboard can read. This ‘Temperature Threshold’ or ‘Temperature Tolerance’ has been assigned at the factory and is the baseline on which the motherboard takes action during different CPU temperature conditions (i.e., by increasing CPU Fan speed, triggering the Overheat Alarm, etc). Since CPUs can have different ‘Temperature Tolerances’, the installed CPU can now send information to the motherboard what its ‘Temperature Tolerance’ is, and not the other way around. This results in better CPU thermal management.

Supermicro has leveraged this feature by assigning a temperature status to certain thermal conditions in the processor (Low, Medium and High). This makes it easier for the user to understand the CPU's temperature status, rather than by just simply seeing a temperature reading (i.e., 25°C).

The information provided above is for your reference only. For more information on thermal management, please refer to Intel's Web site at www.Intel.com.

System Temperature: The system temperature will be displayed (in degrees in Celsius and Fahrenheit) as it is detected by the BIOS.

Fan Speed Readings

This feature displays the fan speed readings from Fan1 through Fan8.

Fan Speed Control Modes

This feature allows the user to decide how the system controls the speeds of the onboard fans. The CPU temperature and the fan speed are correlative. When the CPU on-die temperature increases, the fan speed will also increase, and vice versa. Select Workstation if your system is used as a Workstation. Select Server if your system is used as a Server. Select Disabled to disable the fan speed control function and allow the onboard fans to constantly run at full speed. The Options are:

Full Speed, Server, Workstation/Desktop, and Server Quiet.

Voltage Readings

The following voltage readings will be displayed.

CPU0 Vcore, CPU1 Vcore, 1.5V, 5V, 5VSB, 12V, -12V, 3.3Vcc, 3.3VSB, VBAT and Vtt

▶ACPI Configuration

Use this feature to configure Advanced Configuration and Power Interface (ACPI) power management settings for your system.

High Performance Event Timer

Select Enabled to activate the High Performance Event Timer (HPET) that produces periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing multimedia streams, providing smooth playback and reducing the dependency on other timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU. The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer. The options are Enabled and Disabled.

USB Device Wakeup

Select Enable to "wake-up" the system via a USB device when the system is in S3 or S4 State. The options are Enabled and Disabled.

PS2 KB/MS Wake Up

Select Enable to "wake-up" the system using either the PS2 keyboard or mouse (if equipped) when the system is in S3 (Sleep) or S4 (Hibernate) state. The options are Enabled and Disabled.

ACPI Aware O/S

Enable ACPI support if it is supported by the OS to control ACPI through the Operating System. Otherwise, disable this feature. The options are Yes and No.

Suspend Mode

This option is used to select the ACPI State that is used for system suspend. The options are S1 (POS), S3 (STR) and Auto.

S1 (POS) - All processor caches are erased, and stops executing instructions. Power to the CPU(s) and RAM is maintained, but RAM is refreshed.

S3 (STR) - The CPU has no power and the power supply goes on reduced power mode. However, main memory (RAM) is still powered.

ACPI APIC Support

Select Enabled to include the ACPI APIC Table Pointer in the RSDT (Root System Description Table) pointer list. The options are Enabled and Disabled.

APIC ACPI SCI IRQ

When this item is set to Enabled, APIC ACPI SCI IRQ is supported by the system. The options are Enabled and Disabled.

Headless Mode

This feature is used to enable system to function without a keyboard, monitor and/or mouse attached The options are Enabled and Disabled.

ACPI Version Features

The options are ACPI v1.0, ACPI v2.0 and ACPI v3.0. Please refer to ACPI's website for further explanation: http://www.acpi.info/.

▶Trusted Computing

TCG/TPM (Trusted Platform Module) Support

Select Yes on this item and enable the TPM jumper on the motherboard to enable TCG (TPM 1.1/1.2)/TPM support in order to improve data integrity and network security. The options are No and Yes. If this feature is set to Yes, the following items will display:

Indicate Physical

Enables indication of physical presence to TPM device each time the system starts. The options are Yes and No.

TPM Deactivated

Use this feature to Set or Clear the TPM device. The options are Set, Clear and Don't Change.

TPM Owner

Use this feature to Install or Clear the TPM ownership. The options are Don't Change, Enable Install, Disable Install and Clear.

Execute TPM Command

Select Enabled to allow the user to change executable TPM commands and TPM settings. Select Don't Change to keep the current TPM settings. The options are Don't Change, Enabled, and Disabled.

TPM Enable/Disable Status

This item displays the status of TPM Enabled/Disabled state.

TPM Owner Status

This item displays the status of TPM Ownership.

▶IPMI Configuration

Intelligent Platform Management Interface (IPMI) is a set of common interfaces that IT administrators can use to monitor system health and to manage the system as a whole. For more information on the IPMI specifications, please visit Intel's website at www.intel.com.

IPMI Firmware Revision

This item displays the current IPMI firmware revision.

Status of BMC

Baseboard Management Controller (BMC) manages the interface between system management software and platform hardware. This is an informational feature which returns the status code of the BMC micro controller.

▶View BMC System Event Log

This feature displays the BMC System Event Log (SEL). It shows the total number of entries of BMC System Events. To view an event, select an Entry Number and pressing to display the information as shown in the screen.

• Total Number of Entries

SEL Entry Number •

SEL Record ID •

SEL Record Type •

Timestamp, Generator ID •

Event Message Format User •

Event Sensor Type •

Event Sensor Number, •

Event Dir Type •

Event Data.

Clear BMC System Event Log

Select OK and press the key to clear the BMC system log. Select Cancel to keep the BMC System log. The options are OK and Cancel.

Caution: Any cleared information is unrecoverable. Make absolutely sure that you no longer need any data stored in the log before clearing the BMC Event Log.

▶Set LAN Configuration

Set this feature to configure the IPMI LAN adapter with a network address as shown in the following graphics.

Channel Number - Enter the channel number for the SET LAN Config command. This is initially set to [01]. Press "+" or "-" on your keyboard to change the Channel Number.

Channel Number Status - This feature returns the channel status for the Channel Number selected above: "Channel Number is OK" or "Wrong Channel Number".

IP Address Source

Select the source of this machine's IP address. If Static is selected, you will need to know and enter manually the IP address of this machine below. If DHCP is selected, the BIOS will search for a DHCP (Dynamic Host Configuration Protocol) server in the network it is attached to, and request the next available IP address. The options are DHCP and Static.

The following items are assigned IP addresses automatically if DHCP is selected under IP Address Source above:

IP Address

Enter the IP address for this machine. This should be in decimal and in dotted quad form (i.e., 192.168.10.253). The value of each three-digit number separated by dots should not exceed 255 as shown in the screen below.

Subnet Mask

Subnet masks tell the network which subnet this machine belongs to. The value of each three-digit number separated by dots should not exceed 255.

Gateway Address

This is the IP address of the gateway in the network. This is usually a router.

Mac Address

The BIOS will automatically enter the Mac address of this machine; however it may be over-ridden. Mac addresses are 6 two-digit hexadecimal numbers (Base 16, 0 \~ 9, A, B, C, D, E, F) separated by dots. (i.e., 00.30.48.D0.D4.60).

▶SET PEF Configuration

PEF Support

Select Enabled to enable the function of Platform Event Filter (PEF) which will interpret BMC events and perform actions based on pre-determined settings or events and performs actions based on pre-determined settings or 'traps' under IPMI 1.5

specifications. For example, powering the system down or sending an alert when a triggering event is detected. The default is Disabled.

The following will appear if PEF Support is set to Enabled.

PEF Action Global Control (Available if the item-PEF Support is enabled)

These are the different actions based on BMC events. The options are Alert, Power Down, Reset System, Power Cycle, OEM Action, Diagnostic Interface.

Alert Startup Delay (Available if the item-PEF Support is enabled)

This feature inserts a delay during startup for PEF alerts. The options are Enabled and Disabled.

Startup Delay (Available if the item-PEF Support is enabled)

This feature enables or disables startup delay. The options are Enabled and Disabled.

Event Message for PEF Action (Available if the item-PEF Support is enabled)

This enables of disables Event Messages for PEF action. Refer to Table 24.6 of the IPMI 1.5 Specification for more information at www.intel.com. The options are Disabled and Enabled.

BMC Watch Dog Timer Action

Allows the BMC to reset or power down the system if the operating system hangs or crashes. The options are Disabled, Reset System, Power Down, Power Cycle.

BMC Watch Dog TimeOut [Min:Sec]

This option appears if BMC Watch Dog Timer Action (above) is enabled. This is a timed delay in minutes or seconds, before a system power down or reset after an operating system failure is detected. The options are [5 Min] , [1 Min] , [30 Sec] , and [10 Sec] .

▶ Event Log Configuration

View Event Log

Use this option to view the System Event Log.

Mark all events as read

This option marks all events as read. The options are OK and Cancel.

Clear event log

This option clears the Event Log memory of all messages. The options are OK and Cancel.

PCI Error Log

Use this option to enable PCI error (PERR) logging. The options are Yes and No.

4-4 Security Settings

The AMI BIOS provides a Supervisor and a User password. If you use both passwords, the Supervisor password must be set first.

BIOS SETUP UTILITY Main Advanced Security Boot Exit Security Settings Supervisor Password :Not Installed User Password :Not Installed Change Supervisor Password Change User Password Boot Sector Virus Protection [Disabled] Install or Change the password. 1↓←→:Move Enter:Select +/-/::Value F10:Save ESC:Exit F1:General Help F8:Fail-Safe Defaults F9:Optimized Defaults v02.67 (C) Copyright 1985-2009, American Megatrends, Inc.

Supervisor Password

This item indicates if a Supervisor password has been entered for the system. "Not Installed" means a Supervisor password has not been used.

User Password

This item indicates if a user password has been entered for the system. "Not Installed" means that a user password has not been used.

Change Supervisor Password

Select this feature and press to access the submenu, and then type in a new Supervisor Password.

User Access Level (Available when Supervisor Password is set as above)

Available options are Full Access: grants full User read and write access to the Setup Utility, View Only: allows access to the Setup Utility but the fields cannot be

changed, Limited: allows only limited fields to be changed such as Date and Time, No Access: prevents User access to the Setup Utility.

Change User Password (Available when a User Password is installed)

Select this feature and press to access the submenu, and then type in a new User Password.

Clear User Password (Available only when User Password is installed)

This item allows you to clear a user password after it has been entered.

Password Check (Available when a password is installed)

This item forces the system to prompt for a password only when entering BIOS setup or during each bootup. The options are Setup and Always.

Boot Sector Virus Protection

When Enabled, the AMI BIOS displays a warning when any program (or virus) issues a Disk Format command or attempts to write to the boot sector of the hard disk drive. The options are Enabled and Disabled.

4-5 Boot Configuration

Use this feature to configure boot settings.

BIOS SETUP UTILITY Main Advanced Security Boot Exit Boot Settings ► Boot Device Priority ► Hard Disk Drives ► Removable Drives ► CD/DVD Drives Specifies the Boot Device Priority sequence. ↑↓←→:Move Enter:Select +/-/:Value F10:Save ESC:Exit F1:General Help F8:Fail-Safe Defaults F9:Optimized Defaults v02.63 (C) Copyright 1985-2008, American Megatrends, Inc.

▶Boot Device Priority

This feature allows the user to specify the sequence of priority for the Boot Device. The settings are 1st boot device, 2nd boot device, 3rd boot device, 4th boot device, 5th boot device and Disabled.

• 1st Boot Device - [USB: XXXXXXXXX]

2nd Boot Device - [CD/DVD: XXXXXXXXX] •

▶Hard Disk Drives

This feature allows the user to specify the boot sequence from all available hard disk drives. The settings are Disabled and a list of all hard disk drives that have been detected (i.e., 1st Drive, 2nd Drive, 3rd Drive, etc).

• 1st Drive - [SATA: XXXXXXXXX]

▶Removable Drives

This feature allows the user to specify the boot sequence from available Removable Drives. The settings are 1st boot device, 2nd boot device, and Disabled.

• 1st Drive - [USB: XXXXXXXXX]

2nd Drive •

▶CD/DVD Drives

This feature allows the user to specify the boot sequence from available CD/DVD Drives (i.e., 1st Drive, 2nd Drive, etc).4-6 Exit Options

Select the Exit tab from the AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen.

4-6 Exit Options

Select the Exit tab from the AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen.

BIOS SETUP UTILITY Main Advanced Security Boot Exit Exit Options Save Changes and Exit Discard Changes and Exit Discard Changes Load Optimal Defaults Load Failsafe Defaults Exit system setup after saving the changes. F10 key can be used for this operation. ↑↓←→:Move Enter:Select +/-/::Value F10:Save ESC:Exit F1:General Help F8:Fail-Safe Defaults F9:Optimized Defaults v02.67 (C) Copyright 1985-2009, American Megatrends, Inc.

Save Changes and Exit

When you have completed the system configuration changes, select this option to leave the BIOS Setup Utility and reboot the computer, so the new system configuration parameters can take effect. Select Save Changes and Exit from the Exit menu and press .

Discard Changes and Exit

Select this option to quit the BIOS Setup without making any permanent changes to the system configuration, and reboot the computer. Select Discard Changes and Exit from the Exit menu and press .

Discard Changes

Select this option and press to discard all the changes and return to the AMI BIOS Utility Program.

Load Optimal Defaults

To set this feature, select Load Optimal Defaults from the Exit menu and press . Then, select OK to allow the AMI BIOS to automatically load Optimal Defaults to the BIOS Settings. The Optimal settings are designed for maximum system performance, but may not work best for all computer applications.

Load Fail-Safe Defaults

To set this feature, select Load Fail-Safe Defaults from the Exit menu and press . The Fail-Safe settings are designed for maximum system stability, but not for maximum performance.

4-7 BIOS Recovery

Warning! Do not upgrade the BIOS unless your system has a BIOS-related issue. Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall Supermicro be liable for direct, indirect, special, incidental, or consequential damages arising from a BIOS update. If you need to update the BIOS, do not shut down or reset the system while the BIOS is updating. This is to avoid possible boot failure.

How to Recover the AMIBIOS Image (-the Main BIOS Block)

An AMIBIOS flash chip consists of a boot sector block, and a main BIOS code block (a main BIOS image). The boot sector block contains critical BIOS code, including memory detection and recovery code to be used to flash a new BIOS image if the original BIOS Image is corrupted. When the system is powered on, the boot sector code executes first. Once it is completed, the main BIOS code will continue with system initialization and complete the bootup process.

Notes: BIOS Recovery described below is used when the main BIOS block crashes. However, when the BIOS Boot sector crashes, you will need to send the motherboard back to Supermicro for RMA repairs.

4.7.1 Boot Sector Recovery from a USB Device

This feature allows the user to recover a BIOS image using a USB device without additional utilities needed. A user can download the BIOS image into a USB flash device, and name the file "SUPER.ROM" for the recovery process to load the file. A USB flash device such as a USB Flash Drive, a USB CDROM or a USB CDRW device can be used for this purpose,

1. Insert the USB device that contains the new BIOS image (the ROM files) saved in a root directory into your USB drive.

While turning the power on, press and hold and at the same 2. time until the USB Access LED Indicator comes on. This might take a few seconds.

Once the USB drive LED is on, release the and keys. 3. AMIBIOS will issue beep codes to indicate that the BIOS ROM file is being updated.

1. When BIOS flashing is completed, the computer will reboot. Do not interrupt the flashing process until it is completed.

4.7.2 Boot Sector Recovery from an IDE CD-ROM

This process is almost identical to the process of Boot Sector Recovery from a USB device, except that the BIOS image file is loaded from a CD-ROM. Use a CD-R or CD-RW drive to burn a CD with the BIOS image file in it, and name the file "SUPER. ROM" for the recovery process to load the file.

4.7.3 Boot Sector Recovery from a Serial Port ("Serial Flash")

This process, also known as "Serial Flash," allows the user to use a serial port to load a BIOS image for Boot Sector recovery. This feature is usually used for embedded systems that rely on a serial port for remote access and debugging.

Requirements

In order to use Serial Flash for Boot Sector Recovery, you will need to meet the following requirements.

• The "Target system," the system that needs BIOS updates, must have a serial port and "Serial Flash" support embedded in the BIOS image file.
• The "Host system" should also have a serial port and a terminal program that supports XModem Transfer protocol (Hyper Terminal for the Windows operating systems, and minicom for Linux/FreeSBD, etc.).
• A Null_modem serial cable

How to use Serial Flash for Boot Sector Recovery

Connect a Null_modem serial cable between the target system and the host 1. system that runs the terminal program.

1. Make sure that the new BIOS Image file is accessible for the host system.

Start the terminal program on the host system and create a new connection. 3. Use the following communication parameters for the new connection.

- Bits per second: 115200 bits/sec.

Data Bits: 8 •

Parity: None •

Stop Bit: 1 •

Flow Control: None •

1. Power on your system and click the button in the Hyper Terminal. The terminal screen will display the following messages.

Press <SpaceBar> to update BIOS.
Confirm update BIOS? (y/n) y
Begin remote BIOS flash? (y/n) y
Starting remote flash.
Upload new BIOS file using Xmodem protocol. 

1. Following the instructions given on the screen to update the BIOS. These instructions are also shown below.

a. At the prompt, press the to update the BIOS.

b. When asked to confirm BIOS updating, press to confirm BIOS updates.

c. Press again to begin flashing BIOS remotely.

Note: Be sure to complete Steps a\~c above quickly because you have a second or less to do so.

1. Once you've completed the instructions given, a screen will display to indicate that remote flashing is starting and the new BIOS file is being uploaded.

2. To use Hyper Terminal to transfer the XModem protocol by using the "Send File" dialog under the "Transfer" menu, follow the instructions below to complete XModem transfers.

a. Select the "Transfer" menu and enter .

AMI_FLSH - HyperTerminal File Edit View Call Transfer Help Send File... Receive File... Capture Text... Send Text File... Capture to Printer Press b. Specify the location of the ROM file and select the proper protocol (XModem). c. Press to start ROM File extraction. (See the picture below.) 

Send File Folder: C:\Documents and Settings\Desktop Filename: C:\Documents and Settings\Desktop\3C02.ROM Browse... Protocol: Xmodem Send Close Cancel

d. Once the ROM file extraction is completed, the message: "New BIOS received OK" will display. 

Starting FLASH Recovery. NVRAM data will be destroyed. CMOS data will be preserved. Ending FLASH Recovery. FLASH Update completed successfully. Rebooting...

8. Once remote BIOS flash is completed, the system will reboot. Note: AMIBIOS Serial Flash will work with any terminal communications program that supports VT-100 and XModem protocols, including protocols designed for GNU/LINUX & BSD operating systems such as minicom. It is recommended that the terminal program be configured to use the 'CR/LF' style of line termination.

Appendix A

BIOS Error Beep Codes

During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process. The error messages normally appear on the screen. Fatal errors will not allow the system to continue the boot-up procedure. If a fatal error occurs, you should consult with your system manufacturer for possible repairs. These fatal errors are usually communicated through a series of audible beeps. The numbers on the fatal error list correspond to the number of beeps for the corresponding error.

A-1 BIOS Error Beep Codes

BIOS Error Beep Codes
Beep Code Error Message Description
1 beep Refresh Circuits have been reset.		(Ready to power up)
5 short beeps + 1 long beep	Memory error No	memory detected in the system
8 beeps Display memory	read/write error	Video adapter missing or with faulty memory
Continuous High (pitch) + Low (pitch) (siren-like)	System Overheat System	Overheat

Notes

Appendix B

Installing the Windows OS

After all hardware components have been installed, you must first configure Intel South Bridge RAID Settings before you install the Windows OS and other software drivers. To configure RAID settings, please refer to RAID Configuration User Guides posted on our website at www.supermicro.com/support/manuals.

B-1 Installing the Windows OS to a RAID System

Insert Microsoft's Windows XP/2003/2008/Vista Setup CD in the CD Driver, 1. and the system will start booting up from CD. Press the key when the message-" Press F6 if you need to install a 2. third party SCSI or RAID driver" displays. When the Windows OS Setup screen appears, press "S" to specify additional 3.device(s). Insert the driver diskette-"ITE RAID Windows XP/2003/2008/Vista Driver for 4. IDE" into Drive A: and press the key. When the Windows OS Setup screen appears, press "S" to specify additional 5.device(s). Insert the driver diskette-"Intel AA Windows XP/2003/2008/Vista Driver for 6. ICH10R" into Drive A: and press the key. 7. Choose the Intel(R) ICH10R SATA RAID Controller from the list indicated in the Windows OS Setup Screen, and press the key. Press the key to continue the installation process. (If you need to 8. specify any additional devices to be installed, do it at this time.) Once all devices are specified, press the key to continue with the installation. From the Windows OS Setup screen, press the key. The Windows 9. OS Setup will automatically load all device files and then, continue the Windows OS installation. After the Windows OS Installation is completed, the system will automatically 10. reboot.

B-2 Installing the Windows OS to a Non-RAID System

Insert Microsoft's Windows XP/Windows 2003/Windows 2008/Windows Vista 1. Setup CD in the CD Driver, and the system will start booting up from CD. Continue with the OS installation. The Windows OS Setup screen will display.2. From the Windows OS Setup screen, press the key. The Windows 3. OS Setup will automatically load all device files and then continue with the Windows OS installation. After the Windows OS Installation is completed, the system will automatically 4. reboot. Insert the Supermicro Setup CD that came with your motherboard into the CD 5. Drive during system boot, and the main screen will display.

Appendix C

Software Installation Instructions

C-1 Installing Software Programs

After you've installed the Windows Operating System, a screen as shown below will appear. You are ready to install software programs and drivers that have not yet been installed. To install these software programs and drivers, click the icons to the right of these items. 

SUPERMICRO X8DAH Motherboard Drivers & Tools (WinXP) SUPERMICRO® Drivers & Tools Intel 5520 Chipset X8DAH SUPERMICRO Computer Inc. Intel 5500/5520 Chipset INF files Matrox G200e Graphics Driver Universal Audio Architecture Driver Realtek High Definition Audio Driver Intel Matrix Storage Manager Adaptec Storage Manager Intel PRO Network Connections Drivers Trusted Platform Module Driver SUPERMICRO Supero Doctor III Build driver diskettes and manuals Browse CD Auto Start Up Next Time For more information, please visit SUPERMICRO's web site.

Driver/Tool Installation Display Screen 

Notes:

1. Click the icons showing a hand writing on the paper to view the readme files for each item. Click on a computer icon to the right of an item to install an item (from top to the bottom) one at a time. After installing each item, you must reboot the system before proceeding with the next item on the list. The bottom icon with a CD on it allows you to view the entire contents of the CD. 2. When making a storage driver diskette by booting into a Driver CD, please set the SATA Configuration to "Compatible Mode" and configure SATA as IDE in the BIOS Setup. After making the driver diskette, be sure to change the SATA settings back to your original settings.

C-2 Configuring Supero Doctor III

The Supero Doctor III program is a Web-based management tool that supports remote management capability. It includes Remote and Local Management tools. The local management is called the SD III Client. The Supero Doctor III program included on the CDROM that came with your motherboard allows you to monitor the environment and operations of your system. Supero Doctor III displays crucial system information such as CPU temperature, system voltages and fan status. See the Figure below for a display of the Supero Doctor III interface.  Note: 1 The default user name and password are ADMIN. Note 2: In the Windows OS environment, the Supero Doctor III settings take precedence over the BIOS settings. When first installed, Supero Doctor III adopts the temperature threshold settings previously set in BIOS. Any subsequent changes to these thresholds must be made within Supero Doctor, since the SD III settings override the BIOS settings. For the Windows OS to adopt the BIOS temperature threshold settings, please change the SDIII settings to be the same as those set in BIOS. Supero Doctor III Interface Display Screen-I (Health Information) 

Super Doctor III Remote Management Transport Info, Health Info, Performance, Remote Control, Configuration, Administration, Systems Management, Report Help SUPERMICRO ADMINIC ■ Health Information Fan Status CPU1 Channels CPU2 Channels Intrusion Voltage +12V +5V +1.1V 3.3Vab

Supero Doctor III Interface Display Screen-II (Remote Control)


Super Doctor III Remote Management System Info: https://aiopt.org/ Remote Control / Configuration Administration / Systems Management / Report Help ► Remote Control +graceful Power control Open Console Power Control ↓ Enter Graceful power control Supero Doctor III allows a user to inform the OS to reboot or shut down within a specified time (the default is 30 seconds) Before the system reboots or shuts down, it's allowed to cancel the action. Requirements Keep Supero SD3Service Daemon running at all times on this system. Provide TCP/IP connectivity Power control

 Note: SD III Software Revision 1.0 can be downloaded from our Website at: ftp://ftp.supermicro.com/utility/Supero\_Doctor\_III/. You can also download SDIII User's Guide at: http://www.supermicro.com/PRODUCT/Manuals/SDIII/UserGuide.pdf. For Linux, we will still recommend that you use Supero Doctor II.

Notes

(Disclaimer Continued) The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and proceedings of any kind arising out of or related to such ultra-hazardous use or sale.