MCP48FEB08 - Carte d'évaluation Microchip - Free user manual and instructions

USER MANUAL MCP48FEB08 Microchip

20-Pin TSSOP and SSOP Evaluation Board User's Guide

Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification contained in their particular Microchip Data Sheet.
- Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.
- There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
- Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, PIC ^32 logo, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of their respective companies.

© 2009, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.

Printed on recycled paper.

QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV

=ISO/TS 16949:2002=

Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.

Table of Contents

Preface 5

Chapter 1. Product Overview

1.1 Introduction ...... 9
1.2 What is the 20-Pin TSSOP and SSOP Evaluation Board? ...... 9
1.3 What the 20-Pin TSSOP and SSOP Evaluation Board Kit Includes ...... 9

Chapter 2. Installation and Operation

2.1 Introduction ...... 11
2.2 Features 11
2.3 Getting Started 12
2.4 20-Pin TSSOP and SSOP Evaluation Board Description ...... 18

Appendix A. Schematic and Layouts

A.1 Introduction 27
A.2 Schematics and PCB Layout 27
A.3 Board Schematic 28
A.4 Board Layout – Top Layer and Silk-Screen 29
A.5 Board Layout – Bottom Layer 30
A.6 Board Layout – Power Plane 31
A.7 Board Layout – Ground Plane 32
A.8 Board Layout – Top Components ...... 33
A.9 Board Layout – Bottom Silk 34

Appendix B. Bill Of Materials (BOM)

Worldwide Sales and Service 36

NOTES:

Preface

NOTICE TO CUSTOMERS

All documentation becomes dated, and this manual is no exception. Microchip tools and documentation are constantly evolving to meet customer needs, so some actual dialogs and/or tool descriptions may differ from those in this document. Please refer to our web site (www.microchip.com) to obtain the latest documentation available.

Documents are identified with a "DS" number. This number is located on the bottom of each page, in front of the page number. The numbering convention for the DS number is "DSXXXXXA", where "XXXXX" is the document number and "A" is the revision level of the document.

INTRODUCTION

This chapter contains general information that will be useful to know before using the 20-Pin TSSOP and SSOP Evaluation Board. Items discussed in this chapter include:

• Document Layout
• Conventions Used in this Guide
  • The Microchip Web Site
  • The Microchip Web Site
• Customer Support
  • Document Revision History

DOCUMENT LAYOUT

This document describes how to use the 20-Pin TSSOP and SSOP Evaluation Board. The manual layout is as follows:

• Chapter 1. “Product Overview” – Important information about the 20-Pin TSSOP and SSOP Evaluation Board.
• Chapter 2. “Installation and Operation” – Includes instructions on how to get started with this evaluation board.
• Appendix A. “Schematic and Layouts” – Shows the schematic and layout diagrams for the 20-Pin TSSOP and SSOP Evaluation Board.
• Appendix B. “Bill Of Materials (BOM)” – Lists the parts that can be installed onto the 20-Pin TSSOP and SSOP Evaluation Board.

CONVENTIONS USED IN THIS GUIDE

This manual uses the following documentation conventions:

DOCUMENTATION CONVENTIONS

Description Represents Examples
Arial font:
Italic characters Referenced books MPLAB		^ IDE User's Guide

Microchip provides online support via our web site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information:

• Product Support – Data sheets and errata, application notes and sample programs, design resources, user's guides and hardware support documents, latest software releases and archived software
• General Technical Support – Frequently Asked Questions (FAQs), technical support requests, online discussion groups, Microchip consultant program member listing
• Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives

CUSTOMER SUPPORT

Users of Microchip products can receive assistance through several channels:

• Distributor or Representative
• Local Sales Office
  • Field Application Engineer (FAE)
• Technical Support
  • Development Systems Information Line

Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document.

Technical support is available through the web site at: http://support.microchip.com

DOCUMENT REVISION HISTORY

Revision A (November 2009)

- Initial Release of this Document.

Chapter 1. Product Overview

1.1 INTRODUCTION

This chapter provides an overview of the 20-Pin TSSOP and SSOP Evaluation Board and covers the following topics:

• What is the 20-Pin TSSOP and SSOP Evaluation Board?
- What the 20-Pin TSSOP and SSOP Evaluation Board kit includes

1.2 WHAT IS THE 20-PIN TSSOP AND SSOP EVALUATION BOARD?

The 20-Pin TSSOP and SSOP Evaluation Board allows the system designer to quickly evaluate the operation of Microchip Technology's devices in any of the following 20-pin packages:

• TSSOP
• SSOP

Some of the Microchip's family of devices that can be evaluated in the PCB include:

• Digital Potentiometers (Digi-Pots)
• CAN
• I r D A
- Serial Peripherals
- Switching Regulators
- P I C m ^ iMicrocontrollers

1.3 WHAT THE 20-PIN TSSOP AND SSOP EVALUATION BOARD KIT INCLUDES

This 20-Pin TSSOP and SSOP Evaluation Board Kit includes:

• Five 20-Pin TSSOP and SSOP Evaluation Boards - 102-00272
• Important Information sheet

NOTES:

Chapter 2. Installation and Operation

2.1 INTRODUCTION

This blank Printed Circuit Board allows 20-pin devices in the following four package types to be installed:

1. TSSOP-20.
2. SSOP-20.

This board is generic so that any device may be installed. Refer to the device data sheet, however, for suitability of device evaluation.

As well as the device, other desired passive components (resistors and capacitors) and connection posts may be installed. This allows the board to evaluate a minimum configuration for the device. Also, this allows the device to easily be jumpered into an existing system.

The board also has a 6-pin interface (PICkit Serial, ICSP, BFMP,...) whose signals can easily be jumpered to any of the device's pins.

2.2 FEATURES

The 20-Pin TSSOP and SSOP Evaluation Board has the following features:

• Connection terminals may be either through-hole or surface-mount
• Three 20-pin package footprints supported:
• TSSOP
• SSOP

- Footprints for optional passive components (SMT 805 footprint) for:

• Power supply filtering
• Device bypass capacitor
• Output filtering
• Output pull-up resistor
• Output pull-down resistor
• Output loading resistor

- Silk-screen area to write specifics of implemented circuit (on back of PCB), such as MCP4331 10 kΩ.

- PICkit Serial Analyzer / PICkit 2 Programming (ICSP) Header

2.3 GETTING STARTED

The 20-Pin TSSOP and SSOP Evaluation Board is a blank PCB that allows the user to configure the circuit to the exact requirements. The passive components use the surface-mount 805 package layout.

This evaluation board supports the following Microchip device families:

• Digital Potentiometers (Digi-Pots)
• CAN
• I r D A
- Serial Peripherals
- Switching Regulators
- P I C m®iMicrocontrollers

Figure 2-1 shows the evaluation board circuit. The pins on the 20-pin devices are tied together pin n to pin n. Pad Pn is tied to pin n of the TSSOP device. The SSOP package is on the bottom, so the pad Bn is tied to pin n of the SSOP device. The footprints for the pull-up (RxU) and pull-down (RxD) devices are labeled in relation to the TSSOP package, pin 1 is connected to R1U and R1D (which is connected to pin 20 of the SSOP device on the bottom of the board).

This circuit allows each pin to individually have any of the following: a pull-up resistor, a pull-down resistor (or a loading/filtering capacitor). Power supply filtering capacitors are connected between the VDD and VSS pads (C1 and C2).

The circuit has a 6-pin header that can be used for PICkit Serial communication as well as PIC ICSP. The signals of this header would need to be jumpered to the appropriate device signal.

TP1 TP2 TP9 PICkit Serial / ICSP Interface J1 NC NC VDD VDD Vss Vss SDA SDI SCL SCK NC SDO Requires blue wire jumpering to connect the PICkit Interface to the selected device DIP-20 (1) 1 20 2 19 9 12 10 11 TP20 TP19 TP12 TP11 TP10 TSSOP-20 (1) 1 20 2 19 9 12 10 11 VDD VSS C1 C2 TP10 R1U R1D TP2 R2U R2D TP19 R19U R19D TP20 R20U R20D TP19 TP20 SSOP-20 TP1 TP2 1 20 2 19 9 12 10 11 TP11 TP12 TP9 TP10 XTAL VIA1 VIA2 C3 C4 PIC Circuitry (bottom of PCB) NOTE1: The TSSOP14 device (Rheostat) will use the TSSOP-20 footprint, with not all pins connected.

FIGURE 2-1: 20-Pin TSSOP and SSOP Evaluation Board Circuit.

2.3.1 The Hardware

Figure 2-2 and Figure 2-3 shows the component layout of the 20-Pin TSSOP and SSOP Evaluation Board. This is a four-layer board (3.9" x 2.1" (99.06 mm x 53.34 mm)). There are twenty two connection points/pads that can use either through-hole or surface-mount connector posts.

The pad labeled VDD is connected to the PCB power plane, while the pad labeled VSS is connected to the PCB ground plane. All the passive components that are connected to VDD or VSS are connected to either the power plane or ground plane.

The twenty remaining PCB pads correspond to the device pins (i.e.; pad 1 connects to pin 1).

Each pad has two passive components associated with them: a pull-up resistor and a pull-down resistor. The pull-up resistor is always RXU and the pull-down resistor is RXD. The "X" is a numeric value that corresponds to a particular pad (1 to 8). As an example, Pad 5's pull-up resistor is R5U. Capacitor C1 and C2 are the power supply filtering capacitors. For whichever pin is the device's VDD, the RxD component footprint can be used for the device's bypass capacitor. Table 2-1 describes the components.

A 6-pin header interface is available that supports the PICkit Serial or the PICmicro In-Circuit Serial Programming (ICSP) interface. For additional information, refer to Section 2.4.5 "PICkit Serial or In-Circuit Serial Programming (ICSP) Interface (Header J1)".

FIGURE 2-2: 20-Pin TSSOP and SSOP Evaluation Board Layout (Top).

B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 VDD VSS U2- B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 C3 C4 Y1 LVP PCC PCD VSS VDD VPP J1 104-00272-R1

FIGURE 2-3: 20-Pin TSSOP and SSOP Evaluation Board Layout (Bottom).

TABLE 2-1: OPTIONAL COMPONENTS (2)

Component Comment
C1, C2 Power supply bypass capacitors
C3, C4 PIC Crystal capacitors
R1U, R2U, R3U, R4U, R5U, R6U, R7U, R8U, R9U, R10U, R11U, R12U, R13U, R14U, R15U, R16U, R17U, R18U, R19U, R20U	Pull-up resistors
R1D, R2D, R3D, R4D, R5D, R6D, R7D, R8D, R9D, R10D, R11D, R12D, R13D, R14D, R15D, R16D, R17D, R18D, R19D, R20D	Pull-down resistors (1)
Y1 Can connect to either PIC' main oscillator	or to the Timer oscillator circuit.
J1 PICkit Serial / ICSP header

Note 1: Whichever pin is the device's VDD pin, that corresponding RxD footprint can be used for the device's bypass capacitor. So if Pin 8 is the device's VDD pin, then install the bypass capacitor in the R8D footprint.
2: All passive components use the surface mount 805 footprint.

2.4 20-PIN TSSOP AND SSOP EVALUATION BOARD DESCRIPTION

The 20-Pin TSSOP and SSOP Evaluation Board PCB is designed to be flexible in the type of device evaluation that can be implemented.

The following sections describe each element of this evaluation board in further detail.

2.4.1 Power and Ground

The 20-Pin TSSOP and SSOP Evaluation Board has a VDD pad and a VSS pad. These pads can have connection posts installed that allows easy connection to the power ( V_DD ) and ground ( V_SS ) planes. The layout allows either through-hole or surface-mount connectors.

The power and ground planes are connected to the appropriate passive components on the PCB (such as power plane to RXU and ground plane to RXD components).

2.4.2 PCB Pads

For each package pin (pins 1 to 8), there is a PCB pad (pads 1 to 8). The device will have some power pins ( V_DD ) and some ground pins ( V_SS ). To ease connections on the PCB, vias to the power and ground plane have been installed close to each PCB pad. This allows any pad to be connected to the power or ground plane, so when power is connected to the VDD and VSS pads, the power is connected to the appropriate device pin (see Figure 2-4).

Jumpering to VSS

P1 R1U R1D or

Jumpering to VDD

P1 R1U R1D or

P1 R1U 0 Ω R1D

P1 0 Ω R1U R1D

FIGURE 2-4: Connecting the PCB pad to either VDD or VSS.

2.4.3 Passive Components (RXU, RXD, C1, and C2)

The footprints for these components are present to allow maximum flexibility in the use of this PCB to evaluate a wide range of devices. The purpose of these components may vary depending on the device under evaluation and how it is to be used in the desired circuit. Refer to the device data sheet for the recommended components that should be used when evaluating that device.

• Component RXU allows a pull-up resistor to be installed for the device pin
• Component RXD allows a pull-down resistor or a capacitive load/filter to be installed for the device pin
• Component C1 and C2 allows power supply filtering capacitors to be installed

2.4.4 Device Footprints

This section describes the characteristics of the component footprints so that you are better able to determine if the desired component(s) are compatible with the board.

2.4.4.1 TSSOP-20

The 20-pin TSSOP footprint has been layed out for packages that have a typical pitch of 0.65 mm (BSC), a maximum lead width of 0.30 mm, and a molded package width of 4.50 mm (BSC). Twenty-lead (or less, such as sixteen-lead and fourteen-lead) TSSOP packages that meet these characteristics should be able to be used with this board.

2.4.4.2 SSOP-20

The 20-pin SSOP footprint has been layed out for packages that have a typical pitch of 0.65 mm (BSC), a maximum lead width of 0.38 mm, and a maximum molded package width of 5.60 mm. Twenty-lead (or less) SSOP packages that meet these characteristics should be able to be used with this board.

2.4.4.3 DIP-20

The 20-pin DIP footprint has been layed out for packages that have a typical pitch of 100 mil (BSC), a maximum lead width of 22 mil and a molded package width of 600 mil.

2.4.4.4 PASSIVE COMPONENTS

All passive components (RxU, RxD, and Cx) use a surface mount 805 footprint. Any component that has a compatible footprint could be used with this board.

2.4.4.5 HEADER (1X6)

The header has a typical pitch of 100 mil (BSC). This header is designed to be compatible with the PICkit Serial Analyzer and PICkit 2 Programmer.

2.4.5 PICkit Serial or In-Circuit Serial Programming (ICSP) Interface (Header J1)

Figure 2-5 shows the interface connection of Header J1. The VDD and VSS signals are connected to the appropriate power or ground plane. The other 4 signals are open and can be easily jumpered to any of the 20 P1 (B20) through P20 (B1) connection points. The top layer silk screen indicates the common PICkit Serial signal names, while the bottom layer silk screen indicates the ICSP signal names.

Top-Layer Traces (PICkit Serial)

J1 CS/NC VDD SSS VSSA SDL/SC SOX/SOL SDX/NC

Ground Plane

Power Plane

Bottom-Layer Traces (ICSP)

LVP PGC PGD VSS VDD VPP J1

FIGURE 2-5: PICkit Serial / ICSP Interface Connections.

2.4.5.1 PICKIT SERIAL INTERFACE

Table 2-2 shows the pin number assignment for the different signals for each of the supported interface protocols (SPI, I²C,...).

TABLE 2-2: PICKIT SERIAL HEADER SIGNALS

Pin Number	PICkit Serial Header Signal						Comments M i c
	SPI I	^2C	U S	A	R T
1 CS	— TX CS TX
2	VDD	VDD	VDD	VDD	—
3	VSS	VSS	VSS	VSS	VSS
4 SDI	SDA — SDI		CS/WAKE
5	SCK	SCL	—	SCK	FAULT/TXE
6	SDO	—	RX	SDO	RX

2.4.5.2 ICSP INTERFACE

The ICSP interface allows a PICmicro MCU device to be programmed with programmers that support this interface, such as the PICkit 2 programmer (part number PG164120). Table 2-3 shows the pin number assignment for the ICSP signals.

TABLE 2-3: ICSP HEADER SIGNALS

Pin Number	ICSP Signal	Comments
1	VPP	High Voltage Signal
2	VDD
3	VSS
4	PCD	ICSP^TM Data
5	PCC	ICSP^TM Clock
6	—

2.4.6 Evaluating the MCP4361 Device (A Digital Potentiometer)

The MCP4361 is a Digital Potentiometer that is in a 20-lead TSSOP package with an SPI serial interface. This allows the device to be communicated to by the PICkit Serial Analyzer. For this to occur, the PICkit Serial Analyzer signals must be connected to the correct MCP4018 signals. These connections are shown in Figure 2-7.

Other Digital Potentiometers that are supported by this evaluation board are shown in Table 2-4.

MCP43X1 Quad Potentiometers

P3A 1 20 P2A P3W 2 19 P2W P3B 3 18 P2B CS 4 17 VDD SCK 5 16 SDO SDI 6 15 RESET VSS 7 14 WP P1B 8 12 P0B P1W 9 12 P0W P1A 10 11 P0A TSSOP

FIGURE 2-6: MCP43X1 (MCP4361) Pin Out.

P20 YP2 P19 P18 P17 P16 YP1 Y1 P15 P14 P13 SDO/NC P12 GCK/SCL P11 SDI/SDA P10 VSS P9 VDD P8 CS/NC J1 P7 P6 TSSOP-20 and SSOP-20 Eval. Bd. P5 P4 P3 P2 P1 Required "Jumpers" for PICkit Serial operation. Note: VDD, VSS are connected to appropriate signal plane.

FIGURE 2-7: PICkit Serial / ICSP Header and Example Connections (for MCP4361).

TABLE 2-4: SUPPORTED DIGITAL POTENTIOMETERS

Device TSSOP SSOP	Comment
MCP4331 Yes—
MCP4332 Yes—
MCP4341 Yes—
MCP4342 Yes—
MCP4351 Yes—
MCP4352 Yes—
MCP4361 Yes—
MCP4362 Yes—
MCP4231 Yes— 14-pin TSSOP
MCP4241 Yes— 14-pin TSSOP
MCP4251 Yes— 14-pin TSSOP
MCP4261 Yes— 14-pin TSSOP
MCP4631 Yes— 14-pin TSSOP
MCP4641 Yes— 14-pin TSSOP
MCP4651 Yes— 14-pin TSSOP
MCP4661 Yes— 14-pin TSSOP

2.4.7 Evaluating the PIC24F16KA101 Device (nanoWatt XLP PIC Microcontroller)

The PIC24F16KA101 is a nanoWatt XLP PIC Microcontroller that is offered in a 20-lead SSOP package. This device can be installed on the bottom side of the PCB. Figure 2-8 shows the PIC24F16KA101's pin out, while Figure 2-9 shows an example connection for the ICSP interface and the connection of the crystal circuit to the secondary oscillator.

Other nanoWatt XLP PIC Microcontrollers that are supported by this evaluation board are shown in Table 2-5.

PIC24F16KA101

MCLR/VPP/RA5 PGC2/AN0/VREF+/CN2/RA0 PGD2/AN1/VREF-/CN3/RA1 PGD1/AN2/C1IND/C2INB/U2TX/CN4/RB0 PGC1/AN3/C1INC/C2INA/U2RX/U2BCLK/CN5/RB1 U1RX/U1BCLK/CN6/RB2 OSCI/CLKI/AN4/C1INB/C2IND/CN30/RA2 OSCO/CLKO/AN5/C1INA/C2INC/CN29/RA3 PGD3/SOSCI/U2RTS/CN1/RB4 PGC3/SOSCO/T1CK/U2CTS/CN0/RA4 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VDD VSS REFO/SS1/T2CK/T3CK/CN11/RB15 AN10/CVREF/RTCC/SDI1/OCFA/C1OUT/INT1/CN12/RB14 AN11/SDO1/CTPLS/CN13/RB13 AN12/HLVDIN/SCK1/CTED2/CN14/RB12 OC1/IC1/C2OUT/INT2/CTED1/CN8/RA6 U1RTS/SDA1/CN21/RB9 U1CTS/SCL1/CN22/RB8 U1TX/INT0/CN23/RB7

FIGURE 2-8: PIC24F16KA101 Pin Out.

Capacitor value dependent on crystal and oscillator mode selected. LVP PGC PCD VSS VDD VPP J1 104-00272-R1 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 “Jumpers” for ICSP operation. Note: LVP signal is not connected and VDD, VSS are connected to appropriate signal plane.

FIGURE 2-9: PIC ICSP Header Example Connections (for PIC24F16KA101).

TABLE 2-5: SUPPORTED NANOWATT XLP PIC MICROCONTROLLERS

Device TSSOP	SSOP Comment
PIC24F16KA101 —	Y	e	s
PIC24F08KA101 —	Y	e	s
PIC24F04KA201 —	Y	e	s
PIC18F13K22 —	Y	e s
PIC18F13K50 —	Y	e s
PIC18F14K22 —	Y	e s
PIC18F14K50 —	Y	e s

NOTES:

Appendix A. Schematic and Layouts

A.1 INTRODUCTION

This appendix contains the schematic and layouts for the 20-Pin TSSOP and SSOP Evaluation Board. Diagrams included in this appendix:

• Board Schematic
• Board Layout – Top Layer and Silk-Screen
• Board Layout – Bottom Layer
• Board Layout – Power Plane
• Board Layout – Ground Plane
• Board Layout – Top Components
• Board Layout – Bottom Silk

A.2 SCHEMATICS AND PCB LAYOUT

Section A.3 “Board Schematic” shows the schematic of the 20-Pin TSSOP and SSOP Evaluation Board.

Section A.4 “Board Layout – Top Layer and Silk-Screen” shows the layout for the top layer of the 20-Pin TSSOP and SSOP Evaluation Board. The layer order is shown in Figure A-1.

Top Layer Ground Layer Power Layer Bottom Layer

FIGURE A-1: Layer Order.

A.3 BOARD SCHEMATIC

A B C D E F REV Revision Notes Date 1 Initial Design 8/07/09 1 2 3 4 MicroCHIP DS: N. Power Draw by: I. Cans: Pin: 13-60272-415N Dip: 1 cd TSSOP-20 and SSOP-20 Eval. Bd. S10 C 103-60272 1 P18 RBU 13-60272 P17 RBU 13-60272 P16 RBU 13-60272 P15 RBU 13-60272 P14 RBU 13-60272 P13 RBU 13-60272 P12 RBU 13-60272 +5V R18U R18U +5V R18U R18U +5V R18U R18U +5V R18U R18U +5V R18U R18U +5V R18U R18U +5V R18U R18U +5V R18U R18U +5V R18U R18U +5S VDDR 13-60272 +5V VDDR 13-60272 +5V VDDR 13-60272 +5V VDDR 13-60272 +5V VDDR 13-60272 +5V VDDR 13-60272 +5V VDDR 13-60272 +5V VDDR +5V VDDR +5V VDDR +5V VDDR +5V VDDR +5V VDDR +5V VDDR +5V VDDR +5V VDDR +5V VDDR +5V VDDR +5V VDDR +5V VDDR +5V VDDR +5V VDDR + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + I B I N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N/A

A.4 BOARD LAYOUT – TOP LAYER AND SILK-SCREEN

VDD PLANE

A.7 BOARD LAYOUT – GROUND PLANE

GND PLANE

A.8 BOARD LAYOUT – TOP COMPONENTS

Qty	Reference Description	Manufacturer Part Number
5	PCB	RoHS Compliant Bare PCB, 20-pin TSSOP and SSOP Evaluation Board	Microchip Technology Inc.	102-00272

Note: No Assembly required on this PCB.

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