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USER MANUAL SY58017U Microchip
■ Guaranteed AC performance over temperature and voltage:
- DC to > 10.7Gbps data throughput
- DC to > 7GHz f MAX (clock)
• < 240ps propagation delay
• < 60ps r t/ t f times
■ Ultra-low crosstalk-induced jitter: < 0.7ps rms
■ Ultra-low jitter design:
• < 1 pMS random jitter
• < 1 Qppdeterministic jitter
• < 1 Qpp total jitter (clock)
■ Unique input termination and V_T pin accepts DC-coupled and AC-coupled inputs (CML, PECL, LVDS)
■ Internal 50Ω output source termination
■ Typical 400mV CML output swing ( R_L = 50 )
■ Power supply 2.5V ±5% or 3.3V ±10%
■ -40^ to +85^ temperature range
■ Available in 16-pin (3mm × 3mm) MLF® package
APPLICATIONS
■ Redundant clock distribution
■ OC-3 to OC-192 SONET/SDH clock/data distribution
■ Loopback
■ Fibre Channel distribution
FUNCTIONAL BLOCK DIAGRAM

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IN0 50Ω V_T0 50Ω /IN0 IN1 50Ω V_T1 50Ω /IN1 SEL (TTL/CMOS) 0 MUX 1 S Q0 /Q0
Precision Edge®
DESCRIPTION
The SY58017U is a 2.5V/3.3V precision, high-speed, 2:1 differential MUX capable of handling clocks up to 7GHz and data up to 10.7Gbps.
The differential input includes Micrel's unique, 3-pin input termination architecture that allows customers to interface to any differential signal (AC- or DC-coupled) as small as 100mV without any level shifting or termination resistor networks in the signal path. The outputs are 50Ω source terminated CML, with extremely fast rise/fall times guaranteed to be less than 60ps.
The SY58017U operates from a 2.5V ±5% supply or a 3.3V ±10% supply and is guaranteed over the full industrial temperature range of -40°C to +85°C. For applications that require LVPECL outputs, consider the SY58018U or SY58019U Multiplexers with LVPECL outputs. The SY58017U is part of Micrel's high-speed, Precision Edge® product line.
All support documentation can be found on Micrel's web site at www.micrel.com.
TYPICAL PERFORMANCE

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10.7Gbps Output Output Swing (100mV/div.) TIME (25ps/div.) (2²³-1 PRBS)Precision Edge and AnyGate are registered trademarks of Micrel, Inc.
MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc.
PACKAGE/ORDERING INFORMATION

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VT0 GND GND VCC 16 15 14 13 IN0 1 12 Q /IN0 2 11 GND IN1 3 10 GND /IN1 4 9 /Q 5 6 7 8 VT1 SEL NC VCC16-Pin MLF ^® (MLF-16)
Ordering Information ^(1)
| Part Number | Package Type | Operating Range Marking | Package Finish | Lead |
| SY58017UMI | MLF-16 | Industrial | 017U | Sn-Pb |
| SY58017UMITR(2) | MLF-16 | Industrial | 017U | Sn-Pb |
| SY58017UMG(3) | MLF-16 | Industrial | 017U with Pb-Free bar-line indicator | Pb-Free NiPdAu |
| SY58017UMGTR(2, 3) | MLF-16 | Industrial | 017U with Pb-Free bar-line indicator | Pb-Free NiPdAu |
Notes:
- Contact factory for die availability. Dice are guaranteed at T_A = 25^ , DC electricals only.
- Tape and Reel.
- Pb-Free package recommended for new designs.
PIN DESCRIPTION
| Pin Number Pin | Name Pin Function | |
| 1, 2 IN0, /IN03, 4 IN1, /IN1 | Differential Input: These input pairs are the differential signal inputs to the device. They accept differential AC- or DC-coupled signals as small as 100mV. Each pin of a pair internally terminates to a V_T pin through 50Ω. Note that these inputs will default to an indeterminate state if left open. Please refer to the “Input Interface Applications” section for more details. | |
| 16, 5 VT0, VT1 | Input Termination | Center-Tap: Each side of the differential input pair terminates to a V T pin. The V_T0 and V_T1 pins provide a center-tap to a termination network for maximum interface flexibility. See “Input Interface Applications” section for more details. |
| 6 SEL This | single-ended TTL | CMOS compatible input selects the inputs to the multiplexer. Note that this input is internally connected to a 25kΩ pull-up resistor and will default to a logic HIGH state if left open. |
| 7 | N | C No connect. |
| 8, 13 | VCC | Positive Power Supply: Bypass with 0.1μF||0.01μF low ESR capacitors. 0.01μF capacitor should be as close to V_CC pin as possible. |
| 12, 9 Q, /Q Differential Outputs | This CML output pair is the output of the device. Normally terminate with 100Ω across Q and /Q. See “Output Interface Applications” section. It is a logic function of the IN0, IN1, and SEL inputs. Please refer to the “Truth Table” for details. | |
| 10, 11, 14, 15 | GND, Exposed Pad | Ground. Ground pins and exposed pad must be connected to the same ground plane. |
TRUTH TABLE
| SEL | Output |
| 0 | IN0 Input Selected |
| 1 | IN1 Input Selected |
Absolute Maximum Ratings ^(1)
Power Supply Voltage ( V_CC ) ..... -0.5V to +4.0V
Input Voltage ( V_IN ) -0.5V to V_CC
CML Output Voltage ( V_OUT )..... V_CC-1.0V to V_CC+0.5V
Termination Current ^(3)
Source or sink current on V_T pin ....±100mA Input Current
Source or sink current on IN, /IN pin ....±50mA Lead Temperature (soldering, 20 sec.) ....260°C Storage Temperature Range ( T_S ) ....-65°C to +150°C
Operating Ratings ^(2)
Power Supply Voltage ( V_CC ) ..... +2.375V to +2.625V ..... +3.0V to +3.6V
Ambient Temperature Range ( T_A ) ..... -40°C to +85°C
Package Thermal Resistance ^(4)
MLF ^ ( _JA ) Still-Air ....60°C/W MLF ^ ( _JB ) Junction-to-Board ....38°C/W
DC ELECTRICAL CHARACTERISTICS ^(5)
T_A = -40^ to 85^ , unless otherwise stated.
| Symbol Parameter Condition Min Typ Max Units | ||||||
| V_CC | Power Supply Voltage V | _CC = 2.5V 2.375 2.5 2.625 V_CC = 3.3V 3.0 3.3 3.6 V | ||||
| I_CC | Power Supply Current | No load, max. V_CC^(6) | 55 | 70 | mA | |
| R_DIFF\_IN | Differential Input Resistance(IN0-to-/IN0, IN1-to-/IN1) | 80 | 100 | 120 | Ω | |
| R_IN | Input Resistance(IN0-to- V_T0 , /IN0-to- V_T0 ,IN1-to- V_T1 , /IN1-to- V_T1 ) | 40 | 50 | 60 | Ω | |
| V_IH | Input HIGH Voltage(IN0, /IN0, IN1, /IN1) | Note 7 | V_CC-1.6 | V_CC | V | |
| V_IL | Input LOW Voltage(IN0, /IN0, IN1, /IN1) | 0 | V_IH-0.1 | V | ||
| V_IN | Input Voltage Swing(IN0, /IN0, IN1, /IN1) | See Figure 1a | 0.1 | 1.7 | V | |
| V_DIFF\_IN | Differential Input Voltage Swing|IN0, /IN0|, |IN1, /IN1| | See Figure 1b | 0.2 | V | ||
| V_T IN | IN to V_T (IN0, /IN0, IN1, /IN1) | 1.28 | V | |||
Notes:
- Permanent device damage may occur if "Absolute Maximum Ratings" are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to "Absolute Maximum Ratings" conditions for extended periods may affect device reliability.
- The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
- Due to the limited drive capability, use for input of the same package only.
- Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential (GND) on the PCB. _JB uses 4-layer _JA in still-air measurement, unless otherwise stated.
- The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
- Includes current through internal 50Ω pull-ups.
- V_IH (min) not lower than 1.2V.
CML OUTPUT DC ELECTRICAL CHARACTERISTICS ^(8)
V_CC = 2.5V ± 5% or 3.3V ± 10% ; T_A = -40^ C to 85^ C ; R_L = 100 across each output pair, or equivalent, unless otherwise stated.
| Symbol Parameter Condition Min Typ Max Units | ||||||
| V_OH | Output HIGH Voltage V | CC-0.020 | V | CC | V | |
| V_OUT | Output Voltage Swing See Figure 1a 325 400 mV | |||||
| V_DIFF\_OUT | Differential Output Voltage Swing See Figure 1b 650 800 mV | |||||
| R_OUT | Output Source Impedance 40 50 60 Ω | |||||
LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS ^(8)
V_CC = 2.5V ± 5% or 3.3V ± 10% ; T_A = -40^ C to 85^ C , unless otherwise stated.
| Symbol Parameter Condition Min Typ Max Units | |||||
| V_IH | Input HIGH Voltage | 2.0 | V | ||
| V_IL | Input LOW Voltage | 0.8 | V | ||
| I_IH | Input HIGH Current | 40 | μA | ||
| I_IL | Input LOW Current | -300 | μA | ||
Note:
- The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
AC ELECTRICAL CHARACTERISTICS ^(9)
V_CC = 2.5V ± 5% or 3.3V ± 10% ; T_A = -40^ C to 85^ C , R_L = 100 across each output pair, or equivalent, unless otherwise stated.
| Symbol Parameter Condition Min Typ Max Units | ||||||
| f_MAX | Maximum Operating Frequency NRZ | Data 10.7 Gbps | ||||
| V_OUT ≥ 200mV Clock 7 GHz | ||||||
| t_pd | Differential Propagation Delay IN-to-Q | 90 160 240 ps | ||||
| SEL-to-Q | 50 180 350 ps | |||||
| t_pd Tempco | Differential Propagation Delay Temperature Coefficient | 75 | fs/°C | |||
| t_SKEW | Input-to-Input Skew | Note 10 | 4 | 15 | ps | |
| Part-to-Part Skew | Note 11 | 100 | ps | |||
| t_JITTER | Data Random Jitter | Note 12 | 1 | ps_rms | ||
| Deterministic Jitter | Note 13 | 10 | ps_p-p | |||
| Clock Cycle-to-Cycle Jitter | Note 14 | 1 | ps_rms | |||
| Total Jitter | Note 15 | 10 | ps_p-p | |||
| Crosstalk-Induced Jitter | Note 16 | 0.7 | ps_rms | |||
| t_r , t_f | Output Rise/Fall Time | 20% to 80%, at full swing | 20 | 40 | 60 | ps |
Notes:
- High-frequency AC parameters are guaranteed by design and characterization.
- Input-to-input skew is the difference in time from and input-to-output in comparison to any other input-to-output. In addition, the input-input skew does not include the output skew.
- Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs.
- RJ is measured with a K28.7 comma detect character pattern, measured at 2.5Gbps/3.2Gbps.
- DJ is measured at 2.5Gbps/3.2Gbps, with both K28.5 and 2^23-1 PRBS pattern.
- Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, T_n - T_n-1 where T is the time between rising edges of the output signal.
- Total jitter definition: with an ideal clock input of frequency ≤ f_MAX , no more than one output edge in 10^12 output edges will deviate by more than the specified peak-to-peak jitter value.
- Crosstalk is measured at the output while applying two similar frequencies that are asynchronous with respect to each other at the inputs.
SINGLE-ENDED AND DIFFERENTIAL SWINGS

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V_{IN}, \nV_{OUT} 400mV (Typ.)Figure 1a. Single-Ended Voltage Swing

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VDIFF_IN VDIFF_OUT 800mV (Typ.)Figure 1b. Differential Voltage Swing
TIMING DIAGRAMS

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IN0 /IN0 Q /Q t_pd SEL t_pd Q /Q t_pdTYPICAL OPERATING CHARACTERISTICS
V_CC = 2.5V, V_IN = 100mV, T_A = 25^ , unless otherwise stated.

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| Time (600ps/div.) | Output Swing (100mV/div.) | | ----------------- | ------------------------- | | 0 | 0 | | 600 | 0 | | 1200 | 0 | | 1800 | 0 | | 2400 | 0 | | 3000 | 0 | | 3600 | 0 | | 4200 | 0 | | 4800 | 0 | | 5400 | 0 | | 600 | 0 | | 660 | 0 | | 720 | 0 | | 780 | 0 | | 840 | 0 | | 900 | 0 | | 960 | 0 | | 1020 | 0 | | 1080 | 0 | | 1140 | 0 | | 1200 | 0 | | 1260 | 0 | | 1320 | 0 | | 1380 | 0 | | 1440 | 0 | | 1500 | 0 | | 1560 | 0 | | 1620 | 0 | | 1680 | 0 | | 1740 | 0 | | 1800 | 0 | | 1860 | 0 | | 1920 | 0 | | 1980 | 0 | | 2040 | 0 | | 2100 | 0 | | 2160 | 0 | | 2220 | 0 | | 2280 | 0 | | 2340 | 0 | | 2400 | 0 | | 2460 | 0 | | 2520 | 0 | | 2580 | 0 | | 2640 | 0 | | 2700 | 0 | | 2760 | 0 | | 2820 | 0 | | 2880 | 0 | | 2940 | 0 | | 3000 | 0 | | 3060 | 0 | | 3120 | 0 | | 3180 | 0 | | 3240 | 0 | | 3300 | 0 | | 3360 | 0 | | 3420 | 0 | | 3480 | 0 | | 3540 | 0 | | 3600 | 0 | | 3660 | 0 | | 3720 | 0 | | 3780 | 0 | | 3840 | 0 | | 3900 | 0 | | 3960 | 0 | | 4020 | 0 | | 4080 | 0 | | 4140 | 0 | | 4200 | 0 | | 4260 | 0 | | 4320 | 0 | | 4380 | 0 | | 4440 | 0 | | 4500 | 0 | | 4560 | 0 | | 4620 | 0 | | 4680 | 0 | | 4740 | 0 | | 4800 | 0 | | 4860 | 0 | | 4920 | 0 | | 4980 | 0 | | | |
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| TIME (100ps/div.) | Output Swing (100mV/div.) | | ----------------- | ------------------------- | | 0 | 0 | | 1 | 0 | | 2 | 0 | | 3 | 0 | | 4 | 0 | | 5 | 0 | | 6 | 0 | | 7 | 0 | | 8 | 0 | | 9 | 0 | | 10 | 0 | | 11 | 0 | | 12 | 0 | | 13 | 0 | | 14 | 0 | | 15 | 0 | | 16 | 0 | | 17 | 0 | | 18 | 0 | | 19 | 0 | | 20 | 0 | | 21 | 0 | | 22 | 0 | | 23 | 0 | | 24 | 0 | | 25 | 0 | | 26 | 0 | | 27 | 0 | | 28 | 0 | | 29 | 0 | | 30 | 0 | | 31 | 0 | | 32 | 0 | | 33 | 0 | | 34 | 0 | | 35 | 0 | | 36 | 0 | | 37 | 0 | | 38 | 0 | | 39 | 0 | | 40 | 0 | | 41 | 0 | | 42 | 0 | | 43 | 0 | | 44 | 0 | | 45 | 0 | | 46 | 0 | | 47 | 0 | | 48 | 0 | | 49 | 0 | | 50 | 0 | | 51 | 0 | | 52 | 0 | | 53 | 0 | | 54 | 0 | | 55 | 0 | | 56 | 0 | | 57 | 0 | | 58 | 0 | | 59 | 0 | | 60 | 0 | | 61 | 0 | | 62 | 0 | | 63 | 0 | | 64 | 0 | | 65 | 0 | | 66 | 0 | | 67 | 0 | | 68 | 0 | | 69 | 0 | | 70 | 0 | | 71 | 0 | | 72 | 0 | | 73 | 0 | | 74 | 0 | | 75 | 0 | | 76 | 0 | | 77 | 0 | | 78 | 0 | | 79 | 0 | | 80 | 0 | | 81 | 0 | | 82 | 0 | | 83 | 0 | | 84 | 0 | | 85 | 0 | | 86 | 0 | | 87 | 0 | | 88 | 0 | | 89 | 0 | | 90 | 0 | | 91 | 0 | | 92 | 0 | | 93 | 0 | | 94 | 0 | | 95 | 0 | | 96 | 0 | | 97 | 0 | | 98 | 0 | | 99 | 0 | | Note: The actual output values are not provided in the code. The code generates a waveform of '2.5Gbps Output' with a specified parameter '2²³⁻¹ PRBS'.
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| Time (50ps/div.) | Output Swing (100mV/div.) | | ---------------- | ------------------------- | | 0 | 0 | | 1 | 1 | | 2 | 0 | | 3 | -1 | | 4 | 0 | | 5 | 1 | | 6 | 0 | | 7 | -1 | | 8 | 0 | | 9 | 1 | | 10 | 0 | | 11 | -1 | | 12 | 0 | | 13 | 1 | | 14 | 0 | | 15 | -1 | | 16 | 0 | | 17 | 1 | | 18 | 0 | | 19 | -1 | | 20 | 0 | | 21 | 1 | | 22 | 0 | | 23 | -1 | | 24 | 0 | | 25 | 1 | | 26 | 0 | | 27 | -1 | | 28 | 0 | | 29 | 1 | | 30 | 0 | | 31 | -1 | | 32 | 0 | | 33 | 1 | | 34 | 0 | | 35 | -1 | | 36 | 0 | | 37 | 1 | | 38 | 0 | | 39 | -1 | | 40 | 0 | | 41 | 1 | | 42 | 0 | | 43 | -1 | | 44 | 0 | | 45 | 1 | | 46 | 0 | | 47 | -1 | | 48 | 0 | | 49 | 1 | | 50 | 0 | | 51 | -1 | | 52 | 0 | | 53 | 1 | | 54 | 0 | | 55 | -1 | | 56 | 0 | | 57 | 1 | | 58 | 0 | | 59 | -1 | | 60 | 0 | | 61 | 1 | | 62 | 0 | | 63 | -1 | | 64 | 0 | | 65 | 1 | | 66 | 0 | | 67 | -1 | | 68 | 0 | | 69 | 1 | | 70 | 0 | | 71 | -1 | | 72 | 0 | | 73 | 1 | | 74 | 0 | | 75 | -1 | | 76 | 0 | | 77 | 1 | | 78 | 0 | | 79 | -1 | | 80 | 0 | | Note: The data is extracted from the image file in the code. The output values are not explicitly provided in the code. The labels for the output wave 'Output Swing' and 'TIME' are estimated based on the given parameters. There is no additional data series in this code. The output wave is labeled as '2²³⁻¹ PRBS'.
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| Time (50ps/div.) | Output Swing (100mV/div.) | | ---------------- | ------------------------- | | 0 | 0 | | 50 | 0 | | 100 | 0 | | 150 | 0 | | 200 | 0 | | 250 | 0 | | 300 | 0 | | 350 | 0 | | 400 | 0 | | 450 | 0 | | 500 | 0 | | 550 | 0 | | 600 | 0 | | 650 | 0 | | 700 | 0 | | 750 | 0 | | 800 | 0 | | 850 | 0 | | 900 | 0 | | 950 | 0 | | 1000 | 0 |
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10.7Gbps Output Output Swing (100mV/div.) TIME (25ps/div.) (2²³-1 PRBS)TYPICAL OPERATING CHARACTERISTICS
V_CC = 2.5V, V_IN = 100mV, T_A = 25^ , unless otherwise stated.
Propagation Delay vs. Temperature

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| TEMPERATURE (°C) | PROPAGATION DELAY (ps) | | ---------------- | ---------------------- | | -40 | 160 | | 0 | 163 | | 20 | 164 | | 40 | 165 | | 60 | 166 | | 80 | 167 | | 100 | 167 | | 120 | 168 |Propagation Delay
. Input Voltage Swir

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| INPUT VOLTAGE SWING (mV) | PROPAGATION DELAY (ps) | | ------------------------ | ---------------------- | | 100 | 165.5 | | 200 | 165.0 | | 300 | 164.5 | | 400 | 164.0 | | 500 | 163.5 | | 600 | 163.0 | | 700 | 162.5 | | 800 | 162.0 |Output Amplitude vs. Frequency

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| FREQUENCY (GHz) | OUTPUT AMPLITUDE (mV) | | --------------- | --------------------- | | 0 | 450 | | 1 | 440 | | 2 | 430 | | 3 | 420 | | 4 | 410 | | 5 | 400 | | 6 | 380 | | 7 | 320 | | 8 | 250 | | 9 | 150 |INPUT AND OUTPUT STAGES

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Vcc IN 50Ω VT 50Ω /IN GNDFigure 2a. Simplified Differential Input Stage

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Vcc 50Ω50Ω /Q Q GNDFigure 2b. Simplified CML Output Stage
INPUT INTERFACE APPLICATIONS

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Vcc CML GND IN IN SY58017U NC VT (Option: May connect VT to Vcc)Figure 3a. DC-Coupled CML Interface

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VCC CML IN /IN GND SY58017U VCC -1.4V VTFigure 3b. AC-Coupled CML Interface

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VCC PECL IN /IN GND SY58017U VCC 0.01μF Rpd VT For VCC = 3.3V, Rpe = 50Ω For VCC = 2.5V, Rpe = 19ΩFigure 3c. DC-Coupled PECL Interface

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Vcc PECL IN Rpd Rpd GND Vcc-1.4V VT For 3.3V, Rpd= 100Ω For 2.5V, Rpd= 50Ω SY58017UFigure 3d. AC-Coupled PECL Interface

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Vcc LVDS IN /IN GND SY58017U NC VtFigure 3e. LVDS Interface
OUTPUT INTERFACE APPLICATIONS

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Vcc 50Ω 50Ω /Q 100Ω Q GNDFigure 4a. CML DC-Coupled Termination

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VCC 50Ω /Q 50Ω 50Ω VCC 50Ω Q GNDFigure 4b. CML DC-Coupled Termination

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VCC 50Ω 50Ω /Q Q GND 50Ω DC-bias per application 50ΩFigure 5. CML AC-Coupled Termination
RELATED MICREL PRODUCTS AND SUPPORT DOCUMENTATION
| Part Number Function Data Sheet Link | ||
| SY58016L 3.3V | 10Gbps Differential CML Line Driver/Receiver http://www.with Internal I/O Termination | .micrel.com/product-info/products/sy58016l.shtml |
| SY58018U Ultra | Precision Differential LVPECL 2:1 Mux with http://www.Internal Termination | .micrel.com/product-info/products/sy58018u.shtml |
| SY58019U Ultra | Precision Differential 400mV LVPECL http://www.mix2:1 MUX with Internal Termination | .com/product-info/products/sy58019u.shtml |
| SY58025U 10.7Gbps Dual 2:1 CML MUX with Internal http://www.mixI/O Termination | .com/product-info/products/sy58025u.shtml | |
| SY58026U 5Gbps Dual 2:1 MUX with Internal Termination http://www.mixInternal Termination | .com/product-info/products/sy58026u.shtml | |
| SY58027U 10.7Gbps Dual 2:1 400mV LVPECL Mux with http://www.mixInternal Termination | .com/product-info/products/sy58027u.shtml | |
| SY58051U 10.7Gbps AnyGate® with Internal Input and Output http://www.Termination | //www.micrel.com/product-info/products/sy58051u.shtml | |
| SY58052U | 10Gbps Clock/Data Retimer with 50Ω Input Termination | http://www.micrel.com/product-info/products/sy58052u.shtml |
| MLFTM Application Note www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf | ||
| HBW Solutions | New Products and Applications www.micrel.com/product-info/products/solutions.shtml | |
16-PIN MicroLeadFrame® (MLF-16)

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Pin 1 Dot By Marking 3.000±0.050 3.000±0.050TOP VIEW

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1.550±0.050 Exp. DAP PIN #1 IDENTIFICATION CHAMFER 0.300 X 45° 0.400±0.050 0.500 Bsc 1.550±0.050 Exp. DAP 0.230±0.050 0.400±0.050 1.500 Ref.BOTTOM VIEW

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0.850±0.050 0.000-0.050 0.203±0.025SIDE VIEW
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS.
2. MAX. PACKAGE WARPAGE IS 0.05 mm.
3. MAXIMUM ALLOWABE BURRS IS 0.076 mm IN ALL DIRECTIONS.
4. PIN #1 ID ON TOP WILL BE LASER/INK MARKED.

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Package EP: Exposed Pad Dia CompSide Island Heat Dissipation Heat Dissipation Heavy Copper Plane V_EF V_LLPCB Thermal Consideration for 16-Pin MLF® Package (Always solder, or equivalent, the exposed pad to the PCB)
Package Notes:
- Package meets Level 2 qualification.
- All parts are dry-packaged before shipment.
- Exposed pads must be soldered to a ground for proper thermal management.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.