MIC5321 - Electronic component Microchip - Free user manual and instructions

USER MANUAL MIC5321 Microchip

High-Performance, Dual 150 mA μCap Ultra-Low Dropout Regulator

Features

• 2.3V to 5.5V Input Voltage Range
• Ultra-Low Dropout Voltage 35 mV @ 150 mA
- Tiny 6-Pin 1.6 mm x 1.6 mm Thin UDFN Leadless Package
- Low Cost 6-Lead TSOT-23 Package
- Bypass Pin for Improved Noise Performance
• High PSRR: >75 dB on Each LDO
• Ultra-Low Noise Output: >30 μV RMS
• Dual 150 mA Outputs
- Cap Stable with 1 F Ceramic Capacitor
• Low Quiescent Current: 150 μA
- Fast Turn-On Time: 45 μs
• Thermal Shutdown Protection
- Current Limit Protection

Applications

• Mobile Phones
• PDAs
• GPS Receivers
• Portable Electronics
• Portable Media Players
  • Digital Still and Video Cameras

General Description

The MIC5321 is a tiny, dual ultra-low dropout linear regulator ideally suited for applications that require high PSRR because it provides a bypass pin for those noise sensitive portable electronics. The MIC5321 integrates two high-performance 150 mA ULDOs into a very compact 1.6 mm x 1.6 mm leadless UDFN package that provides exceptional thermal package characteristics.

The MIC5321 is a Cap design that enables operation with very small ceramic output capacitors for stability, thereby reducing required board space and component cost. The combination of extremely low dropout voltage, very high power supply rejection, very low output noise, and exceptional thermal package characteristics makes it ideal for powering RF application, cellular phone camera modules, imaging sensors for digital still cameras, PDAs, MP3 players and WebCam applications.

The MIC5321 is available in fixed-output voltages in the tiny 6-pin 1.6 mm x 1.6 mm leadless UDFN package, which is only 2.56 mm ^2 in area, less than 30% the area of the SOT-23 and TSOP 3x3 packages. It's also available in the thin SOT-23 6-lead package and the standard size 6-pin 1.6 mm x 1.6 mm leadless WDFN package. Additional voltage options are available. For more information, contact Microchip.

Package Types

MIC5321
6-Pin 1.6 mm x 1.6 mm UDFN (MT)/WDFN (ML) (Top View)

VIN [1] D [6] VOUT1 GND [2] [5] VOUT2 BYP [3] [4] EN

MIC5321
6-Lead SOT-23 (D6) (Top View)

VIN GND BYP 3 2 1 VOUT1 VOUT2 EN

Typical Application Circuit

RF Power Supply Circuit MIC5321-x.xYML VIN VOUT 1 VOUT 2 EN BYP GND 1µF 0.01µF Rx/Synth Tx 1µF 1µF RF Transceiver

Functional Block Diagram

graph TD
    VIN --> LDO1
    EN --> Enable
    BYP --> Reference
    LDO1 --> VOUT1
    LDO2 --> VOUT2
    Enable --> LDO1
    Enable --> LDO2
    Reference --> GND

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings †

Supply Input Voltage ( V_IN )	0V to +6V
Enable Input Voltage ( V_EN )	0V to +6V
Power Dissipation ( P_D ) Note 1	Internally Limited
ESD Rating (Note 2)	2 kV

Operating Ratings ‡

Supply Input Voltage ( V_IN )	+2.3V to +5.5V
Enable Input Voltage ( V_EN )	0V to V_IN

† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability.

‡ Notice: The device is not guaranteed to function outside its operating ratings.

Note 1: The maximum allowable power dissipation at any T_A (ambient temperature) is P_D(MAX) = (T_J(MAX) - T_A)/_JA . Exceeding the maximum allowable power dissipation will result in excessive die temperature, and the regulator will go into thermal shutdown.
2: Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5 kΩ in series with 100 pF.

ELECTRICAL CHARACTERISTICS

Electrical Characteristics: V_IN = EN = V_OUT + 1.0V ; higher of the two regulator outputs, I_OUTLDO1 = I_OUTLDO2 = 100 A ; C_OUT1 = C_OUT2 = 1 F ; C_BYP = 0.01 F ; T_J = 25^ , bold values valid for -40^ ≤ T_J ≤ +125^ , unless noted. (Note 1)

Parameter Symbol Min. Typ. Max. Units				Conditions
Output Voltage Accuracy	V_OUT	-2.0	—	2.0	%	Variation from nominal V_OUT
		-3.0	—	3.0		Variation from nominal V_OUT ; -40°C to +125°C
Line Regulation	V_OUT/(V_OUT × V_IN)	—	0.02	0.3	%/V	V_IN=V_OUT+1V to 5.5V; I_OUT=100 μA
		—	—	0.6
Load Regulation	V_OUT/V_OUT	—	0.5	2.0	% I	I_OUT=100 μA to 150 mA
Dropout Voltage (Note 2)	V_DO	—	0.1	—	mV	I_OUT=100 μA
		—	12	50		I_OUT=50 mA
		—	25	75		I_OUT=100 mA
		—	35	100		I_OUT=150 mA
Ground Current	I_GND	—	150	190	μA	EN = High; I_OUT1=150 mA, I_OUT2=150 mA
Ground Current in Shutdown	I_SHDN	—	0.01	2	μA	EN1 ≤ 0.2V
Ripple Rejection	PSRR	—	75	—	dB	f = 1 kHz; C_OUT=1.0 μF; C_BYP=0.1 μF
		—	45	—		f = 20 kHz; C_OUT=1.0 μF; C_BYP=0.1 μF
Current Limit	I_LIM	300	550	950	mA	V_OUT=0V
Output Voltage Noise	e_N	—	30	— μV	RMS	C_OUT=1.0 μF; C_BYP=0.01 μF; 10 Hz to 100 kHz

ELECTRICAL CHARACTERISTICS (CONTINUED)

Electrical Characteristics: V_IN = EN = V_OUT + 1.0V ; higher of the two regulator outputs, I_OUTLDO1 = I_OUTLDO2 = 100 A ; C_OUT1 = C_OUT2 = 1 F ; C_BYP = 0.01 F ; T_J = 25^ , bold values valid for -40^ ≤ T_J ≤ +125^ , unless noted. (Note 1)

Parameter	Symbol	Min.	Typ.	Max.	Units	Conditions
Enable Inputs (EN)
Enable Input Voltage	V_IL	— —	0.2		V	Logic Low
	V_IH	1.1 —	— Logic	High
Enable Input Current	I_IL	— 0.0	1 1		μA	V_IL ≤ 0.2V
	I_IH	— 0.0	1 1 V			_IH ≥ 1.0V
Turn-On Time
Turn-On Time(LDO1 and LDO2)	t_ON	— 40	100		μs	C_OUT = 1.0 μF; No C_BYP
		— 45	100 C			_OUT = 1.0 μF; C_BYP = 0.01 μF

Note 1: Specification for packaged product only.
2: Dropout voltage is defined as the input-to-output differential at which the output voltage drops 2% below its nominal V_OUT . For outputs below 2.3V, the dropout voltage is the input-to-output differential with the minimum input voltage 2.3V.

TEMPERATURE SPECIFICATIONS

Parameters	Sym.	Min.	Typ.	Max.	Units	Conditions
Temperature Ranges
Operating Junction Temperature Range	T_J	-40	—	+125	°C	Note 1
Lead Temperature	T_LEAD	—	—	+260 °C	Soldering, 3 sec.
Storage Temperature	T_S	-65 —	+150 °C —
Package Thermal Resistances
Thermal Resistance, UDFN/WDFN 6-Ld	_JA	— 100	—	°C/W —
Thermal Resistance, TSOT-23 6-Ld	_JA	— 235	—	°C/W —

Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., T_A , T_J , _JA ). Exceeding the maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum +125°C rating. Sustained junction temperatures above +125°C can impact the device reliability.

2.0 TYPICAL PERFORMANCE CURVES

Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

FIGURE 2-1: Power Supply Rejection Ratio.

FIGURE 2-4: Ground Current vs. Temperature.

FIGURE 2-2: Dropout Voltage vs. Output Current.

FIGURE 2-5: Ground Current vs. Temperature.

FIGURE 2-3: Output Voltage vs. Temperature.

FIGURE 2-6: Output Voltage vs. Input Voltage.

FIGURE 2-7: Dropout Voltage vs. Temperature.

FIGURE 2-10: Ground Current vs. Output Current.

FIGURE 2-8: Output Voltage vs. Output Current.

FIGURE 2-11: Current Limit vs. Input Voltage.

FIGURE 2-9: Output Voltage vs. Output Current.

FIGURE 2-12: Output Noise Spectral Density.

FIGURE 2-13: Enable Turn-On.

FIGURE 2-14: Load Transient.

FIGURE 2-15: Line Transient.

3.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

Pin Number UDFN/WDFN	Pin Number TSOT	Pin Name Description
1 3 VIN Supply Input.
2 2 GND Ground.
3 1 BYP		Reference Bypass: Connect external 0.01 F to GND to reduce output noise. May be left open.
4 6 EN		Enable Input (both regulators): Active-High Input. Logic High = On; Logic Low = Off; Do not leave floating.
5 5 VOUT2	Regulator Output: LDO2
6 4 VOUT1	Regulator Output: LDO1
HS Pad —	ePAD Exposed heatsink pad connected internally 3rto ground.

4.0 APPLICATION INFORMATION

4.1 Enable/Shutdown

The MIC5321 comes with a single active-high enable pin that allows both regulators to be disabled simultaneously. Forcing the enable pin low disables the regulator and sends it into a "zero" off-mode current state. In this state, current consumed by the regulator goes nearly to zero. Forcing the enable pin high enables the output voltage. The active-high enable pin uses CMOS technology and the enable pin cannot be left floating; a floating enable pin may cause an indeterminate state on the output.

4.2 Input Capacitor

The MIC5321 is a high-performance, high-bandwidth device. Therefore, it requires a well-bypassed input supply for optimal performance. A 1 F capacitor is required from the input to ground to provide stability. Low-ESR ceramic capacitors provide optimal performance at a minimum of space. Additional high-frequency capacitors, such as small-valued NPO dielectric-type capacitors, help filter out high-frequency noise and are good practice in any RF-based circuit.

4.3 Output Capacitor

The MIC5321 requires an output capacitor of 1 F or greater to maintain stability. The design is optimized for use with low-ESR ceramic chip capacitors. High ESR capacitors may cause high frequency oscillation. The output capacitor can be increased, but performance has been optimized for a 1 F ceramic output capacitor and does not improve significantly with larger capacitance.

X7R/X5R dielectric-type ceramic capacitors are recommended because of their temperature performance. X7R-type capacitors change capacitance by 15% over their operating temperature range and are the most stable type of ceramic capacitors. Z5U and Y5V dielectric capacitors change value by as much as 50% and 60%, respectively, over their operating temperature ranges. To use a ceramic chip capacitor with Y5V dielectric, the value must be much higher than an X7R ceramic capacitor to ensure the same minimum capacitance over the equivalent operating temperature range.

4.4 Bypass Capacitor

A capacitor can be placed from the noise bypass pin to ground to reduce output voltage noise. The capacitor bypasses the internal reference. A 0.1 F capacitor is recommended for applications that require low-noise outputs. The bypass capacitor can be increased, further reducing noise and improving PSRR. Turn-on time increases slightly with respect to bypass capacitance. A unique, quick-start circuit allows the MIC5321 to drive a large capacitor on the bypass pin without significantly slowing turn-on time. Refer to the Typical Performance Curves section for performance with different bypass capacitors.

4.5 No-Load Stability

Unlike many other voltage regulators, the MIC5321 will remain stable and in regulation with no load. This is especially important in CMOS RAM keep-alive applications.

4.6 Thermal Considerations

The MIC5321 is designed to provide 150 mA of continuous current for both outputs in a very small package. Maximum ambient operating temperature can be calculated based on the output current and the voltage drop across the part. Given that the input voltage is 3.3V, the output voltage is 2.8V for V_OUT1 , 2.5V for V_OUT2 and the output current equals 150 mA. The actual power dissipation of the regulator circuit can be determined using the equation:

EQUATION 4-1:

$$ P _ {D} = \left(V _ {I N} - V _ {O U T 1}\right) \times I _ {O U T 1} + \left(V _ {I N} - V _ {O U T 2}\right) \times I _ {O U T 2} + \mathbf {J} _ {I N} \times_ {G N D} $$

Because this device is CMOS and the ground current is typically <150 A over the load range, the power dissipation contributed by the ground current is less than 1% and can be ignored for this calculation.

EQUATION 4-2:

$$ P _ {D} = (3. 3 V - 2. 8 V) \times 1 5 0 m A + (3. 3 V - 1. 5 V) \times 1 5 0 m A $$

$$ P _ {D} = 0. 3 4 5 W $$

To determine the maximum ambient operating temperature of the package, use the junction-to-ambient thermal resistance of the device and the following basic equation:

EQUATION 4-3:

$$ P _ {D (M A X)} = \frac {T _ {J (M A X)} - T _ {A}}{\theta_ {J A}} $$

Where:

T_J(MAX) = 125^ , the max. junction temp. of the die. _JA = Thermal resistance of 100^/W.

The table below shows the junction-to-ambient thermal resistance for the UDFN package option.

Package	_JA Rec. Min. Footprint	_JC
6-Lead UDFN	100°C/W	2°C/W

Substituting P_D for P_D(MAX) and solving for the ambient operating temperature will give the maximum operating conditions for the regulator circuit. The junction-to-ambient thermal resistance for the minimum footprint is 100^/W .

The maximum power dissipation must not be exceeded for proper operation.

For example, when operating the MIC5321-MFYMT at an input voltage of 3.3V and 150 mA loads at each output with a minimum footprint layout, the maximum ambient operating temperature T_A can be determined as follows:

EQUATION 4-4:

$$ 0. 3 4 5 W \text { 125°C } T - _ {A}) / (1 0 0 ^ {\circ} \mathrm{C/W}) $$

$$ T _ {A} = 9 0. 5 ^ {\circ} C $$

Therefore, a 2.8V/1.5V application with 150 mA at each output current can accept an ambient operating temperature of 90.5°C in a 1.6 mm x 1.6 mm UDFN package. For a full discussion of heat sinking and thermal effects on voltage regulators, refer to the "Regulator Thermals" section of Microchip's Designing with Low-Dropout Voltage Regulators handbook.

5.0 PACKAGING INFORMATION

5.1 Package Marking Information

6-Lead UDFN*

Example

6-Lead TSOT-23 ^* (Front)

Example

6-Lead WDFN*

Example

6-Lead TSOT-23 ^* (Back)

Example

Note: MIC5321 has many voltage options and corresponding marking codes. The full list of them appear in Table 5-1 on the next page.

Legend: XX...X Product code or customer-specific information

Y Year code (last digit of calendar year)

YY Year code (last 2 digits of calendar year)

WW Week code (week of January 1 is week '01')

NNN Alphanumeric traceability code

e3 Pb-free JEDEC® designator for Matte Tin (Sn)

This package is Pb-free. The Pb-free JEDEC designator (e3)

can be found on the outer packaging for this package.

•, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle mark).

Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo.

Underbar (_) symbol may not be to scale.

Note: If the full seven-character YYWWNNN code cannot fit on the package, the following truncated codes are used based on the available marking space:

6 Characters = YWWNNN; 5 Characters = WWNNN; 4 Characters = WNNN; 3 Characters = NNN;

2 Characters = NN; 1 Character = N

TABLE 5-1: MIC5321 PACKAGE MARKING CODES

Part Number Marking	Voltage Package
MIC5321-GFYMT BGF	1.8V/1.5V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-GGYMT BGG	1.8V/1.8V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-GWYMT BGW	1.8V/1.6V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-JGYMT BJG	2.5V/1.8V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-JJYMT	BJJ	2.5V/2.5V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-KDYMT	BKD	2.6V/1.85V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-KGYMT	BKG	2.6V/1.8V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-LLYMT	BLL	2.7V/2.7V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-MFYMT	BMF	2.8V/1.5V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-MGYMT	BMG	2.8V/1.8V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-MKYMT	BMK	2.8V/2.6V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-MMYMT	BMM	2.8V/2.8V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-NDYMT	BND	2.85V/1.85V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-NKYMT	BNK	2.85V/2.6V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-NNYMT	BNN	2.85V/2.85V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-OFYMT BOF	2.9V/1.5V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-OGYMT BOG	2.9V/1.8V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-OOYMT BOO	2.9V/2.9V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-PGYMT	BPG	3.0V/1.8V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-PJYMT	BPJ	3.0V/2.5V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-PKYMT BPK	3.0V/2.6V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-PMYMT	BPM	3.0V/2.8V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-PNYMT	BPN	3.0V/2.85V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-PPYMT BPP	3.0V/3.0V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-SFYMT BSF	3.3V/1.5V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-SGYMT	BSG	3.3V/1.8V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-SJYMT	BSJ	3.3V/2.5V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-SKYMT BSK	3.3V/2.6V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-SLYMT***	BSL	3.3V/2.7V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-SMYMT	BSM	3.3V/2.8V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-SNYMT	BSN	3.3V/2.85V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-SOYMT	BSO	3.3V/2.9V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-SPYMT BSP	3.3V/3.0V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-SRYMT	BSR	3.3V/3.2V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-SSYMT BSS	3.3V/3.3V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-MFYML	BMF	2.8V/1.5V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-MGYML	BM G	2.8V/1.8V 6-Lead 1.6	mm x 1.6 mm UDFN
MIC5321-MMYML	BM M	2.8V/2.8V	6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-PPYML BP	P 3.0V/3.0V 6-Lead 1.6 mm x 1.6 mm UDFN
MIC5321-GFYD6 QB	GF	1.8V/1.5V	6-Lead 1.6 mm x 1.6 mm WDFN
MIC5321-GGYD6	QBGG	1.8V/1.8V	6-Lead 1.6 mm x 1.6 mm WDFN
MIC5321-GWYD6***	QBGW	1.8V/1.6V	6-Lead 1.6 mm x 1.6 mm WDFN
MIC5321-JGYD6***	QBJG	2.5V/1.8V	6-Lead 1.6 mm x 1.6 mm WDFN
MIC5321-JJYD6***	QBJJ	2.5V/2.5V	6-Lead 1.6 mm x 1.6 mm WDFN

TABLE 5-1: MIC5321 PACKAGE MARKING CODES (CONTINUED)

Part Number	Marking Voltage	Package
MIC5321-KDYD6*** QBKD 2.6V/1.85V 6-Lead	TSOT-23
MIC5321-KGYD6*** QB	__KG 2.6V/1.8V 6-Lead TSOT-23
MIC5321-LLYD6 QB	__LL 2.7V/2.7V 6-Lead TSOT-23
MIC5321-MFYD6 QB	__MF 2.8V/1.5V 6-Lead TSOT-23
MIC5321-MGYD6 QB	__MG 2.8V/1.8V 6-Lead TSOT-23
MIC5321-MKYD6 QB	__MK 2.8V/2.6V 6-Lead TSOT-23
MIC5321-MMYD6	QBMM	2.8V/2.8V 6-Lead TSOT-23
MIC5321-NDYD6*** QB	__ND	2.85V/1.85V 6-Lead TSOT-23
MIC5321-NKYD6*** QB	__NK 2.85V/2.6V 6-Lead TSOT-23
MIC5321-NNYD6*** QB	__NN	2.85V/2.85V 6-Lead TSOT-23
MIC5321-OFYD6*** QB	__OF	2.9V/1.5V 6-Lead TSOT-23
MIC5321-OGYD6***	QBOG 2.9V/1.8V 6-Lead TSOT-23
MIC5321-OOYD6***	QBOO 2.9V/2.9V 6-Lead TSOT-23
MIC5321-PGYD6 QB	__PG 3.0V/1.8V 6-Lead TSOT-23
MIC5321-PJYD6***	QB PJ 3.0V/2.5V 6-Lead TSOT-23
MIC5321-PKYD6***	QBPK	3.0V/2.6V 6-Lead TSOT-23
MIC5321-PMYD6***	QBPM 3.0V/2.8V 6-Lead TSOT-23
MIC5321-PNYD6*** QB	__PN 3.0V/2.85V 6-Lead TSOT-23
MIC5321-PPYD6	QBPP	3.0V/3.0V 6-Lead TSOT-23
MIC5321-SFYD6***	QBSF	3.3V/1.5V 6-Lead TSOT-23
MIC5321-SGYD6*** QB	__SG 3.3V/1.8V 6-Lead TSOT-23
MIC5321-SJYD6	QBSJ 3.3V/2.5V 6-Lead TSOT-23
MIC5321-SKYD6***	QBSK	3.3V/2.6V 6-Lead TSOT-23
MIC5321-SLYD6***	QBSL	3.3V/2.7V 6-Lead TSOT-23
MIC5321-SMYD6***	QBSM 3.3V/2.8V 6-Lead TSOT-23
MIC5321-SNYD6*** QB	__SN 3.3V/2.85V 6-Lead TSOT-23
MIC5321-SOYD6*** QB	__SO 3.3V/2.9V 6-Lead TSOT-23
MIC5321-SPYD6***	QBSP	3.3V/3.0V 6-Lead TSOT-23
MIC5321-SRYD6*** QB	__SR	3.3V/3.2V 6-Lead TSOT-23
MIC5321-SSYD6	QBSS	3.3V/3.3V 6-Lead TSOT-23

6-Lead 1.6 mm x 1.6 mm UDFN Package Outline and Recommended Land Pattern

6-Lead Ultra Thin Plastic Dual Flat, No Lead (HKA) - 1.6x1.6x0.6 mm Body [UDFN] With 1.26x0.50 mm Exposed Pad; Micrel Legacy Package TDFN1616-6LD-PL-1

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

(DATUM A) (DATUM B) NOTE1 2X 0.05 C 2X 0.05 C N E A B E 1 2 TOP VIEW

SEATING PLANE A C A1 (A3) SIDE VIEW // 0.05 C 6X 0.08 C

NOTE 1 D2 1 2 E2 K 0.20 L N 6X b e BOTTOM VIEW ⊕ 0.05M C A B ⊕ 0.05M C A B ⊕ 0.07M C A B ⊕ 0.04M C

Microchip Technology Drawing C04-1154 Rev A Sheet 1 of 2

6-Lead Ultra Thin Plastic Dual Flat, No Lead (HKA) - 1.6x1.6x0.6 mm Body [UDFN] With 1.26x0.50 mm Exposed Pad; Micrel Legacy Package TDFN1616-6LD-PL-1

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

Isometric line drawing of two electronic components with slots and top tabs (no text or symbols)

Units		MILLIMETERS
Dimension Limits		MIN	NOM	MAX
Number of Terminals	N	6
Pitch	e	0.50 BSC
Overall Height	A	0.50	0.55	0.60
Standoff	A1	0.00	0.02	0.05
Terminal Thickness	A3	0.152 REF
Overall Length	D	1.60 BSC
Exposed Pad Length	D2	1.21	1.26	1.31
Overall Width	E	1.60 BSC
Exposed Pad Width	E2	0.45	0.50	0.55
Terminal Width	b	0.20	0.25	0.30
Terminal Length	L	0.30	0.35	0.40
Terminal-to-Exposed-Pad	K	0.20	-	-

Notes:

1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only.

Microchip Technology Drawing C04-1154 Rev A Sheet 2 of 2

6-Lead Ultra Thin Plastic Dual Flat, No Lead (HKA) - 1.6x1.6x0.6 mm Body [UDFN] With 1.26x0.50 mm Exposed Pad; Micrel Legacy Package TDFN1616-6LD-PL-1

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

X2 G2 6 G1 C Y2 Y1 SILK SCREEN E 2 X1

RECOMMENDED LAND PATTERN

Units		MILLIMETERS
Dimension Limits		MIN	NOM	MAX
Contact Pitch	E	0.50 BSC
Center Pad Width	X2			1.30
Center Pad Length	Y2			0.55
Contact Pad Spacing	C		1.70
Contact Pad Width (X6)	X1			0.30
Contact Pad Length (X6)	Y1			0.65
Contact Pad to Center Pad (X6)	G1	0.25
Contact Pad to Contact Pad (X4)	G2	0.20

Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.

Microchip Technology Drawing C04-3154 Rev A

6-Lead 1.6 mm x 1.6 mm WDFN Package Outline and Recommended Land Pattern

6-Lead Very, Very Thin Dual Flat, No Lead Package (K3A) - 1.6x1.6x0.8 mm Body [WDFN] With 1.26x0.5 mm Exposed Pad; Micrel Legacy Package Code DFN1616-6LD-PL-1

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

Sheet 1 of 2Micr

6-Lead Very, Very Thin Dual Flat, No Lead Package (K3A) - 1.6x1.6x0.8 mm Body [WDFN] With 1.26x0.5 mm Exposed Pad; Micrel Legacy Package Code DFN1616-6LD-PL-1

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

Isometric line drawing of two electronic components with slots and top tabs (no text or symbols)

Units		MILLIMETERS
Dimension Limits		MIN	NOM	MAX
Number of Terminals	N	6
Pitch	e	0.50 BSC
Overall Height	A	0.70	0.75	0.80
Standoff	A1	0.00	0.02	0.05
Terminal Thickness	A3	0.203 REF
Overall Length	D	1.60 BSC
Exposed Pad Length	D2 1	21	1.26 1.31
Overall Width	E	1.60 BSC
Exposed Pad Width	E2	0.45	0.50	0.55
Terminal Width	b	0.20	0.25	0.30
Terminal Length	L	0.30	0.35	0.40
	K		-

0.20 -Terminal-to-Expos

Notes:

1. Pin 1 visual index feature may vary, but must be located within the hatched area.

2. Package is saw singulated

3. Dimensioning and tolerancing per ASME Y14.5M

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

REF: Reference Dimension, usually without tolerance, for information purposes only.

Microchip Technology Drawing C04-1015 Rev A Sheet 2 of 2

6-Lead Very, Very Thin Dual Flat, No Lead Package (K3A) - 1.6x1.6x0.8 mm Body [WDFN] With 1.26x0.5 mm Exposed Pad; Micrel Legacy Package Code DFN1616-6LD-PL-1

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

X2 G2 N ØV C Y2 G1 Y1 1 2 X1 E SILK SCREEN

RECOMMENDED LAND PATTERN

Units		MILLIMETERS
Dimension Limits		MIN	NOM	MAX
Contact Pitch	E	0.50 BSC
Center Pad Width	X2			1.30
Center Pad Length	Y2			0.30
	C		0
Contact Pad Width (X6)	X1			0.30
Contact Pad Length (X6)	Y1			1.30
Contact Pad to Center Pad (X6)	G1	0.25
Contact Pad to Contact Pad (X4) G2		0.20
Thermal Via Diameter	V		0.30

7.1gnicapS daP tcat

Notes:

1. Dimensioning and tolerancing per ASME Y14.5M

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

1. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process

Microchip Technology Drawing C04-3015 Rev A

6-Lead Thin SOT-23 Package Outline and Recommended Land Pattern

TITLE

6 LEAD TSOT PACKAGE OUTLINE & RECOMMENDED LAND PATTERN

DRAWING # TSOT-6LD-PL-1 UNIT MM

2.90 BSC 0.950 0.950 TYP. TYP. Pin j1 Marking 1.60 BSC 2.80 BSC 0.300(Min) 0.500(Max) (5 PLCS) TOP VIEW NOTES + 3, 6

10" TYP (8 pins) 0.127 TYP. SEE DETAIL. "A"

1.00 Max 0.97-0.03 SEATING PLANS 0.00-0.10 TOP VIEW NOTES: 4, 6

END VIEW NOTES : 2, 4, 6

10°TYP. (2 pics) 0.25 BSC Range Plane DETAIL "A" +4° -0° 0° 0.400 ±0.10

NOTE:

1. Dimensions and tolerances are as per ANSI Y14.5M, 1994.
2. Die is facing up for mold. Die is facing down for trim/form, ie. reverse trim/form.
   3 Dimensions are exclusive of mold flash and gate burr.
3. The footlength measuring is based on the gauge plane method.
4. All specification comply to Jedec Spec M0193 Issue C.
5. All dimensions are in millimeters.

1.90 BSC 0.95 BSC 2.80±0.05 3.83±0.05 1.00±0.02 0.06±0.02

RECOMMENDED LAND PATTERN

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging.

APPENDIX A: REVISION HISTORY

Revision A (May 2022)

• Converted Micrel document MIC5321 to Microchip data sheet DS20006678A.
• Minor text changes throughout.

NOTES:

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.

Part Number
Device
-XX
Output Voltages
X
Temp. Range
XX
Package
-XX
Media Type

Device:

MIC5321: High-Performance, Dual 150 mA μCapUltra-Low Dropout Regulator

GF = 1.8V/1.5V (UDFN & TSOT options only)

GG = 1.8V/1.8V (UDFN & TSOT options only)

GW = 1.8V/1.6V (UDFN & TSOT options only)

JG = 2.5V/1.8V (UDFN & TSOT options only)

JJ = 2.5V/2.5V (UDFN & TSOT options only)

KD = 2.6V/1.85V (UDFN & TSOT options only)

KG = 2.6V/1.8V (UDFN & TSOT options only)

LL = 2.7V/2.7V (UDFN & TSOT options only)

MF = 2.8V/1.5V (All package options)

MG = 2.8V/1.8V (All package options)

MK = 2.8V/2.6V (UDFN & TSOT options only)

MM = 2.8V/2.8V (All package options)

ND = 2.85V/1.85V (UDFN & TSOT options only)

NK = 2.85V/2.6V (UDFN & TSOT options only)

NN = 2.85V/2.85V (UDFN & TSOT options only)

OF = 2.9V/1.5V (UDFN & TSOT options only)

OG = 2.9V/1.8V (UDFN & TSOT options only)

Output Voltages:

OO = 2.9V / 2.9V (UDFN & TSOT options only)

PG = 3.0V/1.8V (UDFN & TSOT options only)

PJ = 3.0V/2.5V (UDFN & TSOT options only)

PK = 3.0V/2.6V (UDFN & TSOT options only)

PM = 3.0V/2.8V (UDFN & TSOT options only)

PN = 3.0V/2.85V (UDFN & TSOT options only)

PP = 3.0V/3.0V (All package options)

SF = 3.3V/1.5V (UDFN & TSOT options only)

SG = 3.3V/1.8V (UDFN & TSOT options only)

SJ = 3.3V/2.5V (UDFN & TSOT options only)

SK = 3.3V/2.6V (UDFN & TSOT options only)

SL = 3.3V/2.7V (UDFN & TSOT options only)

SM = 3.3V/2.8V (UDFN & TSOT options only)

SN = 3.3V/2.85V (UDFN & TSOT options only)

SO = 3.3V/2.9V (UDFN & TSOT options only)

SP = 3.3V/3.0V (UDFN & TSOT options only)

SR = 3.3V/3.2V (UDFN & TSOT options only)

SS = 3.3V/3.3V (UDFN & TSOT options only)

Temperature

Range:

Y = -40°C to +125°C

D6 = 6-Lead Thin SOT-23

ML = 6-Lead 1.6 mm x 1.6 mm WDFN

MT = 6-Lead 1.6 mm x 1.6 mm UDFN

Package:

Media Type:

TR = 3,000/Reel (TSOT-23 option only)

TR = 5,000/Reel (UDFN & WDFN options only)

Examples:

a) MIC5321-GGYMT-TR: MIC5321, 1.8V/1.8V Output

Voltages, -40^ to +125^

Temp. Range, 6-Lead UDFN,

5,000/Reel

b) MIC5321-KGYD6-TR: MIC5321, 2.6V/1.8V Output

Voltages, -40^ to +125^

Temp. Range, 6-Lead TSOT-

23, 3,000/Reel

c) MIC5321-MMYML-TR: MIC5321, 2.8V/2.8V Output

Voltages, -40^ to +125^

Temp. Range, 6-Lead WDFN,

5,000/Reel

d) MIC5321-OFYMT-TR: MIC5321, 2.9V/1.5V Output

Voltages, -40^ to +125^

Temp. Range, 6-Lead UDFN,

5,000/Reel

e) MIC5321-SKYD6-TR: MIC5321, 3.3V/2.6V Output

Voltages, -40^ to +125^

Temp. Range, 6-Lead TSOT-

23, 3,000/Reel

f) MIC5321-PPYML-TR: MIC5321, 3.0V/3.0V Output

Voltages, -40^ to +125^

Temp. Range, 6-Lead WDFN,

5,000/Reel

Note 1: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option.

NOTES:

Note the following details of the code protection feature on Microchip products:

• Microchip products meet the specifications contained in their particular Microchip Data Sheet.
- Microchip believes that its family of products is secure when used in the intended manner, within operating specifications, and under normal conditions.
- Microchip values and aggressively protects its intellectual property rights. Attempts to breach the code protection features of Microchip product is strictly prohibited and may violate the Digital Millennium Copyright Act.
- Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not mean that we are guaranteeing the product is “unbreakable”. Code protection is constantly evolving. Microchip is committed to continuously improving the code protection features of our products.

This publication and the information herein may be used only with Microchip products, including to design, test, and integrate Microchip products with your application. Use of this information in any other manner violates these terms. Information regarding device applications is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. Contact your local Microchip sales office for additional support or, obtain additional support at https://www.microchip.com/en-us/support/design-help/client-support-services.

THIS INFORMATION IS PROVIDED BY MICROCHIP "AS IS". MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE, OR WARRANTIES RELATED TO ITS CONDITION, QUALITY, OR PERFORMANCE.

IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL, OR CONSEQUENTIAL LOSS, DAMAGE, COST, OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE INFORMATION OR ITS USE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THE INFORMATION OR ITS USE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THE INFORMATION.

Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated.

Trademarks

The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, Flashtec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, TrueTime, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A.

Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, Augmented Switching, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, Espresso T1S, EtherGREEN, GridTime, IdealBridge, In-Circuit Serial Programming, ICSP, INICnet, Intelligent Paralleling, Inter-Chip Connectivity, JitterBlocker, Knob-on-Display, maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, NVM Express, NVMe, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O, simpleMAP, SimpliPHY, SmartBuffer, SmartHLS, SMART-I.S., storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total Endurance, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock, XpressConnect, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.

The Adaptec logo, Frequency on Demand, Silicon Storage Technology, Symmcom, and Trusted Time are registered trademarks of Microchip Technology Inc. in other countries.

GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries.

All other trademarks mentioned herein are property of their respective companies.

© 2022, Microchip Technology Incorporated and its subsidiaries.

All Rights Reserved.

ISBN: 978-1-6683-0445-7

For information regarding Microchip's Quality Management Systems, please visit www.microchip.com/quality.

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