MIC23050 - Electronic component Microchip - Free user manual and instructions

USER MANUAL MIC23050 Microchip

The Micrel MIC23050 is a high-efficiency, 600mA, PWM, synchronous buck (step-down) regulator featuring the HyperLight Load™ patented switching scheme that offers best-in-class light load efficiency and transient performance while providing very-small external components and low output ripple at all loads.

The MIC23050 also has a very-low typical quiescent current draw of 20 A and can achieve over 89% efficiency even at 1mA. The device allows operation with a tiny inductor ranging from 0.47 H to 2.2 H and uses a small output capacitor that enables a sub-1mm height.

In contrast to traditional light load schemes, the HyperLight Load™ architecture does not need to trade off control speed to obtain low standby currents and in doing so the device only needs a small output capacitor to absorb the load transient as the powered device goes from light load to full load.

At higher loads the MIC23050 provides a constant switching frequency of greater than 4MHz while providing peak efficiencies greater than 93%.

The MIC23050 comes in fixed output voltage options from 0.72V to 3.3V eliminating external feedback components. The MIC23050 is available in an 8-pin 2mm x 2mm MLF® with a junction operating range from -40^ to +125^ .

Datasheets and support documentation can be found on Micrel's web site at: www.micrel.com.

Features

• Input voltage: 2.7V to 5.5V
- 600mA output current
• Fixed output voltage from 0.72V to 3.3V
• Ultra-fast transient response
• 20μA typical quiescent current
• 4MHz in PWM in constant-current mode
- 0.47 H to 2.2 H inductor
- Low voltage output ripple

• 25mV_PP in HyperLight LoadTM mode

• 3mV output voltage ripple in full PWM mode

• 93% efficiency

• \~89% at 1mA
  • Micropower shutdown
  • Available in 8-pin 2mm x 2mm MLF ^®
• -40°C to +125°C junction temperature range

Applications

• Cellular phones
• Digital cameras
• Portable media players
• Wireless LAN cards
  • WiFi/WiMax/WiBro modules
  • USB-powered devices

Typical Application

VIN 2.7V to 5.5V ON OFF EN MIC23050 VIN SW SNS 1µH 560pF 4.7µF GND PGND AGND CFF VOUT GND

HyperLight Load is a trademark of Micrel, Inc.
MLF and MicroLeadFrame are registered trademarks of Amkor Technology, Inc.

Protected by US Patent No. 7064531

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel [phone] • fax [phone] • http://www.micrel.com

Ordering Information

Part Number	Marking	Nominal Output Voltage ^(1)	Junction Temperature Range	Package	(2)	Lead	Finish
MIC23050-CYML	GKC 1.0V	-40° to +125°C 8-Pin 2x2 MLF			®	Pb-Free
MIC23050-4YML	GK4 1.2V	-40° to +125°C 8-Pin 2x2 MLF			®	Pb-Free
MIC23050-GYML	GKG 1.8V	-40° to +125°C 8-Pin 2x2 MLF			®	Pb-Free
MIC23050-SYML	GKS 3.3V	-40° to +125°C 8-Pin 2x2 MLF			®	Pb-Free

Notes

1. Other output voltage options available (0.72V to 3.3V), contact Micrel for details.
2. MLF ^® is a GREEN RoHS compliant package. Lead finish is NiPdAu. Mold compound is Halogen Free.

Pin Configuration

SW 1 EN 2 NC 3 SNS 4 8 PGND 7 VIN 6 AGND 5 CFF

8-Pin 2mm x 2mm MLF ^® (ML) (Top View)

Pin Description

Pin Number	Pin Name	Pin Name
1	SW	Switch (Output): Internal power MOSFET output switches.
2	EN	Enable (Input). Logic low will shut down the device, reducing the quiescent current to less than 4μA.Do not leave floating.
3	NC	No Connect.
4	SNS Connect to VOUTto sense output voltage.
5 CFF	Feed Forward Capacitor. Connect a 560pF capacitor from VOUTto CFF pin.
6	AGND	Analog Ground.
7	VIN	Supply Voltage (Input): Requires bypass capacitor to GND.
8	PGND	Power Ground.

Absolute Maximum Ratings ^(1)

Supply Voltage ( V_IN )	6V
Output Switch Voltage ( V_SW )	6V
Output Switch Current ( I_SW )	2A
Logic Input Voltage ( V_EN , V_LQ )	V_IN to -0.3V
Junction Temperature ( T_J )	+150°C
Storage Temperature Range ( T_s )	-65°C to +150°C
ESD Rating(3)	3kV

Operating Ratings ^(2)

Supply Voltage (VIN)	2.7V to 5.5V
Logic Input Voltage (VEN)	0V to VIN
Junction Temperature (TJ)	-40°C ≤ TJ≤ +125°C
Thermal Resistance
2mm x 2mm MLF-8 (θJA)	90°C/W
2mm x 2mm MLF-8 (θJC)	45°C/W

Electrical Characteristics ^(4)

T_A = 25^ with V_IN = V_EN = 3.6V ; L = 1 H ; C_FF = 560pF ; C_OUT = 4.7 F ; I_OUT = 20mA unless otherwise specified. Bold values indicate -40^ ≤ T_J ≤ +125^ .

Parameter	Condition		Min.
Supply Voltage Range		2.7		5.5	V
Undervoltage Lockout Threshold	(turn-on)	2.45	2.55	2.65	V
UVLO Hysteresis			100		mV
Quiescent Current, Hyper LL Mode	I_OUT = 0mA , V_SNS > 1.2*V_OUT nominal		20	32	μA
Shutdown Current V	_IN = 5.5V; V_EN = 0V;		0.01	4	μA
Output Voltage Accuracy	V_IN = 3.0V, I_LOAD = 20mA	-2.5		+2.5	%
Current Limit in PWM Mode	SNS = 0.9*V_NOM	0.65	1	1.7	A
Output Voltage Line Regulation	V_IN = 3.0V to 5.5V, I_LOAD = 20mA		0.5		%/V
Output Voltage Load Regulation	20mA < I_LOAD < 500mA,		0.3		%
Maximum Duty Cycle	SNS ≤ V_NOM	80	89		%
PWM Switch ON-Resistance	I_SW = 100mA PMOS I_SW = -100mA NMOS		0.450.5		ΩΩ
Frequency	I_LOAD = 120mA	3.4	4	4.6	MHz
Soft-Start Time	V_OUT = 90%		650		μs
Enable Threshold	(turn-on)	0.5	0.8	1.2	V
Enable Hysteresis			35		mV
Enable Input Current			0.1	2	μA
Over-Temperature Shutdown			165		°C
Over-Temperature Shutdown Hysteresis			20		°C

Notes:

1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guaranteed to function outside its operating rating.
3. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5kΩ in series with 100pF.
4. Specification for packaged product only.

Typical Characteristics

Typical Characteristics (Continued)

Functional Characteristics

Functional Characteristics (Continued)

Functional Diagram

graph TD
    EN --> UVLO
    UVLO --> CONTROL_LOGIC_TIMER["CONTROL LOGIC TIMER & SOFTSTART"]
    CONTROL_LOGIC_TIMER --> GATE_DRIVE["GATE DRIVE"]
    GATE_DRIVE --> SW
    CONTROL_LOGIC_TIMER --> ISENSE["ISENSE"]
    ISENSE --> VOUT["VIN"]
    VOUT --> SW
    UEN --> REFERENCE
    REFERENCE --> CONTROL_LOGIC_TIMER
    CONTROL_LOGIC_TIMER --> CURRENTLimit["Current Limit"]
    CURRENTLimit --> ZERO1["ZERO 1"]
    ZERO1 --> ERRORComparator["ERROR COMPARATOR"]
    ERRORComparator --> CONTROL_LOGIC_TIMER
    CONTROL_LOGIC_TIMER --> ISENSE
    ISENSE --> PGND["PGND"]
    ISENSE --> SNS["SNS"]
    ISENSE --> CFF["CFF"]
    AGND["AGND"] --> CFF

MIC23050 Simplified Block Diagram

Functional Description

VIN

VIN provides power to the MOSFETs for the switch mode regulator section and to the analog supply circuitry. Due to the high switching speeds, it is recommended that a 2.2 F or greater capacitor be placed close to VIN and the power ground (PGND) pin for bypassing. Refer to the layout recommendations for details.

EN

The enable pin (EN) controls the on and off state of the device. A logic high on the enable pin activates the regulator, while a logic low deactivates it. MIC23050 features built-in soft-start circuitry that reduces in-rush current and prevents the output voltage from overshooting at start up. Do not leave this pin floating.

SW

The switch (SW) pin connects directly to the inductor and provides the switching current necessary to operate in PWM mode. Due to the high speed switching on this pin, the switch node should be routed away from sensitive nodes such as the CFF pin.

SNS

An inductor is connected from the SW pin to the SNS pin. The SNS pin is the output pin of the device and a minimum of 2.2 F bypass capacitor should be connected in shunt. In order to reduce parasitic inductance it is good practice to place the output bypass capacitor as close to the inductor as possible.

CFF

The CFF pin is connected to the SNS pin of MIC23050 with a feed-forward capacitor of 560pF. The CFF pin itself is compared with the internal reference voltage ( V_REF ) of the device and provides the control path to control the output. V_REF is equal to 0.72V. The CFF pin is sensitive to noise and should be place away from the SW pin. Refer to the layout recommendations for details.

PGND

Power ground (PGND) is the ground path for the high current PWM mode. The current loop for the power ground should be as small as possible and separate from the Analog ground (AGND) loop. Refer to the layout recommendations for more details.

AGND

Signal ground (AGND) is the ground path for the biasing and control circuitry. The current loop for the signal ground should be separate from the Power ground (PGND) loop. Refer to the layout recommendations for more details.

Applications Information

Input Capacitor

A minimum of 2.2 F ceramic capacitor should be placed close to the VIN pin and PGND pin for bypassing. X5R or X7R dielectrics are recommended for the input capacitor. Y5V dielectrics, aside from losing most of their capacitance over temperature, they also become resistive at high frequencies. This reduces their ability to filter out high frequency noise.

Output Capacitor

The MIC23050 is designed for use with a 2.2 F or greater ceramic output capacitor. A low equivalent series resistance (ESR) ceramic output capacitor either X7R or X5R is recommended. Y5V and Z5U dielectric capacitors, aside from the undesirable effect of their wide variation in capacitance over temperature, become resistive at high frequencies.

Inductor Selection

Inductor selection will be determined by the following (not necessarily in the order of importance);

• Inductance
  • Rated current value
• Size requirements
  • DC resistance (DCR)

The MIC23050 is designed for use with an inductance range from 0.47 H to 2.2 H . Typically, a 1 H inductor is recommended for a balance of transient response, efficiency and output ripple. For faster transient response a 0.47 H inductor may be used. For lower output ripple, a 2.2 H is recommended.

Maximum current ratings of the inductor are generally given in two methods; permissible DC current and saturation current. Permissible DC current can be rated either for a 40^ C temperature rise or a 10% to 20% loss in inductance. Ensure the inductor selected can handle the maximum operating current. When saturation current is specified, make sure that there is enough margin so that the peak current of the inductor does not cause it to saturate. Peak current can be calculated as follows:

$$ I _ {P K} = I _ {O U T} + V _ {O U T} (1 - V _ {O U T} / V _ {I N}) / 2 f L $$

As shown by the previous calculation, the peak inductor current is inversely proportional to the switching frequency and the inductance; the lower the switching frequency or the inductance the higher the peak current. As input voltage increases the peak current also increases.

The size of the inductor depends on the requirements of the application. Refer to the Application Circuit and Bill of Material for details.

DC resistance (DCR) is also important. While DCR is inversely proportional to size, DCR can represent a significant efficiency loss. Refer to the Efficiency Considerations.

Compensation

The MIC23050 is designed to be stable with a 0.47 H to 2.2 H inductor with a 2.2 F ceramic (X5R) output capacitor.

Efficiency Considerations

Efficiency is defined as the amount of useful output power, divided by the amount of power supplied:

$$ \% \text {Efficiency} \left(\frac {\mathrm{V} _ {\text {efficiency}} \times \mathrm{I} _ {\text {OUTOUT}}}{\mathrm{V} _ {\text {IN}} \times \mathrm{I} _ {\text {IN}}}\right) \times 100 $$

Maintaining high efficiency serves two purposes. It reduces power dissipation in the power supply, reducing the need for heat sinks and thermal design considerations and it reduces consumption of current for battery powered applications. Reduced current draw from a battery increases the devices operating time and is critical in hand held devices.

There are two types of losses in switching converters; DC losses and switching losses. DC losses are simply the power dissipation of I^2R . Power is dissipated in the high side switch during the on cycle. Power loss is equal to the high side MOSFET R_DSON multiplied by the Switch Current ^2 . During the off cycle, the low side N-channel MOSFET conducts, also dissipating power. Device operating current also reduces efficiency. The product of the quiescent (operating) current and the supply voltage is another DC loss. The current required driving the gates on and off at a constant 4MHz frequency and the switching transitions make up the switching losses.

Figure 1. MIC23050 Efficiency Curve

Figure 1 illustrates an efficiency curve for the MIC23050. From no load to 100mA, efficiency losses are dominated by quiescent current losses, gate drive and transition losses. By using the HyperLight Load ^™ mode the MIC23050 is able to maintain high efficiency at low output currents.

Over 100mA, efficiency loss is dominated by MOSFET RDSON and inductor losses. Higher input supply voltages will increase the gate-to-source threshold on the internal MOSFETs, reducing the internal RDSON. This improves efficiency by reducing DC losses in the device. All but the inductor losses are inherent to the device. In which case, inductor selection becomes increasingly critical in efficiency calculations. As the inductors are reduced in size, the DC resistance (DCR) can become quite significant. The DCR losses can be calculated as follows:

$$ L P d = I _ {O U T} ^ {2} \times D C R $$

From that, the loss in efficiency due to inductor resistance can be calculated as follows:

$$ \text { Eff } \left[ \text { d e s } \left(\frac {\mathrm{V} _ {\mathrm{OUT}} \times \mathrm{I} _ {\mathrm{OUT}}}{\mathrm{OUT} \times \mathrm{OUT} + \mathrm{Pd}}\right) \right] \times 1 0 0 $$

Efficiency loss due to DCR is minimal at light loads and gains significance as the load is increased. Inductor selection becomes a trade-off between efficiency and size in this case.

HyperLight Load Mode™

MIC23050 uses a minimum on and off time proprietary control loop. When the output voltage falls below the regulation threshold, the error comparator begins a switching cycle that turns the PMOS on and keeps it on for the duration of the minimum-on-time. When the output voltage is over the regulation threshold, the error comparator turns the PMOS off for a minimum-off-time. The NMOS acts as an ideal rectifier that conducts when the PMOS is off. Using a NMOS switch instead of a diode allows for lower voltage drop across the switching device when it is on. The asynchronous switching combination between the PMOS and the NMOS allows the control loop to work in discontinuous mode for light load operations. In discontinuous mode MIC23050 works in pulse frequency modulation (PFM) to regulate the output. As the output current increases, the switching frequency increases. This improves the efficiency of MIC23050 during light load currents. As the load current increases, the MIC23050 goes into continuous conduction mode (CCM) at a constant frequency of 4MHz. The equation to calculate the load when the MIC23050 goes into continuous conduction mode may be approximated by the following formula:

$$ I _ {\text {LOAD}} = \left(\frac {- \quad_ {\text {OUTIN}} \times D)}{2 L \times f}\right) V (V $$

MIC23050 Typical Application Circuit

VIN 2.7V to 5.5V MIC23050 ON OFF EN SW SNS L1 1µH C1 4.7µF PGND AGND CFF C3 560pF C2 4.7µF VOUT GND GND

Bill of Materials

Item	Part Number	Manufacturer	Description	Qty.
C1, C2 C1	608X5R0J475K TDK	^(1) 4.7μF	Ceramic Capacitor, 6.3V, X5R, Size 0603 2
C3	C1608C0G1H561J	^(1) 560μF	Ceramic Capacitor, 50V, NPO, Size 0603 1
L1	LQM21PN1R0MC0D	Murata ^(2) 1μH	0.8A, 190mΩ, L2mm x W1.25mm x H0.5mm	1
	LQH32CN1R0M33	Murata ^(2) 1μH	1A, 60mΩ, L3.2mm x W2.5mm x H2.0mm
	LQM31PN1R0M00	Murata ^(2) 1μH	1.2A, 120mΩ, L3.2mm x W1.6mm x H0.95mm
	GLF251812T1R0M	TDK ^(1) 1μH	0.8A, 100mΩ, L2.5mm x W1.8mm x H1.35mm
	LQM31PNR47M00	Murata ^(2) 0.47μH	1.4A, 80mΩ, L3.2mm x W1.6mm x H0.85mm
	MIPF2520D1R5	FDK ^(3) 1.5μH	1.5A, 70mΩ, L2.5mm x W2mm x H1.0mm
U1	MIC23050-xYML	Micrel, ^(4)	IntMHz PWM Buck Regulator with HyperLight LoadTM Mode	1

Notes:
1. TDK: www.tdk.com.
2. Murata: www.murata.com.
3. FDK: www.fdk.co.jp.
4. Micrel, Inc: www.micrel.com.

PCB Layout Recommendations

MICREL, Inc. 408-944-0800 MIC2305 YML 31mm² Vo J3 Gnd J4 GND J2 Vin J1 EN Usc J6 R2 R1

Top Layer

MICER IJC 008-44-0800 +08-44-0800 ICS302x-xxMJ dP 1U* dP bP-f166 2Ho92 01p12 B0#040305-B M91.

Bottom Layer

Package Information

PIN #1 ID BY MARKING 2.00 BSC 1.00 BSC 1 2 2.00 BSC 1.00 BSC 8

TOP VIEW

0.35±0.05 1.30±0.05 0.25 +0.05 -0.07 0.50 BSC PIN #1 R0.100 TYP 0.125±0.050 1.20±0.10 EXP. PAD 1.75 REF 0.60±0.10 EXP. PAD

BOTTOM VIEW

0.85±0.05 0.05 C SEATING PLANE 0.00-0.05 0.203±0.025

SIDE VIEW
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS.
2. MAX. PACKAGE WARPAGE IS 0.05 mm.
3. MAXIMUM ALLOWABE BURRS IS 0.076 mm IN ALL DIRECTIONS.
4. PIN #1 ID ON TOP WILL BE LASER/INK MARKED.
5. DIMENSION APPLIES TO METALIZED TERMINAL AND IS MEASURED
BETWEEN 0.20 AND 0.25 mm FROM TERMINAL TIP,
6. APPLIED ONLY FOR TERMINALS.
APPLIED FOR EXPOSED PAD AND TERMINALS.

8-Pin 2mm x 2mm MLF ^® (ML)

MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA

TEL [phone] FAX [phone] WEB http://www.micrel.com

Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel's terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.

Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.

© 2007 Micrel, Incorporated.