HV859 - Electronic component Microchip - Free user manual and instructions

USER MANUAL HV859 Microchip

High-Voltage EL Lamp Driver for Low-Noise Applications

Features

• Patented Audible Noise Reduction
• Patented Lamp Aging Compensation
- 210V_PP Output Voltage for Higher Brightness
• Patented Output Timing for High Efficiency
• Single-cell Lithium Ion Compatible
• 150 nA Shutdown Current
- Wide Input Voltage range of 1.8V to 5V
- Separately Adjustable Lamp and Converter Frequencies
• Output Voltage Regulation
- Split Supply Capability

Applications

• LCD Backlighting
  • Mobile Cellular Phone Keypads
  • PDAs
  • Handheld Wireless Communication Products
  • Global Positioning Systems (GPS)

General Description

The HV859 is a high-voltage driver designed for driving Electroluminescent (EL) lamps of up to 5 in ^2 . The input supply voltage range is from 1.8V to 5V. The device uses a single inductor and a minimum number of passive components. The nominal regulated output voltage that is applied to the EL lamp is ±105V. The chip can be enabled/disabled by connecting the resistor on RSW-Osc to VDD/Ground.

The HV859 has two internal oscillators, a switching MOSFET and a high-voltage EL lamp driver. The frequency for the switching MOSFET is set by an external resistor connected between the RSW-Osc pin and VDD pin. The EL lamp driver frequency is set by an external resistor connected between RSW-Osc pin and the VDD pin. An external inductor is connected between the L_X and VIN for split supply applications. A capacitor with a value between 0.003 F to 0.1 F, 200V rated, is connected between C_S and ground. The EL lamp is connected between VA and VB.

The switching MOSFET charges the external inductor and discharges it into the capacitor at C_S . Then, the voltage at C_S will start to increase. Once the voltage at C_S reaches a nominal value of 105V, the switching MOSFET is turned off to conserve power. The outputs VA and VB are configured as an H bridge and are switching in opposite states to achieve ±105V across the EL lamp.

Package Types

Pads of the 8-lead DFN are at the bottom of the package. See Table 2-1 for pin information.

Functional Block Diagram

graph TD
    A["VDD"] --> B["Switch OSC"]
    C["RSW-Osc"] --> B
    D["GND"] --> B
    B --> E["Capacitor C+"]
    E --> F["V_SENSE"]
    F --> G["High Voltage Level Transistors"]
    H["V_DD"] --> I["Switch OSC"]
    J["RSW-Osc"] --> I
    I --> K["V_REF"]
    K --> G
    L["LX"] --> G
    M["CS"] --> G
    N["VA"] --> G
    O["VB"] --> G
    P["Disable"] --> E

Typical Application Circuit

ON = VDD OFF = 0V Enable VDD + - CDD RSW 1 2 3 4 VDD HV859 VA 8 RSW-Osc VB 7 REL-Osc CS 6 GND LX 5 RSER EL Lamp VIN + - CIN D Lx Cs

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings†

Supply Voltage, VDD	-0.5V to 6.5V
Output Voltage, VCS	-0.5V to +130V
Operating Temperature Range, TA	-40°C to +85°C
Storage Temperature Range, TS	-65°C to +150°C
Power Dissipation:
8-lead WDFN	1.6W
8-lead MSOP	300 mW

† Notice: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability.

RECOMMENDED OPERATING CONDITIONS

Parameter Sym. Min. Typ.	Max. Unit	Conditions
Supply Voltage V	_DD	1.8	—	5	V
Output Drive Frequency	f_EL	—	—	1 kHz
Operating Temperature	T_A	-40 —	+85 °C

DC ELECTRICAL CHARACTERISTICS

Electrical Specifications: Over recommended operating conditions unless otherwise specified, V_IN = V_DD = 3.3V and T_A = 25°C .
Parameter	Sym.	Min.	Typ.	Max	Unit	Conditions
On-resistance of Switching Transistor	R_DS(ON)	—	—	6	Ω	I = 100 mA
Maximum Output Regulation Voltage	V_CS	95	105	115	V	V_DD = 1.8V to 5V
Peak-to-Peak Output Voltage	V_A-V_B	190	210	230 V	V	_DD = 1.8V to 5V
Quiescent V_DD Supply Current	I_DDQ	—	— 150 nA R			SW-Osc = Low
Input Current going into the V_DD Pin	I_DD	—	— 150 μA			V_DD = 1.8V to 5V(See Figure 3-1.)
Input Current including Inductor Current	I_IN	—	26	35	mA	Note 1 (See Figure 3-1.)
Output Voltage on V_CS	V_CS	—	90	—	V	See Figure 3-1.
EL Lamp Frequency	f_EL	175	205	235	Hz	See Figure 3-1.
Switching Transistor Frequency	f_SW	—	77	—	kHz
Switching Transistor Duty Cycle	D	—	88	—	%	See Figure 3-1.

Note 1: The inductor used is a 220 μH inductor with a maximum DC resistance of 8.4Ω.

TEMPERATURE SPECIFICATIONS

Parameter	Sym.	Min.	Typ.	Max.	Unit	Conditions
TEMPERATURE RANGE
Operating Temperature	T_A	-40	—	+85 °C
Storage Temperature	T_S	-65	—	+150	°C
PACKAGE THERMAL RESISTANCE
8-lead WDFN	_JA	—	37	—	°C/W
8-lead MSOP	_JA	—	216	—	°C/W

ENABLE/DISABLE FUNCTION TABLE

Parameter Sym. Min.	Typ. Max.	Unit Conditions
Logic Input Low Voltage EN-L 0 — 0.2 V V						_DD = 1.8V to 5V
Logic Input High Voltage EN-H V		_DD-0.2 — V _DD			V	V_DD = 1.8V to 5V

2.0 PIN DESCRIPTION

The details on the pins of HV859 are listed in Table 2-1. See the location of pins in Package Types.

TABLE 2-1: PIN FUNCTION TABLE

8-lead DFN Pin Number	8-lead MSOP Pin Number	Pin Name Description
1 1 VDD	Supply voltage
2 2 RSW-Osc		The switching frequency of the converter is controlled via an external resistor, R_SW , connected between the REL-Osc and VDD pins of the device. The switching frequency increases as the R_SW decreases. With a given inductor, as the switching frequency increases, the amount of current drawn from the battery and the output voltage, V_CS , decrease.
3 3 REL-Osc		The EL lamp frequency is controlled via an external R_EL resistor connected between REL-Osc and VDD pins of the device. The lamp frequency increases as the R_EL decreases. As the EL lamp frequency increases, the amount of current drawn from the battery increases and the output voltage V_CS decreases. The color of the EL lamp is dependent on its frequency.A 2 MΩ resistor would provide a lamp frequency of 175 Hz to 235 Hz. Decreasing the R_EL resistor by a factor of two will increase the lamp frequency by a factor of two.
4 4 GND		Ground return for all internal circuitry. This pin must be electrically connected to the ground of the power train.
5 5 LX		The inductor L_X is used to boost the low-input voltage by inductive flyback. When the internal switch is on, the inductor is being charged. When the internal switch is off, the charge stored in the inductor is transferred to the high-voltage capacitor, C_S . The energy stored in the capacitor is connected to the internal H-bridge, and therefore to the EL lamp. In general, smaller value inductors, which can handle more current, are more suitable to drive larger-sized lamps. As the inductor value decreases, the switching frequency of the inductor controlled by R_SW should be increased to avoid saturation.A 220 μH inductor with 8.4Ω series DC resistance is typically recommended. For inductors with the same inductance value, but with lower series DC resistance, lower R_SW resistor value is needed to prevent high current draw and inductor saturation.
6 6 CS		3 nF-to-100 nF, 200V capacitor to GND is used to store the energy transferred from the inductor.
7 7 VB	Lamp connection
8 8 VA	Lamp connection

3.0 APPLICATION INFORMATION

3.1 Typical Application/Test Circuit

ON = VDD OFF = 0V Enable Signal VDD HV859 VA 8 2.0kΩ Equivalent to 3.0in² lamp 10nF RSW-Osc VB 7 3 REL-Osc CS 6 4 GND LX 5 VDD = VIN + 1.0μF D* 220μH 3.3nF 200V *D = general purpose HV diode, rated 200V minimum

FIGURE 3-1: Typical Application/Test Circuit.

3.2 Split Supply Configuration

The HV859 can also be used for handheld devices operating from a battery where a regulated voltage is available. This is shown in Figure 3-2. The regulated voltage can be used to run the internal logic of the HV859. The amount of current necessary to run the internal logic is 150~ A max at a V_DD of 3V. Therefore, the regulated voltage could easily provide the current without being loaded down.

The HV859 can be easily enabled and disabled via a logic control signal on the R_SW and R_EL resistors as shown in Figure 3-2 below. The control signal can come from a microprocessor. R_SW and R_EL are typically very high values. Therefore, only 10's of microamperes will be drawn from the logic signal when it is at a Logic High (Enable) state. When the microprocessor signal is high, the device is enabled. When the signal is low, it is disabled.

ON = VDD OFF = 0V Enable Signal Regulated Voltage = VDD VDD HV859 VA 8 EL Lamp RSW-Osc VB 7 RSW-Osc CS 6 REL-Osc GND LX 5 D Lx Cs + VIN - CIN

FIGURE 3-2: Split Supply and Enable/Disable Configuration.

ON = VDD OFF = 0V Enable CDD Rsw VDD RAW-Osc VA VB REL-Osc CS GND LX RSER EL Lamp + VDD - + VIN - CIN 1 2 3 4 5 6 7 8 D Lx Cs

FIGURE 3-3: Typical Application Circuit for Audible Noise Reduction.

3.3 Audible Noise Reduction

This section describes a patented method developed to reduce the audible noise emitted by EL lamps used in applications sensitive to audible noise. Figure 3-3 shows a general circuit schematic that uses the resistor, R_SER , connected in series with the EL lamp.

3.3.1 HOW TO MINIMIZE EL LAMP AUDIBLE NOISE

Due to the EL lamp's construction, the lamp emits an audible noise when lit. This creates a major problem for applications where the EL lamp is used in devices placed close to the ear, such as cellular phones. The noisiest waveform is a square wave, and the quietest waveform has been assumed to be a sine wave.

An extensive research led to the development of a waveform that is quieter than a sine wave. The waveform takes the shape of approximately 2RC time constants for rising and 2RC time constants for falling, where C is the capacitance of the EL lamp, and R is the external resistor, R_SER , connected in series with the EL lamp. This waveform has been proven to generate less noise than a sine wave.

The audible noise from the EL lamp can be set at a desired level based on the series resistor value used with the lamp. It is important to note that the use of this resistor will reduce the voltage across the lamp. Reduction of voltage across the lamp will also have another effect on the over all performance of the EL drivers and age compensation. This addresses an extremely important issue—EL lamp life—which most mobile phone manufacturers are concerned about.

As the EL lamp ages, its brightness and capacitance reduce. By using the RC model to decrease the audible noise emitted by the EL lamp, the voltage across the lamp increases as its capacitance diminishes. Therefore, the increase in voltage will compensate for the reduction of brightness. As a result, it will extend the EL lamp's half-life (half the original brightness).

3.3.2 EFFECT OF SERIES RESISTOR ON EL LAMP AUDIBLE NOISE AND BRIGHTNESS

Increasing the value of the series resistor with the lamp reduces the EL lamp audible noise as well as its brightness. This is because the output voltage across the lamp goes low and the output waveform has rounder edges.

4.0 PACKAGING INFORMATION

4.1 Package Marking Information

8-lead WDFN

Example

8-lead MSOP

XXXXXXXX YWWNNN

Example

HV859 345336

Legend: XX...X Product Code or Customer-specific information

Y Year code (last digit of calendar year)

YY Year code (last 2 digits of calendar year)

WW Week code (week of January 1 is week '01')

NNN Alphanumeric traceability code

eBb-free JEDEC ^® designator for Matte Tin (Sn)

* This package is Pb-free. The Pb-free JEDEC designator ( ) e3

can be found on the outer packaging for this package.

Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo.

8-Lead Very, Very Thin Plastic Dual Flat, No Lead Package (UQ) - 3x3 mm Body [WDFN]; Supertex Legacy Package

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

(DATUM A) (DATUM B) NOTE 1 2X 0.15 C 2X 0.15 C TOP VIEW SEATING PLANE A θ // 0.10 C A1 8X 0.08 C SIDE VIEW NOTE 1 D2 1 4 E2 K L N 5 8X b See Detail A for Pullback Leads alternative e 0.10 M A B 0.05 M BOTTOM VIEW

Microchip Technology Drawing C04-291 Rev A Sheet 1 of 2

8-Lead Very, Very Thin Plastic Dual Flat, No Lead Package (UQ) - 3x3 mm Body [WDFN]; Supertex Legacy Package

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

L L1 DETAIL A

Units		MILLIMETERS
Dimension Limits		MIN	NOM	MAX
Number of Terminals	N	8
Pitch	e	0.65 BSC
Overall Height	A	0.70	0.75	0.80
Standoff	A1	0.00	0.02	0.05
Terminal Thickness	A3	0.20 REF
Overall Length	D	3.00 BSC
Exposed Pad Length	D2 1	60	-	2
Overall Width	E	3.00 BSC
Exposed Pad Width	E2	1.35 - 1.75
Terminal Width	b	0.25	0.30	0.35
Terminal Length	L	0.30	0.40	0.50
Pullback L1 -- 0.15
Mold Angle 0° 7° 14°	θ
	K		-0.20 -

5 0

0.20 - Terminal-to-Expose

Notes:

1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

REF: Reference Dimension, usually without tolerance, for information purposes only.

Microchip Technology Drawing C04-291A Sheet 2 of 2

8-Lead Very, Very Thin Plastic Dual Flat, No Lead Package (UQ) - 3x3 mm Body [WDFN]; Supertex Legacy Package

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

X2 EV 8 C1 Y2 EV ØV G1 Y1 1 2 X1 E SILK SCREEN

RECOMMENDED LAND PATTERN

Units		MILLIMETERS
Dimension Limits		MIN	NOM	MAX
Contact Pitch	E	0.65 BSC
Optional Center Pad Width	X2			2.50
Optional Center Pad Length	Y2			1.75
	C1C	contact Pad Spacing 3.00
Contact Pad Width (X8)	X1			0.35
Contact Pad Length (X8)	Y1			0.85
Contact Pad to Center Pad (X8) G1	0.20
Thermal Via Diameter V			0.33
Thermal Via Pitch EV			1.20

Notes:

1. Dimensioning and tolerancing per ASME Y14.5M

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

1. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process

Microchip Technology Drawing C04-2291 Rev A

8-Lead Plastic Micro Small Outline Package (MS) - 3x3 mm Body [MSOP]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

2X 0.20 H D D/2 A N E1/2 E1 2X 0.20 H NOTE 1 1 2 e B D E/2 E 2X 4 TIPS 0.25 C

TOP VIEW

A A2 A1 8X 0.10 C SEATING PLANE C A A 8X b Ø 0.25@A-B D

SIDE VIEW

H SEE DETAIL B

VIEW A-A

Microchip Technology Drawing C04-111-MS Rev F Sheet 1 of 2

© 2022 Microchip Technology Inc.

8-Lead Plastic Micro Small Outline Package (MS) - 3x3 mm Body [MSOP]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

4X θ1 R1 H R SEATING PLANE C L (L1) c θ 4X θ1

Isometric line drawing of an integrated circuit chip with multiple pins (no text or symbols)

DETAIL B

Units		MILLIMETERS
Dimension Limits		MIN	NOM	MAX
Number of Terminals	N	8
Pitch	e	0.65 BSC
Overall Height	A	-	-	1.10
Standoff	A1	0.00	-	0.15
Molded Package Thickness	A2	0.75	0.85	0.95
Overall Length D 3.00 BSC
Overall Width	E	4.90 BSC
Molded Package Width	E1	3.00 BSC
Terminal Width	b	0.22	-	0.40
Terminal Thickness	c	0	.	0 8
Terminal Length	L	0.40	0.60	0.80
	L1 0.95 REFFootprint
	R		-0.07	Lead Bend
	R1		-0.07	Lead Bend
	θ		-0° 8°Foot Angle
Draft Angle	θ1		-5° 15°

Mold Draft Angle

- 0

Notes:

1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm per side.
3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only.

Microchip Technology Drawing C04-111-MS Rev F Sheet 2 of 2

8-Lead Plastic Micro Small Outline Package (MS) - 3x3 mm Body [MSOP]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

GX C G1 SILK SCREEN Y X E

RECOMMENDED LAND PATTERN

Units		MILLIMETERS
Dimension Limits		MIN	NOM	MAX
Contact Pitch	E	0.65 BSC
	CContact Pad Spacing 4.40
Contact Pad Width (X8)	X			0.45
Contact Pad Length (X8)	Y			1.45
Contact Pad to Contact Pad (X4) G1	2.95
Contact Pad to Contact Pad (X6) G1	0.20

Notes:

Dimensioning and tolerancing per ASME Y14.5M1.

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

Microchip Technology Drawing C04-2111-MS Rev F

© 2022 Microchip Technology Inc.

NOTES:

APPENDIX A: REVISION HISTORY

Revision A (June 2023)

• Converted Supertex Doc# DSFP-HV859 to Microchip DS20005711A
• Changed the quantity of the K7 package from 3000/Reel to 3300/Reel to align packaging specifications with the actual BQM
  • Made minor text changes throughout the document

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.

PART NO. Device XX Package Options - X Environmental - X Media Type

Device: HV859 = High-Voltage EL Lamp Driver for Low-Noise Applications

Packages: K7 = 8-lead WDFN

MG = 8-lead MSOP

Environmental: G = Lead (Pb)-free/RoHS-compliant Package

Media Type: (blank) = 3300/Reel for a K7 Package

2500/Reel for an MG Package

Examples:

a) HV859K7-G: High-Voltage EL Lamp Driver for Low-Noise Applications, 8-lead WDFN Package, 3300/Reel

b) HV859MG-G: High-Voltage EL Lamp Driver for Low Noise Applications, 8-lead MSOP Package, 2500/Reel

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