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USER MANUAL X12DPG-QBT6 Supermicro

The information in this user's manual has been carefully reviewed and is believed to be accurate. The manufacturer assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates.

Please Note: For the most up-to-date version of this manual, please see our website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except as expressly permitted by the terms of said license.

IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in an industrial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the manufacturer's instruction manual, may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case you will be required to correct the interference at your own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. "Perchlorate Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate".

Supermicro X12DPG-QBT6 - 1

WARNING: This product can expose you to chemicals including lead, known to the State of California to cause cancer and birth defects or other reproductive harm. For more information, go to www.P65Warnings.ca.gov.

The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and proceedings of any kind arising out of or related to such ultra-hazardous use or sale.

Manual Revision 1.0

Release Date: August 31, 2022

Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this document. Information in this document is subject to change without notice. Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders.

Copyright © 2022 by Super Micro Computer, Inc.

All rights reserved.

Printed in the United States of America

Preface

About This Manual

This manual is written for system integrators, IT technicians and knowledgeable end users. It provides information for the installation and use of the X12DPG-QBT6 motherboard.

About This Motherboard

The Supermicro X12DPG-QBT6 supports dual 3rd Generation Intel® Xeon® Scalable Processors (in Socket P+ LGA 4189) with up to 40 CPU cores and a Thermal Design Power (TDP) of up to 270W. Built with the Intel C621A chipset, the X12DPG-QBT6 supports up to 4 TB of 3DS LRDIMM/LRDIMM/3DS RDIMM/RDIMM DDR4 ECC memory with speeds of 3200/2933/2666 MT/s in 16 DIMMs and up to 4 TB of Intel Optane™ Persistent Memory (PMem) 200 Series with speeds of up to 3200 MT/s. This motherboard features superior IO expandability, which includes seven PCIe 4.0 slots, two PCIe 4.0 x4 NVMe SlimSAS ports with support of four connections, ten SATA 3.0 ports, two PCIe 4.0/SATA 3.0 Hybrid M.2 slots, and nine USB ports/headers. It also offers the most advanced data protection capability that encompasses Trusted Platform Module (TPM) and Root of Trust (RoT) support. The X12DPG-QBT6 is optimized for high-performance, high-end computing platforms and is ideal for big data, enterprise applications. Please note that this motherboard is intended to be installed and serviced by professional technicians only. For processor/memory updates, please refer to our website at http://www.supermicro.com/products/.

Supermicro X12DPG-QBT6 - About This Motherboard - 1

Note 1: The Intel Optane PMem 200 Series are supported by the 3rd Gen. Intel Xeon Scalable (83xx/63xx/53xx/4314) Series Processors.

Note 2: Memory speed support depends on the processors used in the system.

Conventions Used in the Manual

Special attention should be given to the following symbols for proper installation and to prevent damage done to the components or injury to yourself:

Supermicro X12DPG-QBT6 - Conventions Used in the Manual - 1

Important: Important information given to ensure proper system installation or to relay safety precautions.

Supermicro X12DPG-QBT6 - Conventions Used in the Manual - 2

Warning! Indicates important information given to prevent equipment/property damage or personal injury.

Supermicro X12DPG-QBT6 - Conventions Used in the Manual - 3

Warning! Indicates high voltage may be encountered while performing a procedure.

Supermicro X12DPG-QBT6 - Conventions Used in the Manual - 4

Note: Additional Information given to differentiate various models or to provide information for proper system setup.

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: +1 (408) 503-8000

Fax: +1 (408) 503-8008

Email: marketing@supermicro.com (General Information)

Sales-USA@supermicro.com (Sales Inquiries)

Government_Sales-USA@supermicro.com (Gov. Sales Inquiries)

support@supermicro.com (Technical Support)

RMA@supermicro.com (RMA Support)

Webmaster@supermicro.com (Webmaster)

Website: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

's-Hertogenbosch, The Netherlands

Tel: +31 (0) 73-6400390

Fax: +31 (0) 73-6416525

Email: Sales_Europe@supermicro.com (Sales Inquiries)

Support_Europe@supermicro.com (Technical Support)

RMA_Europe@supermicro.com (RMA Support)

Website: www.supermicro.nl

Asia-Pacific

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: +886-(2) 8226-3990

Fax: +886-(2) 8226-3992

Email: Sales-Asia@supermicro.com.tw (Sales Inquiries)

Support@supermicro.com.tw (Technical Support)

RMA@supermicro.com.tw (RMA Support)

Website: www.supermicro.com.tw

Table of Contents

Chapter 1 Introduction

1.1 Checklist....7
1.2 Processor and Chipset Support....17
1.3 Special Features ....17
1.4 System Health Monitoring....18
1.5 ACPI Features....18
1.6 Power Supply....19
1.7 Serial Port....19
1.8 Intel® Optane™ Persistent Memory (PMem) 200 Series Overview....19

Chapter 2 Installation

2.1 Static-Sensitive Devices....20
2.2 Processor and Heatsink Installation....21
2.3 Motherboard Installation....37
2.4 Memory Support and Installation 39
2.5 Rear I/O Ports 43
2.6 Front Control Panel 49
2.7 Connectors ....55
2.8 Jumper Settings 66
2.9 LED Indicators....71

Chapter 3 Troubleshooting

3.1 Troubleshooting Procedures 73
3.2 Technical Support Procedures 76
3.3 Frequently Asked Questions ....77
3.4 Battery Removal and Installation 79
3.5 Returning Merchandise for Service....80

Chapter 4 UEFI BIOS

4.1 Introduction....81
4.2 Main Setup 82
4.3 Advanced Setup Configurations....84
4.4 Event Logs 128
4.5 IPMI 130

4.6 Security....134
4.7 Boot....138
4.8 Save & Exit....141

Appendix A BIOS POST Codes

A.1 BIOS POST Codes....143

Appendix B Software

B.1 Microsoft Windows OS Installation....144
B.2 Driver Installation....146
B.3 SuperDoctor® 5....147
B.4 BMC....148
B.5 Logging into the BMC (Baseboard Management Controller)....148

Appendix C Standardized Warning Statements

Chapter 1

Introduction

Congratulations on purchasing your computer motherboard from an industry leader. Supermicro motherboards are designed to provide you with the highest standards in quality and performance.

In addition to the motherboard, several important parts that are included in the retail box are listed below. If anything listed is damaged or missing, please contact your retailer.

1.1 Checklist

Main Parts List
Description Part Number Quantity
Supermicro Motherboard X12DPG-QBT6 1
I/O Shield MCP-260-00150-0N 1
CPU Carriers SKT-1205L-P4IC-FXC 2
SATA Cables CBL-0044L 2

For your motherboard to work properly, please follow the links below to download all necessary drivers/utilities and the user's manual for your computer.

  • Supermicro product manuals: http://www.supermicro.com/support/manuals/
  • Product drivers and utilities: https://www.supermicro.com/wdl/driver
  • Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm
  • A secure data deletion tool designed to fully erase all data from storage devices can be found at our website: https://www.supermicro.com/about/policies/disclaimer.cfm?url=/wdl/utility/Lot9_Secure_Data_Deletion_Utility/
  • If you have any questions, please contact our support team at: support@supermicro.com

This manual may be periodically updated without notice. Please check the Supermicro website for possible updates to the manual revision level.

X12DPG-QBT6 Motherboard Image

Supermicro X12DPG-QBT6 - X12DPG-QBT6 Motherboard Image - 1

natural_image Top-down view of a green computer motherboard with multiple CPU and RAM slots, no visible text or symbols.

Supermicro X12DPG-QBT6 - X12DPG-QBT6 Motherboard Image - 2

Note: All graphics shown in this manual were based upon the latest PCB revision available at the time of publication of the manual. The motherboard you received may or may not look exactly the same as the graphics shown in this manual.

X12DPG-QBT6 Motherboard Layout
(not drawn to scale)
Supermicro X12DPG-QBT6 - X12DPG-QBT6 Motherboard Image - 3

text_image IPTG1 MAC CODE IPMI CODE BAR CODE COM2 FAND FANC VGA1 P1.SLOT72.PCE 4.0 X16 P1.SLOT4.PCE 4.0 X16 JIPMB1 JNRNO JCI ISTBY1 IRKI S-SSPIO2 JF1 LED/PWR JSD1 JSD2 S-SATA4 S-SATA5 JL1 FAN6 USB97 (3.0) USB8 (3.0) SAT44-7 JPME2 JSDFI IN1 JPAO1 AUDIO_PP JND FAVA LED&MC BMC SUPTER XI2DPG-QBT6 P2.SLOT8.PCE 4.0 X16 P1.SLOT9.PCE 4.0 X16 JW/CC2 P2.SLOT10.PCE 4.0 X16 P2.SLOT11.PCE 4.0 X8 P2.DIMMD1 P2.DIMMD1.P1-DIMMFI P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMDML CPU2 P2.DIMMC1 P2.DIMMFI P2.DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI.P1-DIMMFI. CPU1 P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMMFI P1.DIMDML JPNR3 JPNR4 JPNR3 JPNR2 JPNR1 JPCDC1 FANS SPIN JTPM1 P1.NVME2/3 P1.NVME0/1 PCH

Supermicro X12DPG-QBT6 - X12DPG-QBT6 Motherboard Image - 4

Note: Components not documented are for internal testing only.

Quick Reference

Supermicro X12DPG-QBT6 - Quick Reference - 1

text_image JPTG1 COM2 FAND FANC VGA1 JIPMB1 JVRM2 JVRM1 JWD1 JSTBY1 JRK1 M2_1_LED1 M.2-HC1 M2_2_LED1 M.2-HC2 S-SGPIO2 JF1 JSD1 JSD2 S-SASTA5 S-SASTA4 JL1 FANB USB0/1 JSEN1 USB6/7 (3.0) USB8 (3.0) I-SATA4-7 I-SATA0-3 JPME2-JPAC1 JPME2-JSPDIF_IN1 JBT1 AUDIO_FP JHD_AC1 S/SATA1 S/SATA6 USB0/1 USB6/7 (3.0) USB8 (3.0) USB8 (3.0) JNVI2C LEDBMC JNCSI1 LED1 (UID-LED) JUIDB1 VGA2 LAN2 USB4/5 (3.0) LAN1 BMC_LAN USB2/3 (3.0) COM1 FAN4 FAN3 P2-DIMMG1 P2-DIMMH1 P2-DIMME1 P2-DIMMF1 CPU2 P2-DIMMC1 P2-DIMMD1 P2-DIMMC1 FAN6 JPWR5 JPWR4 JPWR3 JPWR2 JPWR1 JPI2C1 FAN5 FAN1

Supermicro X12DPG-QBT6 - Quick Reference - 2

Notes:

  • See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel connections.
  • "■" indicates the location of Pin 1.
  • Jumpers/LED indicators not indicated are used for testing only.
  • Use only the correct type of onboard CMOS battery as specified by the manufacturer. Do not install the onboard battery upside down to avoid possible explosion.

Quick Reference Table
Jumper Description Default Setting

JBT1 CMOS Clear Open (Normal)
JHD_AC1 AC97/High Definition Audio Enable Off (HD Enabled)
JPAC1 Audio Enable Pins 1-2 (Enabled)
JPME2 ME Manufacturing Recovery Pins 1-2 (Normal)
JPTG1 LAN1/LAN2 Enable/Disable Pins 1-2 (Enabled)
JVRM1 VRM SMB Clock (to BMC or PCH) Pins 1-2 (BMC, Normal)
JVRM2 VRM SMB Data (to BMC or PCH) Pins 1-2 (BMC, Normal)
JWD1Watchdog Timer ResetPins 1-2 (Reset)
LEDDescriptionStatus
LED1Unit Identifier (UID) LEDSolid Blue: Unit Identified
LEDBMC (LEDM1)BMC Heartbeat LEDBlinking Green: BMC Normal
LEDPWRPower LEDLED On: Onboard Power On
M2_1_LED1, M2_2_LED1M.2 LEDs for M.2-HC1 and M.2-HC2Blinking Green: Device Working
ConnectorDescription
AUDIO_FPFront Panel Audio Header
Battery (BT1)Onboard CMOS Battery
BMC_LANDedicated BMC LAN Port
COM1Rear I/O COM Port
COM2Front Accessible COM Header
FAN1 - FAN6, FANA - FANDCPU/System Fan Headers (FAN5: CPU1 Fan Header, FAN6: CPU2 Fan Header)
JF1Front Control Panel Header
JIPMB14-pin BMC External I^2C Header
JL1Chassis Intrusion Header
JNCSI1NC-SI (Network Controller Sideband Interface) Connector
JNVI2CNVMe I^2C Header
JPI2C1Power System Management Bus (SMB) I^2C Header
JPWR124-pin ATX Power Connector
JPWR2, JPWR3, JPWR48-pin Power Connectors
JPWR54-pin Power Connector
JRK1Intel VROC Key Header for NVMe RAID support
JSD1, JSD2SATA DOM Power Connectors
JSEN1 Inlet Sensor Header
JSPDIF_IN1Sony/Philips Digital Interface Audio Input Header
JSTBY1Standby Power Header (5V)
JTPM1 Trusted Platform Module/Port 80 Header
JUIDB1Unit Identifier (UID) Switch / BMC Reset Button

Connector Description

LAN1, LAN2 10 GbE Ethernet LAN Ports (RJ45)
M.2-HC1, M.2-HC2PCIe 4.0 x4/SATA 3.0 Hybrid M.2 Slots (with support of M-Key 2242, 2260, 2280, and 22110)
P1_NVME0/1, P1_NVME2/3 PCIe 4.0 x4 SlimSAS Ports with support of four NVMe connections
I-SATA0~3, I-SATA4~7 Intel PCH SATA 3.0 Ports (with RAID 0, 1, 5, 10)
S-SATA4, S-SATA5 Intel PCH Powered S-SATA 3.0 Ports with support of SuperDOM (Disk on Module) devices
S-SGPIO2 Serial Link General Purpose I/O Connection Header (for S-SATA4/5 SuperDOM support)
(P1) SLOT2, SLOT4,SLOT9 PCIe 4.0 x16 Slots supported by CPU1
(P2) SLOT6, SLOT8, SLOT10 PCIe 4.0 x16 Slots supported by CPU2
(P2) SLOT11 PCIe 4.0 x8 Slot supported by CPU2
SP1 Internal Speaker/Buzzer
USB0/1 (2.0) Front-accessible USB Header with support of two USB 2.0 connections
USB2/3, USB4/5 (3.0) Rear I/O USB 3.0 Ports
USB6/7 (3.0) Front-accessible USB Header with support of two USB 3.0 connections
USB8 (3.0) Internal USB 3.0 Type-A Connector
VGA1 Front VGA Header
VGA2 Rear VGA Port

Motherboard Features

Motherboard Features

CPU

- Supports two 3rd Gen. Intel Xeon Scalable Processors (in Socket P+ LGA 4189) with up to 40 cores per CPU and a Thermal Design Power (TDP) of up to 270W

Memory

- Supports up to 4 TB of 3DS LRDIMM/LRDIMM/3DS RDIMM/RDIMM DDR4 (288-pin) ECC memory with speeds of 3200/2933/2666 MT/s in 16 memory slots and up to 4 TB of Intel Optane PMem 200 Series with speeds of up to 3200 MT/s

Supermicro X12DPG-QBT6 - Memory - 1

Note 1: The Intel Optane PMem 200 Series are supported by the 3rd Gen. Intel Xeon Scalable (83xx/63xx/53xx/4314) Series Processors.

Note 2: Memory speed and capacity support depends on the processors used in the system.

DIMM Size

• Up to 256 GB at 1.2V

Supermicro X12DPG-QBT6 - DIMM Size - 1

Note: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/motherboard.

Chipset

Intel PCH C621A

Expansion Slots

• One PCIe 4.0 x8 slot (P2 SLOT11)
• Six PCIe 4.0 x16 slots (P1 SLOT2/4/9, P2 SLOT6/8/10)
- Two PCIe 4.0 x4/SATA 3.0 Hybrid M.2 slots (support M-Key 2242, 2260, 2280, and 22110)
- Two PCIe 4.0 x8 SlimSAS ports (P1_NVME0/1, P1_NVME2/3) with support of two connections of each port

Network

• Two 10 GbE Ethernet LAN ports supported by Broadcom BCM57416 LAN controller
• One Dedicated BMC LAN port located on the rear I/O panel (via AST2600 BMC)

Baseboard Management Controller (BMC)

• ASPEED AST2600 BMC

Graphics

• Graphics controller & VGA support via ASPEED AST2600 BMC

I/O Devices

- Serial (COM) Port

- SATA 3.0

• Video (VGA) Connections

• One serial port on the rear I/O panel (COM1)
• One front accessible serial port header (COM2)
• Eight I-SATA 3.0 ports at 6 Gb/s (I-SATA0\~3, I-SATA4\~7)
- Two Intel PCH powered S-SATA 3.0 Ports with support for SuperDOM (Disk on Module) devices (S-SATA4, S-SATA5)
• One VGA port on the rear I/O panel (VGA2)
• One VGA header on the motherboard for front access (VGA1)

Peripheral Devices

• Four USB 3.0 ports on the rear I/O panel (USB2, USB3, USB4, USB5)
• One front-accessible USB header (USB0/1) with support of two USB 2.0 connections
• One front-accessible USB header (USB6/7) with support of two USB 3.0 connections
• One internal USB 3.0 Type-A connector (USB8)

BIOS

• AMI BIOS
- ACPI 3.0 or later, PCI firmware 4.0 support, BIOS rescue hot-key, SPI dual/quad speed support, Real Time Clock (RTC) wakeup, and SMBIOS 3.0 or later

Power Management

• ACPI power management
• Power button override mechanism
• Power-on mode for AC power recovery
- Wake-on-LAN
• Power supply monitoring

System Health Monitoring

• Onboard voltage monitoring for +/-12V, +5V/+5V standby, +3.3V, and +3.3V standby
- Onboard temperature monitoring for CPU, VRM, LAN, PCH, system, and memory
• 7+1 CPU switch phase voltage regulator
• CPU thermal trip support
• Platform Environment Control Interface (PECI)

Fan Control

• Fan status monitoring via BMC connections
- Single cooling zone
• Low-noise fan speed control
• Ten 4-pin fan headers

System Management

  • SuperDoctor® 5
    • Chassis intrusion header and detection
    • Server platform service

Firmware Integrity/System Security

• Trusted Platform Module (TPM) support
- Root of Trust (RoT) support to protect firmware security by detecting critical data corruption, and restoring platform integrity

LED Indicators

Power LED
- UID/remote UID
• LAN activity LED
• BMC Heartbeat LED

Dimensions

• 15.12" (W) x 13.2" (L) ATX (384.05 mm x 335.28 mm)

Supermicro X12DPG-QBT6 - Dimensions - 1

Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and heatsink cooling restrictions. For proper thermal management, please check the chassis and heatsink specifications.

Note 2: For BMC configuration instructions, please refer to the Embedded BMC Configuration User's Guide available at http://www.supermicro.com/support/manuals/.

System Block Diagram
Supermicro X12DPG-QBT6 - Dimensions - 2

flowchart
graph TD
    subgraph X12DPG-QBT6
        A["CPU 1"] --> B["VCPP1"]
        B --> C["PCB"]
        C --> D["VCPP2"]
        D --> E["VCPP2 12v"]
    end

    subgraph CPU
        F["DCR4 DIMM"] --> G["DDR4 DIMM"]
        H["DDR4 DIMM"] --> I["DDR4 DIMM"]
        J["DDR4 DIMM"] --> K["DDR4 DIMM"]
        L["DDR4 DIMM"] --> M["DDR4 DIMM"]
        N["DDR4 DIMM"] --> O["DDR4 DIMM"]
        P["DDR4 DIMM"] --> Q["DDR4 DIMM"]
        R["DDR4 DIMM"] --> S["DDR4 DIMM"]
        T["DDR4 DIMM"] --> U["DDR4 DIMM"]
        V["DDR4 DIMM"] --> W["DDR4 DIMM"]
        X["DDR4 DIMM"] --> Y["DDR4 DIMM"]
        Z["DDR4 DIMM"] --> AA["DDR4 DIMM"]
        AB["DDR4 DIMM"] --> AC["DDR4 DIMM"]
        AD["DDR4 DIMM"] --> AE["DDR4 DIMM"]
        AF["DDR4 DIMM"] --> AG["DDR4 DIMM"]
        AH["DDR4 DIMM"] --> AI["DDR4 DIMM"]
        AJ["DDR4 DIMM"] --> AK["DDR4 DIMM"]
        AL["DDR4 DIMM"] --> AM["DDR4 DIMM"]
        AN["DDR4 DIMM"] --> AO["DDR4 DIMM"]
        AP["DDR4 DIMM"] --> AQ["DDR4 DIMM"]
        AR["DDR4 DIMM"] --> AS["DDR4 DIMM"]
        AT["DDR4 DIMM"] --> AU["DDR4 DIMM"]
        AV["DDR4 DIMM"] --> AW["DDR4 DIMM"]
        AX["DDR4 DIMM"] --> AY["DDR4 DIMM"]
        AZ["DDR4 DIMM"] --> BA["DDR4 DIMM"]
        BB["DDR4 DIMM"] --> BC["DDR4 DIMM"]
        BD["DDR4 DIMM"] --> BE["DDR4 DIMM"]
        BF["DDR4 DIMM"] --> BG["DDR4 DIMM"]
        BH["DDR4 DIMM"] --> BI["DDR4 DIMM"]
        BJ["DDR4 DIMM"] --> BK["DDR4 DIMM"]
        BL["DDR4 DIMM"] --> BM["DDR4 DIMM"]
        BN["DDR4 DIMM"] --> BO["DDR4 DIMM"]
        BP["DDR4 DIMM"] --> BQ["DDR4 DIMM"]
        BR["DDR4 DIMM"] --> BS["DDR4 DIMM"]
        BT["DDR4 DIMM"] --> BU["DDR4 DIMM"]
        BV["DDR4 DIMM"] --> BW["DDR4 DIMM"]
        BX["DDR4 DIMM"] --> BY["DDR4 DIMM"]
        BZ["P1F"] --> CA["VCCP1 12V"]
        DA["P1E"] --> DA
        DB["P1H"] --> DB
        DC["P1G"] --> DC
        DD["P1B"] --> DD
        EE["P1C"] --> EE
        FF["P1D"] --> FF
        GG["P1A"] --> GG
        HH["P1B"] --> HH
        I["P2F"] --> I
        J["P2E"] --> J
        K["P2H"] --> K
        L["P2G"] --> L
        M["P2H"] --> M
        N["P2I"] --> N
        O["P2J"] --> O
        P["P2K"] --> P
        Q["P2L"] --> Q
        R["P2N"] --> R
        S["P2O"] --> S
        T["P2P"] --> T
        U["P2Q"] --> U
        V["P2R"] --> V
        W["P2S"] --> W
        X["P2T"] --> X
        Y["P2U"] --> Y
        Z["P2V"] --> Z
        AA["P2W"] --> AA
        AB["P2X"] --> AB
        AC["P2Y"] --> AC
        AD["P2Z"] --> AD
    end

    subgraph CPU_1
        B
    end

    subgraph CPU_2
        D
    end

    subgraph CPU_3
        E
    end

    subgraph CPU_4
        F
    end

    subgraph CPU_5
        G
    end

    subgraph CPU_6
        H
    end

    subgraph CPU_7
        I
    end

    subgraph CPU_8
        J
    end

    subgraph CPU_9
        K
    end

    subgraph CPU_10
        L
    end

    subgraph CPU_11
        M
    end

    subgraph CPU_12
        N
    end

    subgraph CPU_13
        O
    end

    subgraph CPU_14
        P
    end

    subgraph CPU_15
        Q
    end

    subgraph CPU_16
        R
    end

    subgraph CPU_17
        S
    end

    subgraph CPU_18
        T
    end

    subgraph CPU_19
        U
    end

    subgraph CPU_20
        V
    end

    subgraph CPU_21
        W
    end

    subgraph CPU_22
        X
    end

    subgraph CPU_23
        Y
    end

    subgraph CPU_24
        Z
    end

    subgraph CPU_25
        AA
    end

    subgraph CPU_26
        AB
    end

    subgraph CPU_27
        AC
    end

    subgraph CPU_28
        AD
    end

    subgraph CPU_29
        AE
    end

    subgraph CPU_30
        AF
    end

    subgraph CPU_31
        AG
    end

    subgraph CPU_32
        AH
    end

    subgraph CPU_33
        AI
    end

    subgraph CPU_34
        AJ
    end

    subgraph CPU_35
        AK
    end

    subgraph CPU_36
        AL
    end

    subgraph CPU_37
        AM
    end

    subgraph CPU_38
        AN
    end

    subgraph CPU_39
        AO
    end

    subgraph CPU_40
        AP
    end

    subgraph CPU_41
        AQ
    end

    subgraph CPU_42
        AR
    end

    subgraph CPU_43
        AS
    end

    subgraph CPU_44
        AT10000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000888888888888888888888888888888888888888888888888888888888888888888888888888888888888888888888888888899999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999999997777777777777777777777777777777777777777777777777777777777777777777777777777777777777777777777777777

Supermicro X12DPG-QBT6 - Dimensions - 3

Note: This is a general block diagram and may not exactly represent the features on your motherboard. Refer to the previous pages for the actual specifications of your motherboard.

1.2 Processor and Chipset Support

Built upon the functionality and capability of the 3rd Gen. Intel Xeon Scalable Processors (Socket P+) and the Intel C621A chipset, the X12DPG-QBT6 motherboard increases energy efficiency, and system performance for a multitude of applications such as high performance computing, artificial intelligence (AI), deep learning (DL), big data, and enterprise applications.

Features Supported

• Performance improvements with higher core counts, up to 3 UPIs/socket at 11.2 GT/s
- Vector Neural Network Instructions (VNNI) support to accelerate training
- New hardware-enhanced security features help protect platform & data without compromising performance
• High PCIe performance (PCIe 4.0) with double the bandwidth of PCIe 3.0

1.3 Special Features

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will respond when AC power is lost and then restored to the system. You can choose for the system to remain powered off (in which case you must press the power switch to turn it back on), or for it to automatically return to the power-on state. See the Advanced BIOS Setup section for this setting. The default setting is Last State.

1.4 System Health Monitoring

Onboard Voltage Monitors

An onboard voltage monitor will scan the voltages of the onboard chipset, memory, and CPU continuously. Once a voltage becomes unstable, a warning is given, or an error message is sent to the screen.

Fan Status Monitor with Firmware Control

The system health monitor embedded in the BMC chip can check the RPM status of the cooling fans. The CPU and chassis fans are controlled via BMC.

Environmental Temperature Control

System Health sensors monitor temperatures and voltage settings of onboard processors and the system in real time via the BMC interface. Whenever the temperature of the CPU or the system exceeds a user-defined threshold, system and CPU cooling fans will be turned on to prevent the CPU or the system from overheating.

Supermicro X12DPG-QBT6 - Environmental Temperature Control - 1

Note: To avoid possible system overheating, please be sure to provide adequate airflow to your system.

System Resource Alert

This feature is available when used with SuperDoctor® 5 in the Windows OS or in the Linux environment. SuperDoctor is used to notify the user of certain system events. For example, you can configure SuperDoctor to provide you with warnings when the system temperature, CPU temperatures, voltages and fan speeds go beyond a predefined range.

1.5 ACPI Features

ACPI stands for Advanced Configuration and Power Interface. The ACPI specification defines a flexible and abstract hardware interface that provides a standard way to integrate power management features throughout a computer system, including its hardware, operating system and application software. This enables the system to automatically turn on and off peripherals such as network cards, hard disk drives and printers.

In addition to enabling operating system-directed power management, ACPI also provides a generic system event mechanism for Plug and Play, and an operating system-independent interface for configuration control. ACPI leverages the Plug and Play BIOS data structures, while providing a processor architecture-independent implementation that is compatible with appropriate Windows operating systems. For detailed information regarding OS support, please refer to the Supermicro website.

1.6 Power Supply

As with all computer products, a stable power source is necessary for proper and reliable operation. It is even more important for processors that have high CPU clock rates where noisy power transmission is present.

The X12DPG-QBT6 motherboard accommodates a 24-pin ATX power supply. Although most power supplies generally meet the specifications required by the CPU, some are inadequate. In addition, three 12V 8-pin and one 4-pin power connections are also required to ensure adequate power supply to the system.

Warning! To avoid damaging the power supply on the motherboard, be sure to use a power supply that contains one 24-pin, three 8-pin, and one 4-pin power connectors. Be sure to connect the power supplies to the 24-pin power connector (JPWR1), the 8-pin power connectors (JPWR2/JPWR3/JPWR4), and the 4-pin power connector (JPWR5) on the motherboard. Failure in doing so may void the manufacturer warranty on your power supply and motherboard.

It is strongly recommended that you use a high quality power supply that meets ATX power supply Specification 2.02 or above. It must also be SSI compliant.

1.7 Serial Port

The X12DPG-QBT6 motherboard supports two serial communication connections. COM1 port and COM2 header can be used for input/output. The UART provides legacy speeds with a baud rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which support high-speed serial communication devices.

1.8 Intel® Optane™ Persistent Memory (PMem) 200 Series Overview

The 3rd Gen. Intel Xeon Scalable Processors support the new Intel Optane PMem 200 Series memory. Intel Optane PMem offers higher capacities than the traditional DDR4 modules. It also provides increased storage capabilities due to data persistence in a DDR4 form factor for higher performance computing platforms with flexible configuration options.

Supermicro X12DPG-QBT6 - Intel® Optane™ Persistent Memory (PMem) 200 Series Overview - 1

Note: The Intel Optane PMem 200 Series are supported by the 3rd Gen. Intel Xeon Scalable (83xx/63xx/53xx/4314) Series Processors.

Chapter 2

Installation

2.1 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic components. To avoid damaging your motherboard, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD.

Precautions

  • Use a grounded wrist strap designed to prevent static discharge.
  • Touch a grounded metal object before removing the motherboard from the antistatic bag.
  • Handle the motherboard by its edges only; do not touch its components, peripheral chips, memory modules or gold contacts.
  • When handling chips or modules, avoid touching their pins.
  • Put the motherboard and peripherals back into their antistatic bags when not in use.
  • For grounding purposes, make sure that your computer chassis provides excellent conductivity between the power supply, the case, the mounting fasteners and the motherboard.
  • Use only the correct type of onboard CMOS battery. Do not install the onboard battery upside down to avoid possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking the motherboard, make sure that the person handling it is static protected.

2.2 Processor and Heatsink Installation

The processor (CPU) and processor carrier should be assembled together first to form the processor carrier assembly. This will be attached to the heatsink to form the processor heatsink module (PHM) before being installed into the CPU socket. Before installation, be sure to perform the following steps below:

  • Please carefully follow the instructions given on the previous page to avoid ESD-related damages.
  • Unplug the AC power cords from all power supplies after shutting down the system.
  • Check that the plastic protective cover is on the CPU socket and none of the socket pins are bent. If they are, contact your retailer.
  • When handling the processor, avoid touching or placing direct pressure on the LGA lands (gold contacts). Improper installation or socket misalignment can cause serious damage to the processor or CPU socket, which may require manufacturer repairs.
  • Thermal grease is pre-applied on a new heatsink. No additional thermal grease is needed.
    • Refer to the Supermicro website for updates on processor and memory support.
  • All graphics in this manual are for illustrations only. Your components may look different.

The 3rd Gen. Intel Xeon Scalable Processor

Supermicro X12DPG-QBT6 - The 3rd Gen. Intel Xeon Scalable Processor - 1

natural_image Isometric line drawing of a mechanical component with no text or symbols

Processor Top View

  1. The 3rd Gen. Intel Xeon Scalable Processor

Processor Top View (3D)
Supermicro X12DPG-QBT6 - The 3rd Gen. Intel Xeon Scalable Processor - 2

text_image CPU Key Pin 1 = Cutout = CPUPkey ○

Processor Top View

2. The Processor Carrier

Supermicro X12DPG-QBT6 - The Processor Carrier - 1

natural_image Isometric technical drawing of a mechanical housing or bracket component (no text or symbols)

Supermicro X12DPG-QBT6 - The Processor Carrier - 2

natural_image Pure technical line drawing of a mechanical or electronic component outline without any text, numbers, or symbols

Carrier Bottom View

3. Heatsink

Supermicro X12DPG-QBT6 - Heatsink - 1

natural_image Technical line drawing of a heat exchanger or cooling unit with cooling fins and mounting brackets (no text or symbols)

Note: Exercise extreme care when handling the heatsink. Pay attention to the edges of heatsink fins which can be sharp! To avoid damaging the heatsink, please do not apply excessive force on the fins when handling the heatsink.

Overview of the CPU Socket

The CPU socket is protected by a plastic protective cover.

Supermicro X12DPG-QBT6 - Overview of the CPU Socket - 1

text_image Plastic Protective Cover

Supermicro X12DPG-QBT6 - Overview of the CPU Socket - 2

text_image CPU Socket

Overview of the Processor Carrier Assembly

The processor carrier assembly contains a 3rd Gen. Intel Xeon Scalable processor and a processor carrier. Carefully follow the instructions given in the installation section to place a processor into the carrier to create a processor carrier.

  1. The 3rd Gen. Intel Xeon Scalable Processor

Intel Processor (Bottom View)
Supermicro X12DPG-QBT6 - Overview of the Processor Carrier Assembly - 1

natural_image Pure grid pattern with no text, numbers, or symbols

Processor (2D)

Supermicro X12DPG-QBT6 - Overview of the Processor Carrier Assembly - 2

natural_image Isometric technical drawing of a rectangular panel with a central square cutout (no text or symbols)

Processor (3D)

  1. Processor Carrier

Intel Processor Carrier (Top View)
Supermicro X12DPG-QBT6 - Overview of the Processor Carrier Assembly - 3

natural_image Pure technical line drawing of a rectangular mechanical or electrical component with mounting holes and internal components (no text or symbols)

Processor Carrier (2D)

Supermicro X12DPG-QBT6 - Overview of the Processor Carrier Assembly - 4

natural_image Isometric technical drawing of a mechanical housing or bracket assembly (no text or symbols)

Processor Carrier (3D)

Supermicro X12DPG-QBT6 - Overview of the Processor Carrier Assembly - 5

  1. Processor Carrier Assembly

Supermicro X12DPG-QBT6 - Overview of the Processor Carrier Assembly - 6

natural_image Isometric technical drawing of a rectangular electronic component with internal grid structure (no text or symbols)

(with Processor Seated inside the Carrier)

Overview of the Processor Heatsink Module

The Processor Heatsink Module (PHM) contains a heatsink, a processor carrier, and a 3rd Gen. Intel Xeon Scalable processor.

  1. Heatsink (with Thermal Grease)

Supermicro X12DPG-QBT6 - Overview of the Processor Heatsink Module - 1

natural_image Technical line drawing of a mechanical component with mounting holes and internal structure (no text or symbols)
  1. Processor Carrier

Supermicro X12DPG-QBT6 - Overview of the Processor Heatsink Module - 2

natural_image Technical line drawing of a mechanical assembly with no visible text or symbols
  1. The 3rd Gen. Intel Xeon Scalable Processor

Supermicro X12DPG-QBT6 - Overview of the Processor Heatsink Module - 3

natural_image Simple line drawing of a flatboard with a square cutout on the side (no text or symbols)

Bottom View

Supermicro X12DPG-QBT6 - Overview of the Processor Heatsink Module - 4

  1. Processor Heatsink Module (PHM)

Supermicro X12DPG-QBT6 - Overview of the Processor Heatsink Module - 5

natural_image Technical line drawing of a mechanical assembly with no visible text or symbols

Creating the Processor Carrier Assembly

The processor carrier assembly contains a 3rd Gen. Intel Xeon Scalable processor and a processor carrier.

To create the processor carrier assembly, please follow the steps below:

Supermicro X12DPG-QBT6 - Creating the Processor Carrier Assembly - 1

Note: Before installation, be sure to follow the instructions given on pages 1 and 2 of this chapter to properly prepare yourself for installation.

  1. Hold the processor with the LGA lands (with Gold CPU contacts) facing down. Locate the small, gold triangle at the corner of the processor and the corresponding hollowed triangle on the processor carrier as shown in the graphics below. Please note that the triangle indicates Pin 1 location.

Supermicro X12DPG-QBT6 - Creating the Processor Carrier Assembly - 2

text_image Pin 1

Supermicro X12DPG-QBT6 - Creating the Processor Carrier Assembly - 3

text_image Pin 1
  1. First, turn over the processor carrier and locate Pin 1 on the CPU and Pin 1 on the carrier. Then, turn the processor over with the processor reverse side (gold contacts) facing up and locate CPU keys on the processor. Finally, locate the CPU keys and four latches on the carrier as shown below.

Supermicro X12DPG-QBT6 - Creating the Processor Carrier Assembly - 4

text_image Processor (Reverse Side Up) Latch Latch Carrier (Top Side Up) CPU Key Latch Latch CPU Key

Carrier with the Processor Installed

  1. Locate the lever on the CPU socket and press the lever down as shown below.

Supermicro X12DPG-QBT6 - Creating the Processor Carrier Assembly - 5

natural_image Technical line drawing of a mechanical assembly with an inset showing a disassembled component (no text or symbols present)
  1. Using Pin 1 as a guide, carefully align the CPU keys (A & B) on the processor against the CPU keys on the carrier (a & b) as shown in the drawing below.

  2. Once they are properly aligned, carefully place one end of the processor into the latch marked 1 on the carrier, and place the other end of processor into the latch marked 2.

Supermicro X12DPG-QBT6 - Creating the Processor Carrier Assembly - 6

text_image CPU Key (on the processor) CPU Key (on the carrier) Latch 1 2 A a CPU Key (on the processor) CPU Key (on the carrier) Latch
  1. After the processor is placed inside the carrier, examine the four sides of the processor, making sure that the processor is properly seated on the carrier.

Supermicro X12DPG-QBT6 - Creating the Processor Carrier Assembly - 7

text_image Processor Carrier Assembly (Top Side View) Processor Carrier Assembly

Creating the Processor Heatsink Module (PHM)

After creating the processor carrier assembly, please follow the instructions below to mount the processor carrier into the heatsink to form the processor heatsink module (PHM).

Supermicro X12DPG-QBT6 - Creating the Processor Heatsink Module (PHM) - 1

Note: If this is a new heatsink, the thermal grease has been pre-applied on the underside. Otherwise, apply the proper amount of thermal grease.

  1. Turn the heatsink over with the thermal grease, which is on the reverse side of the heatsink, facing up. Pay attention to the two triangle cutouts (A, B) located at the diagonal corners of the heatsink as shown in the drawing below.
  2. Hold the processor carrier assembly top side (with thermal grease) facing up, and locate the triangle on the CPU and the triangle on the carrier. (Triangle indicates Pin 1.)
  3. Using Pin 1 as a guide, turn the processor carrier assembly over with the gold contacts facing up. Locate Pin 1 (A) on the processor and Pin 1 (a) on the processor carrier assembly "a".
  4. Align the corner marked "a" on the processor carrier assembly against the triangle cutout "A" on the heatsink, and align the corners marked "b", "c", "d" on processor assembly against the corners marked "B", "C", "D" on the heatsinks
  5. Once they are properly aligned, place the corner marked "a" on the processor carrier assembly into the corner of the heatsink marked "A". Repeat the same step to place the corners marked "b", "c", "d" on the processor carrier assembly into the corners of the heatsink marked "B", "C", "D" making sure that all plastic clips are properly attached to the heatsink.

Supermicro X12DPG-QBT6 - Creating the Processor Heatsink Module (PHM) - 2

text_image Processor Carrier Assembly (Reverse Side View) Pin1 a b c D A B C Processor Heatsink Module (PHM) (Reverse Side View)

Preparing the CPU Socket for Installation

This motherboard comes with a plastic protective cover installed on the CPU socket. Remove it from the socket by following the instructions given in the drawings below.

Removing the Plastic Protective Cover from the Socket

Supermicro X12DPG-QBT6 - Preparing the CPU Socket for Installation - 1

natural_image Technical line drawing of a mechanical component with red arrows indicating directional movement (no text or symbols)
  1. Press the tabs inward.

Supermicro X12DPG-QBT6 - Preparing the CPU Socket for Installation - 2

natural_image Technical line drawing of a mechanical component with mounting holes and a red arrow indicating direction (no text or symbols)
  1. Pull up the protective cover from the socket.

Preparing to Install the Processor Heatsink Module (PHM) into the CPU Socket

After assembling the Processor Heatsink Module (PHM), you are ready to install it into the CPU socket. To ensure the proper installation, please follow the procedures below:

  1. Locate four threaded fasteners (a, b, c, d) on the CPU socket.

Supermicro X12DPG-QBT6 - Preparing to Install the Processor Heatsink Module (PHM) into the CPU Socket - 1

text_image CPU Socket Threaded Fastener a, b, c, d: Threaded Fasteners CPU Socket Pin1 a, b, c, d: Threaded Fasteners
  1. Locate four peek nuts (A, B, C, D) and four rotating wires (1, 2, 3, 4) on the heatsink as shown in the graphics below.

Supermicro X12DPG-QBT6 - Preparing to Install the Processor Heatsink Module (PHM) into the CPU Socket - 2

text_image Heatsink (Reverse Side) A, B, C, D: Peek Nut 1, 2, 3, 4: Rotating Wire a, b, c, d: Threaded Fastener Rotating Wire 4 Rotating Wire 3 Rotating Wire 1 Peek Nut CPU Socket d a Threaded Fastener Unlatched (lassched) Rotating Wire
  1. Check the rotating wires (1, 2, 3, 4) to make sure that they are at unlatched positions as shown in the drawing below before installing the PHM into the CPU socket.

Supermicro X12DPG-QBT6 - Preparing to Install the Processor Heatsink Module (PHM) into the CPU Socket - 3

text_image Unlatched State Rotating Wire Side View Top View Peek Nut

Installing the Processor Heatsink Module (PHM)

  1. Align peek nut "A", which is next to the triangle (Pin 1) on the heatsink, against threaded fastener "a" on the CPU socket. Then align peek nuts "B", "C", "D" on the heatsink against threaded fasteners "b", "c", "d" on the CPU socket, making sure that all peek nuts on the heatsink are properly aligned with the correspondent threaded fasteners on the CPU socket.

  2. Once they are aligned, gently place the heatsink on top the CPU socket, making sure that each peek nut is properly attached to its corresponding threaded fastener.

Supermicro X12DPG-QBT6 - Installing the Processor Heatsink Module (PHM) - 1

text_image A, B, C, D: Peek Nut on the Heatsink B D A C b c d a, b, c, d: Threaded Fastener on the CPU socket
  1. Press all four rotating wires outwards and make sure that the heatsink is securely latched unto the CPU socket.

Supermicro X12DPG-QBT6 - Installing the Processor Heatsink Module (PHM) - 2

text_image Latched State Top View
  1. With a T30-bit screwdriver, tighten all peek nuts in the sequence of "A", "B", "C", and "D" with even pressure. To avoid damaging the processor or socket, do not use a force greater than 12 lbf-in when tightening the screws.

  2. Examine all corners heatsink to ensure that the PHM is firmly attached to the CPU socket.

Supermicro X12DPG-QBT6 - Installing the Processor Heatsink Module (PHM) - 3

natural_image Technical illustration of a mechanical assembly with red arrows indicating motion or force direction (no text or symbols present)

Removing the Processor Heatsink Module from the CPU Socket

Before removing the processor heatsink module (PHM) from the motherboard, unplug the AC power cord from all power supplies after shutting down the system. Then follow the steps below:

  1. Use a T30-bit screwdriver to loosen the four peek nuts on the heatsink in the sequence of #A, #B, #C, and #D.

Supermicro X12DPG-QBT6 - Removing the Processor Heatsink Module from the CPU Socket - 1

natural_image Technical diagram of a mechanical assembly with red arrows indicating motion or force directions (no text or symbols present)
  1. Once the peek nuts are loosened from the CPU socket, press the rotating wires inwards to unlatch the PHM from the socket as shown in the drawings below.

Supermicro X12DPG-QBT6 - Removing the Processor Heatsink Module from the CPU Socket - 2

text_image Unlatched State Rotating Wire Side View Peek Nut
  1. Gently lift the PHM upwards to remove it from the CPU socket.

Supermicro X12DPG-QBT6 - Removing the Processor Heatsink Module from the CPU Socket - 3

natural_image Technical illustration of an electronic component with mounting base and internal structure, showing red directional arrows indicating assembly or movement (no text or symbols present)

Removing the Processor Carrier Assembly from the Processor Heatsink Module (PHM)

To remove the processor carrier assembly from the PHM, please follow the steps below:

  1. Detach four plastic clips (marked a, b, c, d) on the processor carrier assembly from the four corners of heatsink (marked A, B, C, D) in the drawings below.

Supermicro X12DPG-QBT6 - Removing the Processor Carrier Assembly from the Processor Heatsink Module (PHM) - 1

text_image Processor Carrier Assembly (Reverse Side View) Pin1 Pin1 a b c D A B C Heatsink (Reverse Side View)
  1. When all plastic clips are detached from the heatsink, remove the processor carrier assembly from the heatsink

Supermicro X12DPG-QBT6 - Removing the Processor Carrier Assembly from the Processor Heatsink Module (PHM) - 2

natural_image Technical diagram of an electrical transformer with red arrows indicating mounting points (no text or symbols present)

Removing the Processor from the Processor Carrier Assembly

Once you have removed the processor carrier assembly from the PHM, you are ready to remove the processor from the processor carrier by following the steps below.

  1. Unlock the lever from its locking position and push the lever upwards to disengage the processor from the processor carrier as shown in the right drawing below.

Supermicro X12DPG-QBT6 - Removing the Processor from the Processor Carrier Assembly - 1

text_image Processor Carrier Assembly Lever
  1. Once the processor is loosened from the carrier, carefully remove the processor from the processor carrier.

Supermicro X12DPG-QBT6 - Removing the Processor from the Processor Carrier Assembly - 2

Note: To avoid damaging the processor and its pins, please handle the processor with care.

Supermicro X12DPG-QBT6 - Removing the Processor from the Processor Carrier Assembly - 3

natural_image Isometric technical diagram of a computer motherboard with a highlighted component and red arrow indicating upward motion (no text or symbols)

2.3 Motherboard Installation

All motherboards have standard mounting holes to fit different types of chassis. Make sure that the locations of all the mounting holes for both the motherboard and the chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended because they ground the motherboard to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.

Tools Needed
Supermicro X12DPG-QBT6 - Motherboard Installation - 1

text_image Phillips Screwdriver (1) Phillips Screws (14) Standoffs (14) Only if Needed VGA2 LPG LPG RPG LAN RPG LAN LAN CTRL CPU2 PZ-50/01/01 PZ-50/01/01 PZ-50/01/01 PZ-50/01/01 PZ-50/01/01 PZ-50/01/01 PZ-50/01/01 PZ-50/01/01 PZ-50/01/01 PZ-50/01/01 PZ-50/1 PZ-50/1 PZ-50/1 PZ-50/1 PZ-50/1 PZ-50/1 PZ-50/1 PZ-50/1 PZ-50/1 PZ-50/1 PZ-50/1 PZ-50/1 PZ-50/1 PCC PCH PZ-NVME23 PZ-NVME23 PZ-NVME23 PZ-NVME23 PZ-NVME23 PZ-NVME23 PZ-NVME23 PZ-NVME23 PZ-NVME23 PZ-NVME23 PZ-NVME23 PZ-NVME23 PZ-NVME23 PZ-PANM PZ-PANM PZ-PANM PZ-PANM PZ-PANM PZ-PANM PZ-PANM PZ-PANM PZ-PANM PZ-PANM PZ-PANM PZ-PANM PZ-PANM PZ-PANM PZ-PANM PZ-PANM PZ-PANM PZ-FANM PZ-FANM PZ-FANM PZ-FANM PZ-FANM PZ-FANM PZ-FANM PZ-FANM PZ-FANM PZ-FANM PZ-FANM PZ-FANM PZ-FANM PZ-FANM PZ-FANM PZ-FANM PZ-FANM PCU1

Location of Mounting Holes

Supermicro X12DPG-QBT6 - Location of Mounting Holes - 1

Note 1: To avoid damaging the motherboard and its components, please do not use a force greater than 8 lbf-in on each mounting screw during motherboard installation.

Note 2: Some components are very close to the mounting holes. Please take precautionary measures to avoid damaging these components when installing the motherboard to the chassis.

Installing the Motherboard

  1. Install the I/O shield into the back of the chassis, if applicable.

  2. Locate the mounting holes on the motherboard. See the previous page for the locations.

Supermicro X12DPG-QBT6 - Installing the Motherboard - 1

text_image Chassis Chassis
  1. Locate the matching mounting holes on the chassis. Align the mounting holes on the motherboard against the mounting holes on the chassis.

Supermicro X12DPG-QBT6 - Installing the Motherboard - 2

text_image 3x8 Motherboard Chassis 3x8 Motherboard Chassis
  1. Install standoffs in the chassis as needed.

  2. Install the motherboard into the chassis carefully to avoid damaging other motherboard components.

  3. Using the Phillips screwdriver, insert a pan head #6 screw into a mounting hole on the motherboard and its matching mounting hole on the chassis.

  4. Repeat Step 6 to insert #6 screws into all mounting holes.

  5. Make sure that the motherboard is securely placed in the chassis.

Supermicro X12DPG-QBT6 - Installing the Motherboard - 3

Note: Images displayed are for illustration only. Your chassis or components might look different from those shown in this manual.

2.4 Memory Support and Installation

Supermicro X12DPG-QBT6 - Memory Support and Installation - 1

Note: Check the Supermicro website for recommended memory modules.

Supermicro X12DPG-QBT6 - Memory Support and Installation - 2

Important: Exercise extreme care when installing or removing DIMM modules to prevent any possible damage.

Memory Support

The X12DPG-QBT6 supports up to 4 TB of 3DS LRDIMM/LRDIMM/3DS RDIMM/RDIMM DDR4 (288-pin) ECC memory with speeds of 3200/2933/2666 MT/s in 16 memory slots and up to 4 TB of Intel Optane PMem 200 Series with speeds of up to 3200 MT/s. (See the notes below.)

Supermicro X12DPG-QBT6 - Memory Support - 1

Note 1: The Intel Optane PMem 200 Series are supported by the 3rd Gen. Intel Xeon Scalable (83xx/63xx/53xx/4314) Series Processors.

Note 2: Memory speed support depends on the processors used in the system.

DDR4 Memory Support for the 3rd Gen. Intel Xeon Scalable Processors

DDR4 Memory Support for the 3rd Gen. Intel Xeon Scalable Processors
TypeRanks Per DIMM & Data WidthDIMM Capacity (GB)Speed (MT/s); Voltage (V); Slots Per Channel (SPC) and DIMMs Per Channel (DPC)
1DPC(1-DIMM Per Chan- nel)2DPC(2-DIMM Per Channel)
8Gb 16Gb1.2 V 1.2 V
RDIMMSRx8 8GB 16GB3200 3200
SRx4 16GB 32GB
DRx8 16GB 32GB
DRx4 32GB 64GB
RDIMM 3Ds (4R/8R) X42H- 64 GB4H-128 GB2H- 128 GB4H-256 GB
LRDIMM QRx4 64GB 128GB 3200 3200
LRDIMM - 3Ds(4R/8R) X44H-128 GB2H- 128 GB4H-256 GB3200 3200

Memory Population Table for the 3rd Gen. Intel Xeon Scalable Processors

Memory Population Table (with 16 Slots)
When 1 CPU is used: Memory Population Sequence
1 CPU & 1 DIMM CPU1:P1-DIMMA1
1 CPU & 2 DIMMs NoteCPU1: P1-DIMMA1/P1-DIMME1
1 CPU & 4 DIMMs NoteCPU1: P1-DIMMA1/P1-DIMME1/P1-DIMMC1/P1-DIMMG1
1 CPU & 6 DIMM CPU1:P1-DIMMA1/P1-DIMME1/P1-DIMMC1/P1-DIMMG1/P1-DIMMB1/P1-DIMMF1
1 CPU & 8 DIMMs NoteCPU1: P1-DIMMA1/P1-DIMME1/P1-DIMMC1/P1-DIMMG1/P1-DIMMB1/P1-DIMMF1/P1-DIMMD1/P1-DIMMH1
When 2 CPUs are used: Memory Population Sequence
2 CPUs & 2 DIMMs NoteCPU1: P1-DIMMA1CPU2: P2-DIMMA1
2 CPUs & 4 DIMMs NoteCPU1: P1-DIMMA1/P1-DIMME1CPU2: P2-DIMMA1/P2-DIMME1
2 CPUs & 6 DIMMsCPU1: P1-DIMMA1/P1-DIMME1/P1-DIMMC1/P1-DIMMG1CPU2: P2-DIMMA1/P2-DIMME1
2 CPUs & 8 DIMMs NoteCPU1: P1-DIMMA1/P1-DIMME1/P1-DIMMC1/P1-DIMMG1CPU2: P2-DIMMA1/P2-DIMME1/P2-DIMMC1/P2-DIMMG1
2 CPUs & 10 DIMMsCPU1: P1-DIMMA1/P1-DIMME1/P1-DIMMC1/P1-DIMMG1/P1-DIMMB1/P1-DIMMF1CPU2: P2-DIMMA1/P2-DIMME1/P2-DIMMC1/P2-DIMMG1
2 CPUs & 12 DIMMs NoteCPU1: P1-DIMMA1/P1-DIMME1/P1-DIMMC1/P1-DIMMG1/P1-DIMMB1/P1-DIMMF1CPU2: P2-DIMMA1/P2-DIMME1/P2-DIMMC1/P2-DIMMG1/P2-DIMMB1/P2-DIMMF1
2 CPUs & 14 DIMMsCPU1: P1-DIMMA1/P1-DIMME1/P1-DIMMC1/P1-DIMMG1/P1-DIMMB1/P1-DIMMF1/P1-DIMMD1/P1-DIMMH1CPU2: P2-DIMMA1/P2-DIMME1/P2-DIMMC1/P2-DIMMG1/P2-DIMMB1/P2-DIMMF1
2 CPUs & 16 DIMMs NoteCPU1: P1-DIMMA1/P1-DIMME1/P1-DIMMC1/P1-DIMMG1/P1-DIMMB1/P1-DIMMF1/P1-DIMMD1/P1-DIMMH1CPU2: P2-DIMMA1/P2-DIMME1/P2-DIMMC1/P2-DIMMG1/P2-DIMMB1/P2-DIMMF1/P2-DIMMH1

Supermicro X12DPG-QBT6 - Memory Support - 2

Note: This memory configuration is recommended by Supermicro for optimal memory performance. Please use this configuration to maximize your memory performance.

Intel Optane PMem 200 Series Memory Population Table (with 16 Slots)

Supermicro X12DPG-QBT6 - Intel Optane PMem 200 Series Memory Population Table (with 16 Slots) - 1

Note: The Intel Optane PMem 200 Series are supported by the 3rd Gen. Intel Xeon Scalable (83xx/63xx/53xx/4314) Series Processors.

16-DIMM Motherboard PMem Population within 1 CPU socket
DDR4+PMemMode ADInterleaveP1-DIMMF1P1-DIMME1P1-DIMMH1P1-DIMMG1P1-DIMMC1P1-DIMMD1P1-DIMMA1P1-DIMMB1
4+4ADMMOne - x4PMemDDR4PMemDDR4DDR4PMemDDR4PMem
One - x4DDR4PMemDDR4PMemPMemDDR4PMemDDR4
6+1 AD One - x1DDR4 DDR4 - DDR4 DDR4 PMem DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR 4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4DR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4 DDR4
Legend (for the table above)
DDR4 Type and Capacity
DDR4See Validation Matrix (DDR4 DIMMs validated with DCPMM)
Capacity
PMemAny Capacity (Uniformly for all channels for a given configuration)
  • Mode definitions: AD = App Direct Mode, MM = Memory Mode.
  • No mixing of PMem and NVDIMMs within the platform.
  • For MM, NM/FM ratio is between 1:4 and 1:16. The capacity not used for FM can be used for AD. (NM = Near Memory (DRAM); FM = Far Memory (PMem)).
  • Matrix targets configs for optimized PMem to DRAM cache ratio in MM mode.
  • For each individual population, different PMem rearrangements among channels are permitted so long as the configuration doesn't break X12 DP Memory population rules.
  • Ensure the same DDR4 DIMM type and capacity are used for each DDR4 + PMem population.
  • If the system detects an unvalidated configuration, then the system issues a BIOS warning. The CLI functionality is limited in non-POR configurations, and select commands will not be supported.
Validation Matrix (DDR4 DIMMS with PMem 200 Series)
DIMM TypeRanks Per DIMM & Data Width (Stack)DIMM Capacity (GB)
DRAM Density
8Gb16Gb
RDIMM (up to 3200)1Rx8N/AN/A
1Rx416GB32GB
1Rx816GB32GB
1Rx432GB64GB
RDIMM 3DS (up to 3200)4Rx4 (2H)N/A128GB
8Rx4 (4H)NA256GB
LRDIMM (up to 3200)4Rx464GB128GB
LRDIMM 3DS (up to 3200)4Rx4 (2H)N/AN/A
8Rx4 (4H)126GB256GB

DIMM Installation

  1. Insert the desired number of DIMMs into the memory slots based on the recommended DIMM population tables in the previous section. Locate DIMM memory slots on the motherboard as shown on the right.

  2. Push the release tabs outwards on both ends of the DIMM slot to unlock it.

Supermicro X12DPG-QBT6 - DIMM Installation - 1

natural_image Top-down view of a computer motherboard with multiple CPU socket and drive bays (no visible text or labels)

Supermicro X12DPG-QBT6 - DIMM Installation - 2

text_image Release Tabs
  1. Align the key of the DIMM module with the receptive point on the memory slot.

Supermicro X12DPG-QBT6 - DIMM Installation - 3

text_image Key
  1. Align the notches on both ends of the module against the receptive points on the ends of the slot. Notches

Supermicro X12DPG-QBT6 - DIMM Installation - 4

text_image Notches
  1. Push both ends of the module straight down into the slot until the module snaps into place.

  2. Press the release tabs to the lock positions to secure the DIMM module into the slot.

Supermicro X12DPG-QBT6 - DIMM Installation - 5

text_image Push both ends straight down into the memory slot.

DIMM Removal

Press both release tabs on the ends of the DIMM module to unlock it. Once the DIMM module is loosened, remove it from the memory slot.

Supermicro X12DPG-QBT6 - DIMM Removal - 1

Warning! Please do not use excessive force when pressing the release tabs on the ends of the DIMM socket to avoid causing any damage to the DIMM module or the DIMM socket. Please handle DIMM modules with care. Carefully follow all the instructions given on Page 1 of this chapter to avoid ESD-related damages done to your memory modules or components.

2.5 Rear I/O Ports

See Figure 2-1 below for the locations and descriptions of the various I/O ports on the rear of the motherboard.

Supermicro X12DPG-QBT6 - Rear I/O Ports - 1

text_image JPTG1 VAC CODE IP341 CODE BAR CODE DCM2 PAND PANC VGA1 JFNB1 P1.SLOT2.PCE-4.0 X16 P1.SLOT4.PCE-4.0 X16 X2DPO 0876 PU2.SLOT6.PCE-4.0 X16 P2.SLOT8.PCE-4.0 X16 X2DPO 0876 PU2.SLOT10.PCE-4.0 X16 PU2.DIMW1 P2.DIMW1 P2.DIMW1 P2.DIMW1 CPU2 PCH JETI BT1 SP1 JFWH P1.NVME2/3 P1.NVME0/1 P1.DIMW1 P1.DIMW1 P1.DIMW1 P1.DIMW1 P1.DIMW1 P1.DIMW1 P1.DIMW1 P1.DIMW1 P1.DIMW1 P1.DIMW1 P1.DIMW1 P1.DIMW1 P1.DIMW1 P1.DIMW1 P1.DIMW1

Figure 2-1. I/O Port Locations and Definitions
Supermicro X12DPG-QBT6 - Rear I/O Ports - 2

text_image Diagram showing the number of Ethernet ports and connectors with labeled parts from 1 to 10
Rear I/O Ports
#Description # Description
1COM Port 1 6 USB5 (3.0)
2Dedicated BMC LAN 7 LAN1
3USB2 (3.0) 8 LAN2
4USB3 (3.0) 9 (Rear) VGA Port
5USB4 (3.0) 10 UID Switch / BMC Reset

VGA Connections

There are two VGA connections in your system. The rear VGA port (VGA2) is located on the rear I/O panel, and the front VGA header is located at VGA1 on the motherboard. These VGA connections provide analog interface support between the computer and the video displays. Refer to the layout below for the locations of VGA connections.

COM Port/Header

One COM port and one COM header that support serial link interface are on the motherboard. COM1 is located on the rear I/O panel. COM2 is located next to VGA1. Refer to the layout below for the locations of COM1 and COM2.

Supermicro X12DPG-QBT6 - COM Port/Header - 1

text_image Labeled diagram of a computer motherboard showing CPU, CPU1, and hardware components with numbered annotations.
  1. (Rear) VGA2
  2. (Front) VGA1
  3. (Rear) COM1
  4. (Front) COM2

LAN Ports (LAN1/LAN2 and BMC LAN)

Two Ethernet LAN ports (LAN1, LAN2) and a dedicated BMC LAN port (BMC_LAN) are located on the rear I/O panel. LAN1/LAN2 ports support 10 GbE LAN connections (via the Broadcom BCM57416 LAN controller). The dedicated BMC LAN port, located above the USB2/3 ports on the rear I/O panel, provides LAN support for the Baseboard Management Controller (BMC). All of these LAN ports accept RJ45 cables. Please refer to the LED Indicator section (Section 2.9) for LAN LED information.

Supermicro X12DPG-QBT6 - LAN Ports (LAN1/LAN2 and BMC LAN) - 1

text_image Labeled diagram of a computer motherboard showing CPU, CPU1, and CPU2 components with pin labels and connectors
  1. LAN1
  2. LAN2
  3. BMC LAN Port

Supermicro X12DPG-QBT6 - LAN Ports (LAN1/LAN2 and BMC LAN) - 2

text_image Diagram showing labeled components of a computer tower or rack with ports and connectors

Universal Serial Bus (USB) Ports and Headers

There are four USB 3.0 ports (USB2, USB3, USB4, USB5), which are located on the rear I/O panel, and three USB headers (USB0/1, USB6/7, USB8) located on the motherboard. The USB headers provide front USB access. The 10-pin black USB header supports two USB 2.0 connections (USB0/1), and the 12-pin blue USB header supports two USB 3.0 connections (USB6/7). USB8 is a Type-A USB 3.0 connector. These USB ports/headers/connector can be used for USB support via USB cables (not included).

Front Panel USB 2.0 HeaderPin Definitions
Pin# Definition Pin# Definition
1 +5V2 +5V
3 USB_N4 USB_N
5 USB_P6 USB_P
7 Ground8 Ground
9 Key10 NC
Rear I/O Panel USB 3.0 Port Pin Definitions
Pin# Definition Pin# Definition
1 VBUS1 10 VBUS2
2 USB2_N_1 11 USB2_N_2
3 USB2_P_1 12 USB2_P_2
4 GND 13 GND
5 USB3_RN_1 14 USB3_RN_2
6 USB3_RP_1 15 USB3_RP_2
7 GND 16 GND
8 USB3_TN_1 17 USB3_TN_2
9 USB3_TP_1 18 USB3_TP_2
Front Panel USB 3.0 HeaderPin Definitions
Pin# DefinitionPin# Definition
1VBUS19 Power
2Stda_SSRX-18 USB3_RN
3Stda_SSRX+17 USB3_RP
4GND16 GND
5Stda_SSTX- 15 USB3_TN
6Stda_SSTX+14 USB3_TP
7GND13 GND
8D-12 USB_N
9D+11 USB_P
10x
Type-A USB 3.0 (USB8)Pin Definitions
Pin# DefinitionPin# Definition
1 VBUS 5 SSRX-
2 USB N 6SSRX+
3 USB P7 GND
4 Ground 8SSTX-
9 SSTX+

Supermicro X12DPG-QBT6 - Universal Serial Bus (USB) Ports and Headers - 1

text_image Labeled diagram of a computer motherboard showing CPU, CPU1, and peripheral components with numbered annotations.
  1. Front Access USB0/1 (2.0)
  2. Rear I/O Panel USB2/3 (3.0)
  3. Rear I/O Panel USB4/5 (3.0)
  4. Front Access USB6/7 (3.0)
  5. Type-A USB8 (3.0)

UID (Unit Identifier)/BMC Reset Switch and UID/BMC Reset LED Indicators

A UID LED/BMC Reset switch (JUIDB1) is located on the rear side of the motherboard. This switch has dual functions. It can be used to identify a system unit that is in need of service, and it can also be used to reset the BMC settings.

When functioning as a BMC reset switch, JUIDB1 will trigger a cold reboot when the user presses and holds the switch for six seconds. It will also restore the BMC to the manufacturer's default when the user presses and holds the switch for 12 seconds.

When functioning as a UID LED switch, JUIDB1 will turn both rear UID LED (LE6) and front UID LED (Pin 7/Pin 8 of JF1) on and off when the user presses the switch on/off.

To achieve these dual purposes, the UID LED/BMC Reset switch works in conjunction with the BMC Heartbeat LED (LEDBMC) and front/rear UID LEDs. Please note that UID can also be triggered via BMC on the motherboard. For more details on the UID LEDs and BMC LEDs, refer to the tables below. Also, refer to the BMC User's Guide posted on our website at http://www.supermicro.com for more information on BMC.

UID/BMC Reset Switch (JUIDB1)Features & Settings
When Used as a UID LED Switch When Used as a BMC Reset Switch
Work w/ Rear UID LED (LED1) & Front UID LED (JF1: Pins 7 & Pins 8)Work with BMC Heartbeat LED (LEDBMC)
Rear UID LEDLED1Blue: Unit identifiedBMC Heartbeat LEDLEDBMCBlinking green: BMC Normal
Front UID LEDPins 7 & 8 (JF1) Blue: Unit identified BMC RReset: Press& hold the switch(JUIDB1) 6 secondsLEDBMC: Solid green: during rebootTriggering a cold reboot; LED: Solid green on during cold reboot
Press the switch (JUIDB1) to turn on and off both rear and front UID LED indicators.BMC Reset: Press& hold the switch(JUIDB1) 12 secondsLEDBMC: Solid green: during BMC resetBMC: Reset to the manufacturer's default; LED solid on during BMC Reset
UID/BMC Reset Switch (JUIDB1) Pin Definitions
Pin#Definition
1Ground
2Ground
3Button In
4Button In

* Refer to the next page for the locations of JUIDB1, LED1, Pin7/Pin8 of JF1, and LEDBMC.

Supermicro X12DPG-QBT6 - UID (Unit Identifier)/BMC Reset Switch and UID/BMC Reset LED Indicators - 1

text_image Labeled diagram of a computer motherboard showing CPU, CPU2, and peripheral components with pin numbers and connectors
  1. UID Switch / BMC Reset
  2. Rear UID LED (LED1)
  3. Front UID LED
  4. BMC Heartbeat LED (LEDBMC)

Supermicro X12DPG-QBT6 - UID (Unit Identifier)/BMC Reset Switch and UID/BMC Reset LED Indicators - 2

natural_image Row of electronic circuit ports including Ethernet, USB, and VGA connectors (no visible text or labels)

Supermicro X12DPG-QBT6 - UID (Unit Identifier)/BMC Reset Switch and UID/BMC Reset LED Indicators - 3

bar JF1 | Category | Value | |---|---| | Power Button | ○ | | Reset Button | ○ | | 3.3V | ○ | | Red+ (Blue LED_Cathode_UID) | ○ | | NIC2 (Activity) LED | ○ | | NIC1 (Activity) LED | ○ | | ID_UID/3.3V Stby | ○ | | 3.3V | ○ | | Key | ○ | | NMI | ○ | | Ground | ○ | | Power Fail (for LED6) | ○ | | Blue+ (Red OH/Fan Fail/PWR Fail for LED5/Blue UID LED) | ○ | | 19 | 20 | 3

2.6 Front Control Panel

The front control panel header (JF1) contains header pins for various buttons and indicators that are normally located on a control panel at the front of the chassis. These connectors are designed specifically for use with Supermicro chassis. Refer to the figure below for the descriptions of the front control panel buttons and LED indicators.

Supermicro X12DPG-QBT6 - Front Control Panel - 1

text_image Labeled diagram of a computer motherboard showing CPU, GPU, and peripheral components with part numbers and connectors.

Supermicro X12DPG-QBT6 - Front Control Panel - 2

bar_stacked JF1 | Component | 1 | 2 | | :--- | :--- | :--- | | Power Button | ○ | ○ | | Reset Button | ○ | ○ | | 3.3V | ○ | ○ | | Red+ (Blue LED_Cathode_UID) | ○ | ○ | | NIC2 (Activity) LED | ○ | ○ | | NIC1 (Activity) LED | ○ | ○ | | ID_UID/3.3V Stby | ○ | ○ | | 3.3V | ○ | ○ | | Key | ○ | ○ | | NMI | ○ | ○ | | Ground | 19 | 20 | Power Fail (for LED6) Blue+ (Red OH/Fan Fail/PWR Fail for LED5/Blue UID LED) NIC2 (Link) LED NIC1 (Link) LED HDD LED FP PWR LED Key Ground

Figure 2-2. JF1 Header Pins

Front Control Panel LEDs
Supermicro X12DPG-QBT6 - Front Control Panel - 3

bar_stacked JF1 | Component | 1 | 2 | Ground | | :--- | :--- | :--- | :--- | | Power Button | ○ | ○ | Ground | | Reset Button | ○ | ○ | Ground | | 3.3V | ○ | ○ | Power Fail (for LED6) | | Red+ (Blue LED_Cathode_UID) | Blue+ | ○ | (Red OH/Fan Fail/PWR Fail for LED5/Blue UID LED) | | NIC2 (Activity) LED | ○ | ○ | NIC2 (Link) LED | | NIC1 (Activity) LED | ○ | ○ | NIC1 (Link) LED | | ID_UID/3.3V Stby | ○ | ○ | HDD LED | | 3.3V | ○ | ○ | FP PWR LED | | Key | ○ | ○ | Key | | NMI | ○ | ○ | Ground | | 19 | 0 | 0 | 0 | The chart displays a vertical bar chart with 20 segments labeled 'Ground' at the top and '19' at the bottom. The values in the middle section are explicitly labeled as 'Ground'.
Front Control Panel (JF1)LED Indicators
Event Power (LED1) HDD (LED2) LAN (LED3/4) UID (LED5) Information (LED5) Power Fail (LED6)
Power On Solid On
HDD Activity Blinking
NIC Activity Blinking
Overheat Solid On
Fan Fail Blinking at 1Hz
Power Fail Blinking at 1/4Hz Solid On
Local UID OnSolid On
Remote UID OnBlinking 1Hz
CheckingBMC/BIOS Blinking at 4HZ
Recovering/UpdatingBMC Blinking at 4HZ BMC 2 Blinks at 4Hz, 1 Pause at 2Hz (on-on-off-off(BIOS/BMC Blinking at 10Hz
Flash Not Detected or Golden Image Check FailedBMC/BIOS Blinking at 1HZ
CPLD Recovery ModeBlinking at 10Hz (MB UID LED)Blinking at 10Hz (FP Red LED)

Power On & BMC/BIOS Status LED Button

The Power On and BMC/BIOS Status LED button is located on pins 1 and 2 of JF1. Momentarily contacting both pins will power on/off the system or display BMC/BIOS status. Refer to the tables below for more information.

Power Button & BIOS/BMC Status LED Indicator Pin Definitions (JF1)
Pin# Definition
1 Signal
2 Ground
Power ButtonPin Definitions (Pin 1 & Pin 2 of JF1)
Status Event
Green: solid on System power on
BMC/BIOS blinking green at 4Hz BMC/BIOS checking
BIOS blinking green at 4Hz BIOS recovery/update in progress
BMC blinking red x2 (2 blinks red) at 4Hz, 1 pause at 2Hz (on-on-off-off)BMC recovery/update in progress
BMC/BIOS blinking green at 1Hz Flash not detected or golden imagechecking failure

Reset Button

The Reset Button connection is located on pins 3 and 4 of JF1. Momentarily contacting both pins will reset the system. Refer to the table below for pin definitions.

Reset ButtonPin Definitions (JF1)
Pin# Definition
3 Reset
4 Ground

Supermicro X12DPG-QBT6 - Reset Button - 1

text_image JF1 1 2 Power Button ○ ○ Ground Reset Button ○ ○ Ground 3.3V ○ ○ Power Fail (for LED6) Blue+ ○ (Red OH/Fan Fail/PWR Fail for LED5/Blue UID LED) (Blue LED_Cathode_UID) NIC2 (Activity) LED ○ ○ NIC2 (Link) LED NIC1 (Activity) LED ○ ○ NIC1 (Link) LED ID_UID/3.3V Stby ○ ○ HDD LED 3.3V ○ ○ FP PWR LED Key ○ ○ Key NMI ○ ○ Ground 19 20
  1. PWR Button

  2. Reset Button

Power Fail LED

The Power Fail LED connection is located on pins 5 and 6 of JF1. When this LED turns solid red, it indicates a power failure. Refer to the table below for pin definitions.

Power Fail LEDPin Definitions (JF1)
Pin#Definition
5 3.3V
6 PWR Fail for LED6 (Solid red on: PWR failure)

Information LED (OH/Fan Fail/PWR Fail/UID LED)

The Information LED (OH/Fan Fail/PWR Fail/UID LED) connection is located on pins 7 and 8 of JF1. The LED on pin 7 is active when the UID button (JUIDB1) on the rear I/O panel is pressed. The LED on pin 8 provides warnings of overheat, power failure, or fan failure. Refer to the table below for more information.

Information LED-Blue+ (OH/Fan Fail/PWR Fail LED for LED5/blue UID LED) Pin Definitions (Pin 7 & Pin 8 of JF1)
Status Description
Solid red (on) An overheat condition has occurred.
Blinking red (1Hz) Fan failure: check for an inoperative fan.
Blinking red (0.25Hz) Power failure: check for a non-operational power supply
Blinking red (10Hz) (FP red LED) CPLD recovery mode error(s)
Solid blue Local UID is activated. Use this function to locate a unit in a rack mount environment that might be in need of service.
Blinking blue (1Hz)Remote UID is on. Use this function to identify a unit from a remote location that might be in need of service.
BIOS/BMC blinking blue (10Hz) BIOS/BMC: recovery and/or update in progress
Red Info LED blinking (10Hz) and CPLD: recovery and/or update in progress
MB UID LED blue blinking (10Hz)

Supermicro X12DPG-QBT6 - Information LED (OH/Fan Fail/PWR Fail/UID LED) - 1

text_image JF1 1 2 Power Button ○ ○ Ground Reset Button ○ ○ Ground 3.3V ○ ○ Power Fail (for LED6) Red+ Blue+ (Blue LED_Cathode_UID) ○ ○ (Red OH/Fan Fail/PWR Fail for LED5/Blue UID LED) NIC2 (Activity) LED ○ ○ NIC2 (Link) LED NIC1 (Activity) LED ○ ○ NIC1 (Link) LED ID_UID/3.3V Stby ○ ○ HDD LED 3.3V ○ ○ FP PWR LED Key ○ ○ Key NMI ○ ○ Ground 19 20 1. Pow 2. Info

The NIC (Network Interface Controller) LED connection for LAN port 1 is located on pins 11 and 12 of JF1, and LAN port 2 is on pins 9 and 10. Refer to the tables below for pin definitions.

LAN1/LAN2 LEDPin Definitions (JF1)
Pin#DefinitionPin#Definitin
9 NIC2 ActivityLED 10 NIC2 LinkLED
11 NIC1 ActivityLED 12 NIC1 LinkLED
LAN1/LAN2 LEDPin Definitions (JF1)
Color State
NIC 2: Blinking green LAN2: Active
NIC 1: Blinking green LAN1: Active

ID\_UID Switch/HDD LED

The UID Switch/HDD LED connection is located on pins 13 and 14 of JF1. The UID switch is used for a chassis that supports a front UID switch. The front UID switch functions in the same way as the rear UID switch; both are for input only and cannot be used for output.

When this LED is blinking green, it indicates HDD is active. Attach a cable to pins 13 and 14 to show ID_UID status and hard drive activity. Refer to the tables below for pin definitions.

ID_UID/HDD LEDPin Definitions (JF1)
Pins Definition
13 IDUID/3.3V Stdby
14 HDD Activity
ID_UID/HDD LEDPin Definitions (JF1)
Color State
Blinking Green HDDActive

Supermicro X12DPG-QBT6 - ID\_UID Switch/HDD LED - 1

bar_stacked JF1 | Category | Node | Value | |---|---|---| | Power Button | ○ | Ground | | Reset Button | ○ | Ground | | 3.3V | ○ | Power Fail (for LED6) | | Red+ (Blue LED_Cathode_UID) | ○ | Blue+ (Red OH/Fan Fail/PWR Fail for LED5/Blue UID LED) | | NIC2 (Activity) LED | ○ | NIC2 (Link) LED | | NIC1 (Activity) LED | ○ | NIC1 (Link) LED | | ID_UID/3.3V Stby | ○ | HDD LED | | 3.3V | ○ | FP PWR LED | | Key | ○ | Key | | NMI | ○ | Ground | | 19 | 20 | 19 | The chart displays a single column of values with 'Ground' as the top row and 'ID_UID/3.3V Stby' as the bottom row. The first row contains 'Ground' and the second row contains 'FP PWR LED'.

The Front Panel Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below for pin definitions.

FP Power LEDPin Definitions (JF1)
Pins Definition
15 3.3V
16 FPPWR LED

NMI Button

The non-maskable interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer to the table below for pin definitions.

NMI ButtonPin Definitions (JF1)
Pins Definition
19 NMI
20 Ground

Supermicro X12DPG-QBT6 - NMI Button - 1

bar | Component | Value | | :--- | :--- | | Power Button | ○ | | Reset Button | ○ | | 3.3V | ○ | | Red+ (Blue LED_Cathode_UID) | ○ | | NIC2 (Activity) LED | ○ | | NIC1 (Activity) LED | ○ | | ID_UID/3.3V Stby | ○ | | 3.3V | ○ | | FP PWR LED | ○ | | Key | ○ | | NMI | ○ | | Ground | ○ | | Power Fail (for LED6) | ○ | | Ground | ○ | | (Red OH/Fan Fail/PWR Fail for LED5/Blue UID LED) | ○ | | NIC2 (Link) LED | ○ | | NIC1 (Link) LED | ○ | | HDD LED | ○ | | 19 | ○ | | 20 | ○ |
  1. FP PWR LED
  2. NMI

2.7 Connectors

Power Connections

ATX Power Supply Connector

The 24-pin power supply connector (JPWR1) meets the ATX SSI EPS 12V specification. You must also connect the 8-pin 12V DC power connectors (JPWR2/JPWR3/JPWR4) and the 4-pin 12V DC power connector (JPWR5) to the power supply to provide adequate power to your system.

Supermicro X12DPG-QBT6 - ATX Power Supply Connector - 1

Important: To provide adequate power supply to the motherboard, be sure to connect the 24-pin ATX PWR, 8-pin PWR, and 4-pin PWR connectors to the power supply. Failure to do so may void the manufacturer warranty on your power supply and motherboard.

ATX Power 24-pin Connector Pin Definitions
Pin# Definition Pin# Definition
13 +3.3V 1 +3.3V
14 NC 2 +3.3V
15 Ground 3 Ground
16 PS_ON 4 +5V
17 Ground 5 Ground
18 Ground 6 +5V
19 Ground 7 Ground
20 Res (NC) 8 PWR_OK
21 +5V 9 5VSB
22 +5V 10 +12V
23 +5V 11 +12V
24 Ground 12 +3.3V

Required Connection

12V 8-pin Power Pin Definitions
Pin# Definition
1 - 4 Ground
5 - 8 +12V

Required Connection

12V 4-pin Power Pin Definitions
Pin# Definition
1 Ground
2 Ground
3 +12V
4 +12V

Required Connection

Supermicro X12DPG-QBT6 - ATX Power Supply Connector - 2

text_image Labeled diagram of an electronic circuit board showing CPU, RAM, memory, and peripheral components with numbered pins.
  1. JPWR1: 24-pin ATX PWR
  2. JPWR2: 8-pin PWR
  3. JPWR3: 8-pin PWR
  4. JPWR4: 8-pin PWR
  5. JPWR5: 4-Pin PWR

Headers

Fan Headers

There are ten 4-pin fan headers (FAN1 - FAN6, FANA - FAND) on the motherboard. All these 4-pin fan headers are backwards compatible with the traditional 3-pin fans. However, fan speed control is available for 4-pin fans only by Thermal Management via the BMC interface. Refer to the table below for pin definitions.

Fan HeaderPin Definitions
Pin# Definition
1 Ground
2 2.5A/+12V
3 Tachometer
4 PWM_Control

Internal Speaker/Buzzer

The Internal Speaker/Buzzer (SP1) is used to provide audible indications for various beep codes. Refer to the table below for pin definitions.

Internal BuzzerPin Definitions
Pin# Definition
1 Pos(+) Beep In
2 Neg(-) Alarm Speaker

Supermicro X12DPG-QBT6 - Internal Speaker/Buzzer - 1

text_image Labeled diagram of a computer motherboard showing CPU, RAM slots, and hardware components with numbered annotations.
  1. FAN1
  2. FAN2
  3. FAN3
  4. FAN4
  5. FAN5 (CPU1 Fan Header)
  6. FAN6 (CPU2 Fan Header)
  7. FANA
  8. FANB
  9. FANC
  10. FAND
  11. Internal Speaker/Buzzer

S-SGPIO Header

The S-SGPIO (Serial General Purpose Input/Output) header (S-SGPIO2) is used to communicate with the enclosure management chip on the backplane. Refer to the table below for pin definitions.

S-SGPIO HeaderPin Definitions
Pin# Definition Pin# Definition
1 NC 2 NC
3 Ground 4 Data
5 Load 6 Ground
7 Clock 8 NC

NC = No Connection

Audio Front Panel Header

A 10-pin audio header (AUDIO_FP) located on the motherboard allows you to use the onboard sound chip (ALC888S) for audio function. Connect an audio cable to this header to use this feature. Refer to the table below for pin definitions.

Audio HeaderPin Definitions
Pin# Definition Pin# Definition
1 Microphone_Left 2 Audio_Ground
3 Microphone_Right 4 Audio_Detect
5 Line_2_Right 6 Ground
7 Jack_Detect 8 Key
9 Line_2_Left 10 Ground

Supermicro X12DPG-QBT6 - Audio Front Panel Header - 1

text_image Labeled diagram of a computer motherboard showing CPU, GPU, and PCI components with connectors and ports
  1. S-SGPIO Header (S-SGPIO2)

  2. Audio Front Panel Header

TPM/Port 80 Header

The JTPM1 header is used to connect a Trusted Platform Module (TPM)/Port 80, which is available from Supermicro (optional). A TPM/Port 80 header is a security device that supports encryption and authentication in hard drives. It allows the motherboard to deny access if the TPM associated with the hard drive is not installed in the system. Refer to the layout below for the location of TPM header. Please go to the following link for more information on the TPM: http://www.supermicro.com/manuals/other/TPM.pdf.

Trusted Platform Module HeaderPin Definitions
Pin# Definition Pin# Definition
1 +3.3V 2 SPI_CS#
3 RESET# 4 SPI_MISO
5 SPI_CLK 6 GND
7 SPI_MOSI 8 NC
9 +3.3V Stdby 10 SPI_IRQ#

Supermicro X12DPG-QBT6 - TPM/Port 80 Header - 1

text_image Labeled technical diagram of a computer motherboard showing CPU, RAM, and peripheral components with part numbers and connectors.
  1. TPM Header

VROC RAID Key Header

A VROC RAID Key header is located at JRK1 on the motherboard. Install a VROC RAID Key on JRK1 for NVMe RAID support as shown in the illustration below. Please refer to the layout below for the location of JRK1.

Intel VROC KeyPin Definitions
Pin#Definition
1Ground
23.3V Standby
3Ground
4PCH RAID Key

Supermicro X12DPG-QBT6 - VROC RAID Key Header - 1

text_image VROC Key VROC Key Header (JRK1)

Supermicro X12DPG-QBT6 - VROC RAID Key Header - 2

Note: The graphics contained in this user's manual are for illustration only. The components installed in your system may or may not look exactly the same as the graphics shown in the manual.

Supermicro X12DPG-QBT6 - VROC RAID Key Header - 3

text_image Labeled diagram of a computer motherboard showing CPU, CPU2, and PCI components with connectors and ports
  1. VROC RAID Key Header (JRK1)

Standby Power

The Standby Power header is located at JSTBY1 on the motherboard. You must have a card with a Standby Power connector and a cable to use this feature. Refer to the table below for pin definitions.

Standby Power Pin Definitions
Pin# Definition
1 +5VStandby
2 Ground
3 No Connection

Disk-On-Module Power Connector

The Disk-On-Module (DOM) power connectors at JSD1 and JSD2 provide 5V power to a solid-state DOM storage devices connected to one of the SATA ports. Refer to the table below for pin definitions.

DOM Power Pin Definitions
Pin# Definition
1 5V
2 Ground
3 Ground

Supermicro X12DPG-QBT6 - Disk-On-Module Power Connector - 1

text_image Labeled diagram of a computer motherboard showing CPU, CPU2, and memory components with numbered annotations
  1. Standby Power Header
  2. Disk-On-Module (DOM) Power Connector (JSD1)
  3. Disk-On-Module (DOM) Power Connector (JSD2)

Power SMB (I²C) Header

The Power System Management Bus (I²C) connector (JPI2C1) monitors the power supply, fan, and system temperatures. Refer to the table below for pin definitions.

Power SMB HeaderPin Definitions
Pin#Definition
1Clock
2Data
3PMBUS_Alert
4Ground
5+3.3V

4-pin BMC External I²C Header

A System Management Bus header for BMC is located at JIPMB1. Connect the appropriate cable here to use the IPMB I ^2 C connection on your system. Refer to the table below for pin definitions.

External I2C Header Pin Definitions
Pin#Definition
1Data
2Ground
3Clock
4No Connection

Supermicro X12DPG-QBT6 - 4-pin BMC External I²C Header - 1

text_image Labeled diagram of a computer motherboard showing CPU, CPU1, and peripheral components with connectors and ports.
  1. Power SMB Header
  2. BMC External Header

Chassis Intrusion

A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable from the chassis to inform you when the chassis is opened. Refer to the table below for pin definitions.

Chassis Intrusion Pin Definitions
Pin# Definition
1 Intrusion Input
2 Ground

NVMe SMBus Headers

NVMe SMBus (I²C) header (JNVI2C), used for PCIe SMBus clock and data connections, provides hot-plug support via a dedicated SMBus interface. This feature is only available for a Supermicro complete system with an SMCI-proprietary NVMe add-on card and a proper cable installed. Refer to the table below for pin definitions.

NVMe SMBus Header Pin Definitions
Pin#Definition
1Data
2Ground
3Clock
4VCCIO

Supermicro X12DPG-QBT6 - NVMe SMBus Headers - 1

text_image Labeled diagram of a computer motherboard showing CPU, CPU1, and BNC components with pinouts and connectors
  1. Chassis Intrusion Header
  2. NVMe I²C Header

PCIe 4.0/SATA 3.0 Hybrid M.2 Slots

This motherboard has two PCIe 4.0 x4/SATA 3.0 hybrid M.2 slots (M.2-HC1, M.2-HC2). M.2 allows for a variety of card sizes, increased functionality, and spatial efficiency. The M.2 slots on the motherboard support the 2242, 2260, 2280, and 22110 form factors.

Inlet Sensor Header

This header (JSEN1) allows BMC to monitor thermal inlet temperature. A special module is required. Please contact Supermicro at www.supermicro.com to purchase the module for this header. Refer to the table below for pin definitions.

Inlet Sensor Header Pin Definitions
Pin# Definition
1SMBDAT
2Ground
3SMBCLK
43.3V STBY

Supermicro X12DPG-QBT6 - Inlet Sensor Header - 1

text_image Labeled diagram of a computer motherboard showing CPU, CPU2, and PC1 components with pinouts and connectors
  1. M.2 Slot (M.2-HC1)
  2. M.2 Slot (M.2-HC2)
  3. Inlet Sensor Header (JSEN1)

SlimSAS NVMe Connectors

Two SlimSAS NVMe connectors provide four NVMe connections (P1_NVME0/1, P1_NVME2/3). Use these NVMe connections to attach high-speed PCIe storage devices.

Supermicro X12DPG-QBT6 - SlimSAS NVMe Connectors - 1

Note: When installing an NVMe device on a motherboard, please be sure to connect the first NVMe port (P1_NVME0/1) first for your system to work properly.

NCSI Connector

The NCSI header (JNCSI1) is used to connect a Network Interface Card (NIC) to the motherboard which will allow the onboard BMC (Baseboard Management Controller) to communicate with a network.

Supermicro X12DPG-QBT6 - NCSI Connector - 1

text_image Labeled diagram of a computer motherboard showing CPU, GPU, and peripheral components with numbered annotations.
  1. P1_NVMe0/1

  2. P1_NVMe2/3

  3. NCSI Connector (JNCSI1)

I-SATA 3.0 and S-SATA 3.0 Ports

There are eight I-SATA 3.0 ports (I-SATA0\~3, I-SATA4\~7) and two S-SATA ports (S-SATA4, S-SATA5) on the motherboard. These SATA ports are supported by the C621A chipset. S-SATA4 and S-SATA5 can be used with Supermicro SuperDOMs, which are orange SATA DOM connectors with power pins built in, and do not require external power cables. S-SATA4 and S-SATA-5 are compatible with regular SATA HDDs or SATA DOMs that need external power cables.

SPDIF\_IN Header

The Sony/Philips Digital Interface (JSPDIF_IN1) header is used for digital audio. Place a cap on each header for audio support. A cable is needed to use the connection.

SPDIF_InPin Definitions
Pin# Definition
1S/PDIF_In
2Ground

Supermicro X12DPG-QBT6 - SPDIF\_IN Header - 1

text_image Labeled diagram of a computer motherboard showing CPU, CPU1, and peripheral components with numbered annotations.
  1. I-SATA0\~3
  2. I-SATA4\~7
  3. S-SATA4 (SuperDOM)
  4. S-SATA5 (SuperDOM)
  5. SPDIF In

2.8 Jumper Settings

How Jumpers Work

To modify the operation of the motherboard, jumpers can be used to choose between optional settings. Jumpers create shorts between two pins to change the function of the connector. Pin 1 is identified with a square solder pad on the printed circuit board. See the diagram below for an example of jumping pins 1 and 2. Refer to the motherboard layout page for jumper locations.

Supermicro X12DPG-QBT6 - How Jumpers Work - 1

Note 1: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the jumper is off the pins.

Note 2: Unplug the power cord from all power supplies before adjusting jumper settings.

Supermicro X12DPG-QBT6 - How Jumpers Work - 2

text_image Connector Pins Jumper Setting 3 2 1 3 2 1

CMOS Clear

JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper consists of contact pads to prevent accidentally clearing the contents of CMOS.

To Clear CMOS

Supermicro X12DPG-QBT6 - To Clear CMOS - 1

  1. First power down the system and unplug the power cord(s).
  2. Remove the cover of the chassis to access the motherboard and remove the battery from the motherboard.
  3. Short the CMOS pads with a metal object such as a small screwdriver for at least four seconds.
  4. Remove the screwdriver (or shorting device).
  5. Replace the cover, reconnect the power cord(s), and power on the system.

Supermicro X12DPG-QBT6 - To Clear CMOS - 2

Note: Clearing CMOS will also clear all passwords.

Supermicro X12DPG-QBT6 - To Clear CMOS - 3

text_image Labeled diagram of a computer motherboard showing CPU, CPU2, and peripheral components with connectors and ports
  1. JBT1

LAN Port Enable/Disable

Jumper JPTG1 allows the user to enable the onboard LAN ports (LAN1 and LAN2). The default setting is pins 1-2 to enable the connections. Refer to the table below for jumper settings.

LAN Enable/DisableJumper Settings
Jumper Setting Definition
Pins 1-2 Enable
Pins 2-3 Disable

ME Recovery

JPME2 is used for ME Firmware Recovery mode, which will limit system resource for essential function use only without putting restrictions on power use. In the single operation mode, online upgrade will be available via Recovery mode. Refer to the table below for jumper settings.

ME RecoveryJumper Settings
Jumper Setting Definition
Pins 1-2 Normal(Default)
Pins 2-3 ME Recovery

Supermicro X12DPG-QBT6 - ME Recovery - 1

text_image Labeled technical diagram of a computer motherboard showing CPU, RAM, and peripheral components with numbered annotations.
  1. LAN Port Enable/Disable
  2. JPME2

HD Audio Enable

JHD_AC1 allows you to enable or disable the onboard high definition audio support. Refer to the table below for jumper settings

HD Audio Enable/Disable Jumper Settings
Jumper SettingDefinition
OpenEnabled (Default)
ShortDisabled

Onboard Audio Enable

JPAC1 allows you to enable or disable the onboard audio support. The default position is on pins 1-2 to enable onboard audio connections. Refer to the table below for jumper settings.

Audio Enable/Disable Jumper Settings
Jumper SettingDefinition
Pins 1-2Enabled (Default)
Pins 2-3Disabled

Supermicro X12DPG-QBT6 - Onboard Audio Enable - 1

text_image Exploded view diagram of a computer motherboard with labeled components such as CPU1, CPU2, and various hardware modules.
  1. HD Audio Enable/Disable
  2. Audio Enable/Disable

Watchdog

Watchdog (JWD1) is a system monitor that can reboot the system when a software application hangs. Close pins 1-2 to reset the system if an application hangs. Close pins 2-3 to generate a non-maskable interrupt (NMI) signal for the application that hangs. Refer to the table below for jumper settings. For this function to work properly, please also enable the Watchdog setting in the BIOS.

WatchdogJumper Settings
Jumper Setting Definition
Pins 1-2 Reset
Pins 2-3 NMI
Open Disabled

I²C Bus for VRM

JVRM1 and JVRM2 allow the BMC or the PCH to access CPU and memory VRM controllers. Refer to the table below for jumper settings.

VRMJumper Settings
Jumper Setting Definition
Pins 1-2 BMC (Default)
Pins 2-3 PCH

Supermicro X12DPG-QBT6 - I²C Bus for VRM - 1

text_image Labeled diagram of a computer motherboard showing CPU, RAM, BAC, and peripheral components with numbered annotations.
  1. Watchdog
  2. JVRM1
  3. JVRM2

2.9 LED Indicators

LAN LEDs

Two LAN ports (LAN1 and LAN2) are located on the rear I/O panel of the motherboard. Each Ethernet LAN port has two LEDs. The green LED indicates activity, while the other Link LED may be green, amber, or off to indicate the speed of the connection. Refer to the tables below for more information.

LAN1/2 Activity LED (Right)LED State
Color Status Definition
Green Flashing Active
LAN1/2 Link LED (Left)LED State
LED Color Definition
Green 10Gbps
Yellow/Amber 1Gbps

BMC LAN LEDs

In addition to LAN1 and LAN2, an BMC LAN port is also located on the rear I/O panel. The LED on the right indicates activity, while the LED on the left indicates the speed of the connection. Refer to the table below for more information.

BMC LAN LEDs
Color/State Definition
Link (Left)Green: SolidAmber: Solid100 Mbps1Gbps
Activity (Right) Amber: Blinking Active

Supermicro X12DPG-QBT6 - BMC LAN LEDs - 1

Supermicro X12DPG-QBT6 - BMC LAN LEDs - 2

text_image Labeled diagram of a computer motherboard showing CPU, GPU, and peripheral components with part numbers 1 and 2 indicated.
  1. LAN1/LAN2 LEDs
  2. BMC LAN LEDs

Supermicro X12DPG-QBT6 - BMC LAN LEDs - 3

text_image Diagram showing labeled network ports and connectors, including VGA, USB, and network switch components

Onboard Power LED

The Onboard Power LED is located at LEDPWR on the motherboard. When this LED is on, the system power is on. Be sure to turn off the system power and unplug the power cords before removing or installing components. Refer to the table below for more information.

Onboard Power LED Indicator
LED Color Definition
OffSystem Power Off (power cable not connected)
Green SystemPower On

M.2 LEDs

Two M.2 LEDs are located at M2_1_LED1 and M2_2_LED1 on the motherboard. When the M.2 LED is blinking, M.2 functions normally. Refer to the table below for more information.

M.2 LED State
LED Color Definition
Green: Blinking Device Working

Supermicro X12DPG-QBT6 - M.2 LEDs - 1

Note: For information on UID LED Indicators and BMC Heartbeat LED Indicator, please refer to the section on UID LED/BMC Reset Switch and LED Indicator on page 47.

Supermicro X12DPG-QBT6 - M.2 LEDs - 2

text_image Labeled diagram of a computer motherboard showing CPU, RAM, and peripheral components with numbered annotations
  1. Power LED (LEDPWR)
  2. M2_1_LED1
  3. M2_2_LED1

Chapter 3

Troubleshooting

3.1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the 'Technical Support Procedures' and/or 'Returning Merchandise for Service' section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any non hot-swap hardware components.

Before Power On

  1. Make sure that there are no short circuits between the motherboard and chassis.
  2. Disconnect all ribbon/wire cables from the motherboard, including those for the keyboard and mouse.
  3. Remove all add-on cards.
  4. Install the CPU (making sure it is fully seated) and connect the front panel connectors to the motherboard.

No Power

  1. Make sure that there are no short circuits between the motherboard and the chassis.
  2. Make sure that the ATX power connectors are properly connected.
  3. Check that the 115V/230V switch, if available, on the power supply is properly set.
  4. Turn the power switch on and off to test the system, if applicable.
  5. The battery on your motherboard may be old. Check to verify that it still supplies approximately 3VDC. If it does not, replace it with a new one.

No Video

  1. If the power is on, but you do not have video, remove all add-on cards and cables.
  2. Remove all memory modules and turn on the system (if the alarm is on, check the specs of memory modules, reset the memory, or try a different one).

System Boot Failure

If the system does not display POST (Power-On-Self-Test) or does not respond after the power is turned on, check the following:

  1. Check for any error beep from the motherboard speaker.
  2. If there is no error beep, try to turn on the system without DIMM modules installed. If there is still no error beep, replace the motherboard.
  3. If there are error beeps, clear the CMOS settings by unplugging the power cord and contacting both pads on the CMOS clear jumper (JBT1). Refer to Section 2.8 in Chapter 2.
  4. Remove all components from the motherboard, especially the DIMM modules. Make sure that system power is on and that memory error beeps are activated.
  5. Turn on the system with only one DIMM module installed. If the system boots, check for bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure in this chapter.

Memory Errors

When a no-memory beep code is issued by the system, check the following:

  1. Make sure that the memory modules are compatible with the system and are properly installed. See Chapter 2 for installation instructions. (For memory compatibility, refer to the "Tested Memory List" link on the motherboard's product page to see a list of supported memory.)

  2. Check if different speeds of DIMMs have been installed. It is strongly recommended that you use the same RAM type and speed for all DIMM modules in the system.

  3. Make sure that you are using the correct type of ECC DDR4 modules recommended by the manufacturer.

  4. Check for bad DIMM modules or slots by swapping a single module among all memory slots and check the results.

Losing the System's Setup Configuration

  1. Make sure that you are using a high-quality power supply. A poor-quality power supply may cause the system to lose the CMOS setup information. Refer to Chapter 1 for details on recommended power supplies.

  2. The battery on your motherboard may be old. Check to verify that it still supplies approximately 3VDC. If it does not, replace it with a new one.

When the System Becomes Unstable

A. If the system becomes unstable during or after OS installation, check the following:

  1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest BIOS installed in your system.

  2. Memory support: Make sure that the memory modules are supported by testing the modules using memtest86 or a similar utility.

Supermicro X12DPG-QBT6 - When the System Becomes Unstable - 1

Note: Click on the "Tested Memory List" link on the motherboard's product page to see a list of supported memory.

  1. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the bad HDDs with good ones.

  2. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/system fans, etc., work properly. Check the hardware monitoring settings in the BMC to make sure that the CPU and system temperatures are within the normal range. Also check the front panel Overheat LED and make sure that it is not on.

  3. Adequate power supply: Make sure that the power supply provides adequate power to the system. Make sure that all power connectors are connected. Please refer to our website for more information on the minimum power requirements.

  4. Proper software support: Make sure that the correct drivers are used.

B. If the system becomes unstable before or during OS installation, check the following:

  1. Source of installation: Make sure that the devices used for installation are working properly, including boot devices such as USB flash or media drives.

  2. Cable connection: Check to make sure that all cables are connected and working properly.

  3. Using the minimum configuration for troubleshooting: Remove all unnecessary components (starting with add-on cards first), and use the minimum configuration (but with the CPU and a memory module installed) to identify the trouble areas. Refer to the steps listed in Section A above for proper troubleshooting procedures.

  4. Identifying bad components by isolating them: If necessary, remove a component in question from the chassis, and test it in isolation to make sure that it works properly. Replace a bad component with a good one.

  5. Check and change one component at a time instead of changing several items at the same time. This will help isolate and identify the problem.
  6. To find out if a component is good, swap this component with a new one to see if the system will work properly. If so, then the old component is bad. You can also install the component in question in another system. If the new system works, the component is good and the old system has problems.

3.2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, please note that as a motherboard manufacturer, Supermicro also sells motherboards through its channels, so it is best to first check with your distributor or reseller for troubleshooting services. They should know of any possible problems with the specific system configuration that was sold to you.

  1. Please go through the Troubleshooting Procedures and Frequently Asked Questions (FAQ) sections in this chapter or see the FAQs on our website (http://www.supermicro.com/FAQ/index.php) before contacting Technical Support.
  2. BIOS upgrades can be downloaded from our website (http://www.supermicro.com/ResourceApps/BIOS_BMC_Intel.html).
  3. If you still cannot resolve the problem, include the following information when contacting Supermicro for technical support:

  4. Motherboard model and PCB revision number

  5. BIOS release date/version (This can be seen on the initial display when your system first boots up.)
    • System configuration

  6. An example of a Technical Support form is on our website at http://www.supermicro.com/RmaForm/.

  7. Distributors: For immediate assistance, please have your account number ready when placing a call to our Technical Support department. We can be reached by email at support@supermicro.com.

3.3 Frequently Asked Questions

Question: What type of memory does my motherboard support?

Answer: This motherboard supports up to 4 TB of 3DS LRDIMM/LRDIMM/3DS RDIMM/RDIMM DDR4 (288-pin) ECC memory with speeds of 3200/2933/2666 MT/s in 16 slots and up to 4 TB of Intel Optane PMem 200 Series with speeds of up to 3200 MT/s. To enhance memory performance, do not mix memory modules of different speeds and sizes. Please follow all memory installation instructions given in Section 2.4.

Supermicro X12DPG-QBT6 - Frequently Asked Questions - 1

Note: The Intel Optane PMem 200 Series are supported by the 3rd Gen. Intel Xeon Scalable (83xx/63xx/53xx/4314) Series Processors.

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing any problems with your system. Updated BIOS files are located on our website at http://www.supermicro.com/ResourceApps/BIOS_BMC_Intel.html. Please check our BIOS warning message and the information on how to update your BIOS on our website. Select your motherboard model and download the BIOS file to your computer. Also, check the current BIOS revision to make sure that it is newer than your BIOS before downloading.

Supermicro X12DPG-QBT6 - Question: How do I update my BIOS? - 1

Note: The SPI BIOS chip used on this motherboard cannot be removed. Send your motherboard back to our RMA Department at Supermicro for repair. For BIOS Recovery instructions, please refer to the AMI BIOS Recovery Instructions posted at http://www.supermicro.com/support/manuals/.

To update your BIOS under UEFI Shell

Supermicro X12DPG-QBT6 - To update your BIOS under UEFI Shell - 1

Note: We do not recommend that you update your BIOS if you are not experiencing a BIOS-related problem. If you need to update your BIOS, please follow the steps below to properly update your BIOS under UEFI Shell.

  1. Download and save the BIOS update package to your computer.

  2. Extract the files from the UEFI folder of the BIOS package to a USB flash drive.

Supermicro X12DPG-QBT6 - To update your BIOS under UEFI Shell - 2

Note: The USB flash drive doesn't have to be bootable; however, it has to be formatted with the FAT/FAT32 file system.

  1. Insert the USB flash drive into a USB port, boot to the Build-In UEFI Shell, and enter the following commands to start the BIOS update:

Shell> fs0:

fs0:> cd UEFI

  1. The FLASH.NSH script will compare the Flash Descriptor Table (FDT) code in the new BIOS with the existing one in the motherboard:

a. If a different FDT is found

  • A new file, STARTUP.NSH, will be created, and the system will automatically reboot in 10 seconds without you pressing any key. BIOS will be updated after the system reboots.
  • You can also press to force an immediate system reboot to shorten the process. During system reboot, press the key to invoke the boot menu and boot into the build-in UEFI Shell. Your BIOS will be updated automatically.

b. If the FDT is the same

- BIOS update will be immediately performed without a system reboot initiated.

Warning: Do not shut down or reset the system while updating the BIOS to prevent possible boot failure!

  1. Perform an A/C power cycle after the message indicating the BIOS update has completed.
  2. Go to the BIOS setup utility, and restore the BIOS settings.

3.4 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

  1. Power off your system and unplug your power cable.
  2. Locate the onboard battery as shown below.
  3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to unlock it. Once unlocked, the battery will pop out from the holder.
  4. Remove the battery.

Proper Battery Disposal

Warning: Please handle used batteries carefully. Do not damage the battery in any way; a damaged battery may release hazardous materials into the environment. Do not discard a used battery in the garbage or a public landfill. Please comply with the regulations set up by your local hazardous waste management agency to dispose of your used battery properly.

Battery Installation

To install an onboard battery, follow the steps below:

  1. Power off your system and unplug your power cable.
  2. Locate the onboard battery as shown below
  3. Identify the battery's polarity. The positive (+) side should be facing up.
  4. Insert the battery into the battery holder and push it down until you hear a click to ensure that the battery is securely locked.

Warning: When replacing a battery, be sure to only replace it with the same type.

Supermicro X12DPG-QBT6 - Battery Installation - 1

text_image LITHIUM BATTERY BATTERY HOLDER OR LITHIUM BATTERY BATTERY HOLDER

3.5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number. When returning the motherboard to the manufacturer, the RMA number should be prominently displayed on the outside of the shipping carton, and the shipping package is mailed prepaid or hand-carried. Shipping and handling charges will be applied for all orders that must be mailed when service is complete. For faster service, you can also request a RMA authorization online (http://www.supermicro.com/RmaForm/).

This warranty only covers normal consumer use and does not cover damages incurred in shipping or from failure due to the alternation, misuse, abuse or improper maintenance of products.

During the warranty period, contact your distributor first for any product problems.

Chapter 4

UEFI BIOS

4.1 Introduction

This chapter describes the AMIBIOS™ Setup utility for the motherboard. The BIOS is stored on a chip and can be easily upgraded using the BMC WebUI or the SUM utility.

Supermicro X12DPG-QBT6 - Introduction - 1

Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual. Please refer to the Manual Download area of our website for any changes to the BIOS that may not be reflected in this manual.

Starting the Setup Utility

To enter the BIOS Setup Utility, hit the key while the system is booting-up. (In most cases, the key is used to invoke the BIOS setup screen. There are a few cases when other keys are used, such as , , etc.) Each main BIOS menu option is described in this manual.

The Main BIOS screen has two main frames. The left frame displays all the options that can be configured. "Grayed-out" options cannot be configured. The right frame displays the key legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white. Often a text message will accompany it. (Note that the BIOS has default text messages built in. We retain the option to include, omit, or change any of these text messages.) Settings printed in Bold are the default values.

A "▶" indicates a submenu. Highlighting such an item and pressing the key will open the list of settings within that submenu.

The BIOS setup utility uses a key-based navigation system called hot keys. Most of these hot keys (, , , , , keys, etc.) can be used at any time during the setup navigation process.

4.2 Main Setup

When you first enter the AMI BIOS setup utility, you will enter the Main setup screen. You can always return to the Main setup screen by selecting the Main tab on the top of the screen. The Main BIOS setup screen is shown below and the following items will be displayed:

Supermicro X12DPG-QBT6 - Main Setup - 1

text_image Actio Setup - AMI Main Advanced Event Logs IPMI Security Boot Save & Exit System Date [Non 07/18/2022] System Time [16:20:10] Supermicro X12DP6-QBT6 EIDS Version 1.3 Build Date 06/02/2022 CPLD Version F1.00.07 Memory Information Total Memory 8192 MB Get the Date. Use Tab to switch between Date elements. Default Ranges: Year: 1998-9999 Months: 1-12 Days: Dependent on month Range of Years may vary. ++: Select Screen T#: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit Version 2.22.1282 Copyright (C) 2022 AMI

System Date / System Time

Use the two features to change the system date and time. Highlight System Date or System Time using the arrow keys. Enter new values using the keyboard. Press the key or the arrow keys to move between fields. The date must be entered in MM/DD/YYYY format.

The time is entered in HH:MM:SS format.

Supermicro X12DPG-QBT6 - System Date / System Time - 1

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00. The date's default value is the BIOS build date after RTC reset.

Supermicro X12DPG-QBT6

BIOS Version

This feature displays the version of the BIOS ROM used in the system.

Build Date

This feature displays the date when the version of the BIOS ROM used in the system was built.

CPLD Version

This feature displays the Complex Programmable Logic Device version.

Memory Information

Total Memory

This feature displays the total size of memory available in the system.

4.3 Advanced Setup Configurations

Use the arrow keys to select the Advanced menu and press to access the submenu items:

Supermicro X12DPG-QBT6 - Advanced Setup Configurations - 1

text_image Aptio Setup - AMI Main Advanced Event Logs IPMI Security Boot Save & Exit Boot Feature CPU Configuration Chipset Configuration Server ME Information FCH SATA Configuration FCH sSATA Configuration Network Configuration PCIe/PCI/PnP Configuration Super IO Configuration Serial Port Console Redirection ACPI Settings Trusted Computing HTTP Boot Configuration SMCI KMS Server Configuration Supermicro 10GBASE-T Ethernet Controller - 7C:02:55:06:F1:F4 Supermicro 10GBASE-T Ethernet Controller - 7C:02:55:06:F1:F5 TLS Authenticate Configuration Driver Health Boot Feature Configuration Page ++: Select Screen T4: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit Version 2.22.1282 Copyright (C) 2022 AMI

Warning: Take caution when changing the Advanced settings. An incorrect value, a very high DRAM frequency, or an incorrect DRAM timing setting may make the system unstable. When this occurs, revert to default manufacturer settings.

▶Boot Feature

Quiet Boot

Use this feature to select the screen display between the POST messages and the OEM logo upon bootup. Select Disabled to display the POST messages. Select Enabled to display the OEM logo instead of the normal POST messages. The options are Disabled and Enabled.

Option ROM Messages

Use this feature to set the display mode for the Option ROM. Select Keep Current to display the current AddOn ROM setting. Select Force BIOS to use the Option ROM display set by the system BIOS. The options are Force BIOS and Keep Current.

Bootup NumLock State

Use this feature to set the Power-on state for the key. The options are On and Off.

Wait For "F1" If Error

Use this feature to force the system to wait until the "F1" key is pressed if an error occurs. The options are Disabled and Enabled.

INT19 (Interrupt 19) Trap Response

Interrupt 19 is the software interrupt that handles the boot disk function. When this feature is set to Immediate, the ROM BIOS of the host adapters will "capture" Interrupt 19 at bootup immediately and allow the drives that are attached to these host adapters to function as bootable disks. If this feature is set to Postponed, the ROM BIOS of the host adapters will not capture Interrupt 19 immediately and allow the drives attached to these adapters to function as bootable devices at bootup. The options are Immediate and Postponed.

Re-try Boot

If this feature is enabled, the BIOS will automatically reboot the system from a specified boot device after its initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.

Power Configuration

Watch Dog Function

If enabled, the Watch Dog timer will allow the system to reset or generate NMI based on jumper settings when it is expired for more than five minutes. The options are Disabled and Enabled.

Watch Dog Action (Available when "Watch Dog Function" is set to Enabled)

Use this feature to configure the Watch Dog Time_out setting. The options are Reset and NMI.

Front USB Port(s)

Use this feature to enable/disable the front USB port(s). Select Enabled (Dynamic) to enable the front USB port(s) and these ports can be disabled without resetting system. The options are Enabled, Disabled, and Enabled (Dynamic).

Rear USB Port(s)

Use this feature to enable/disable the front USB port(s). Select Enabled (Dynamic) to enable the front USB port(s) and these ports can be disabled without resetting system. The options are Enabled, Disabled, and Enabled (Dynamic).

CPLD Watch Dog

Select Power on to allow the BIOS to start the Watch Dog timer at very early POST and never stop it. Select POST to allow the BIOS to start the Watch Dog timer at very early POST and stop it at the end of POST. Select OS to allow the BIOS to start the Watch Dog timer when it is ready to boot OS. The options are Disabled, Power on, POST, and OS.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Stay Off for the system power to remain off after a power loss. Select Power On for the system power to be turned on after a power loss. Select Last State to allow the system to resume its last power state before a power loss. The options are Stay Off, Power On, and Last State.

Power Button Function

This feature controls how the system shuts down when the power button is pressed. Select 4 Seconds Override for the user to power off the system after pressing and holding the power button for four seconds or longer. Select Instant Off to instantly power off the system as soon as the user presses the power button. The options are Instant Off and 4 Seconds Override.

Deep Sleep Mode

Select Enabled to enable system deep sleep mode support. The options are Disabled and Enabled.

▶CPU Configuration

The following CPU information is displayed:

  • Processor BSP Revision
  • Processor Socket
  • Processor ID
  • Processor Frequency
  • Processor Max Ratio
  • Processor Min Ratio
  • Microcode Revision
    • L1 Cache RAM (Per Core)
    • L2 Cache RAM (Per Core)
    • L3 Cache RAM (Per Package)
  • Processor 0 Version
  • Processor 1 Version

▶CPU1 Core Disable Bitmap

CPU1 Core Diable Bitmap

Available Bitmap:

This feature displays the available bitmap.

Core Disable Bitmap(Hex)

Enter a value to enable or disable the cores for the CPU in socket 0.

▶CPU2 Core Disable Bitmap

Available Bitmap:

This feature displays the available bitmap.

Core Disable Bitmap(Hex)

Enter a value to enable or disable the cores for the CPU in socket 1.

Hyper-Threading [ALL] (Available when supported by the CPU)

Select Enable to support Intel Hyper-threading Technology to enhance CPU performance. The options are Disable and Enable.

Hardware Prefetcher (Available when supported by the CPU)

If set to Enable, the hardware prefetcher will prefetch streams of data and instructions from the main memory to the L2 cache to improve CPU performance. The options are Enable and Disable.

Adjacent Cache Prefetch (Available when supported by the CPU)

The CPU prefetches the cache line for 64 bytes if this feature is set to Disabled. The CPU prefetches both cache lines for 128 bytes as comprised if this feature is set to Enable. The options are Enable and Disable.

DCU Streamer Prefetcher (Available when supported by the CPU)

Select Enable to enable the DCU (Data Cache Unit) Streamer Prefetcher which will stream and prefetch data and send it to the Level 1 data cache to improve data processing and system performance. The options are Enable and Disable.

DCU IP Prefetcher (Available when supported by the CPU)

Select Enable for DCU (Data Cache Unit) IP Prefetcher support, which will prefetch IP addresses to improve network connectivity and system performance. The options are Enable and Disable.

LLC Prefetch

If set to Enable, the hardware prefetcher will prefetch streams of data and instructions from the main memory to the L3 cache to improve CPU performance. The options are Disable and Enable.

Extended APIC

Select Enable to activate APIC (Advanced Programmable Interrupt Controller) support. The options are Disable and Enable.

Enable Intel(R) TXT

Intel Trusted Execution Technology (TXT) helps protect against software-based attacks and ensures protection, confidentiality, and integrity of data stored or created on the system. The options are Disable and Enable.

VMX

Use this feature to enable the Vanderpool Technology support. The options are Disable and Enable.

Intel Virtualization Technology

Select Enable to enable the Intel Vanderpool Technology for Virtualization platform support, which will allow multiple operating systems to run simultaneously on the same computer to maximize system resources for performance enhancement. The options are Disable and Enable.

Supermicro X12DPG-QBT6 - Intel Virtualization Technology - 1

Note: Please reboot the system for any change of the setting to take effect.

Enable SMX

Use this feature to enable the Safer Mode Extensions support. The options are Disable and Enable.

PPIN Control

Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system. The options are Lock/Disable and Unlock/Enable.

AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to ensure data security. The options are Disable and Enable.

TME, TME-MT, TDX

Total Memory Encryption (TME) (Available when your CPU supports Intel TME)

Use this feature to enable the Total Memory Encryption (TME) function for physical memory protection. The options are Disabled and Enabled.

Supermicro X12DPG-QBT6 - Total Memory Encryption (TME) (Available when your CPU supports Intel TME) - 1

text_image Aptio Setup - AMI Advanced CPU Core Disable Bitmac Hyper-Threading (ALL) [Enable] Hardware Prefetcher [Enable] Adjacent Cache Prefetch [Enable] DCU Streamer Prefetcher [Enable] DCU IP Prefetcher [Enable] LLC Prefetch [Enable] Extended APIC [Disable] VMX [Enable] Enable SMX [Disable] FFIN Control RES-NI TME, TME-MT, TOX Total Memory Encryption (TME) Disabled Enabled Software Guard Extension (SBX) SGX Factory Reset [Disabled] SK Guard Extensions (SGX) [Disabled] SGX Package Info In-Band Access [Disabled] Limit CPU PA to 45 Bits [Enable] Advanced Power Management Configuration Enable/Disable Total Memory Encryption (TME) +: Select Screen TL: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit Version 2.21.1200 Copyright (C) 2021 AMI

Total Memory Encryption Multi-Tenant (TME-MT) (Available when "Total Memory Encryption (TME)" is set to Enabled and "Lim it CPU PA to 46 Bits" is set to Disable)

Use this feature to support tenant-provided (SW-provided) keys. The options are Disabled and Enabled.

MAX TME-MT Keys (Available when "Total Memory Encryption Multi-Tenant (TME-MT)" is set to Enabled)

This feature displays the maximum TME-MT keys.

*The following Software Guard Extension (SGX) features are available when "Total Memory Encryption (TME)" is set to Enabled and CPU supports Intel Software Guard Extensions (SGX).

Supermicro X12DPG-QBT6 - MAX TME-MT Keys (Available when "Total Memory Encryption Multi-Tenant (TME-MT)" is set to Enabled) - 1

Note: Each memory channel must have at least one DIMM populated on the motherboard to support the Intel SGX feature.

SGX Factory Reset

Use this feature to perform an SGX factory reset to delete all registration data and force an Initial Platform Establishment flow. Reboot the system for the change to take effect. The options are Disabled and Enabled.

SW Guard Extensions (SGX)

Use this feature to enable Intel Software Guard Extensions (SGX) support. Intel SGX is a set of extensions that increases the security of application code and data by using enclaves in memory to protect sensitive information. The options are Disabled and Enabled.

Supermicro X12DPG-QBT6 - SW Guard Extensions (SGX) - 1

text_image Aptio Setup - AMI Advanced Adjacent Cache Prefetch [Enable] DCU Streamer Prefetcher [Enable] DCU IP Prefetcher [Enable] LLC Prefetch [Enable] Extended APIC [Disable] VMX [Enable] Enable SMX [Disable] PPIN Control [Unlock/Enable] AES-NI [Enable] TME, TME-MT, TOX SN Guard Extensions (SGX)—— Total Memory Encryption (TME) Disabled Total Memory Encryption Enabled Multi-Tenant(TME-MT) Max TME-MT Keys 0x0 Software Guard Extension (SGX) SGX Factory Reset [Disabled] SN Guard Extensions (SGX) [Disabled] SGX Package Info In-Band Access [Disabled] Limit CPU PA to 46 Bits [Enable] ► Advanced Power Management Configuration Enable/Disable Software Guard Extensions (SGX), Hill disable and grayed out ADDOC , UKA-Based Clustering SGX, mirror and enable NUMA. SGX cannot co-exists PMem(Persistent Memory),ADDOC, MCA Recovery-Execution Path, Run Sure, Memory Mirroring, Address Range Mirroring(in the some memory region), dynamice change CPU/memory/Ito, static/Hard Partitioning +: Select Screen TI: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit Version 2.21.1280 Copyright (CI) 2021 AMI

Supermicro X12DPG-QBT6 - SW Guard Extensions (SGX) - 2

text_image Advanced Total Memory Encryption Multi-Tenant(TME-MT) Max TME-MT Keys Software Guard Extension (SGX) SGX Factory Reset SN Guard Extensions (SGX) SGX Package Info In-Band Access PRMRR Size SGX QoS Select Dumer EPOCH Input Type Software Guard Extensions Epoch 0 Software Guard Extensions Epoch 1 SGXLEPUBKEYHASHX Write Enable SGXLEPUBKEYHASH0 SGXLEPUBKEYHASH1 SGXLEPUBKEYHASH2 SGXLEPUBKEYHASH3 Enable/Disable SGX Auto MP Registration Agent Limit CPU PA to 45 Bits Advanced Power Management Configuration [Disabled] [Enabled] [Disabled] [20] [Enabled] [Manual User Defined] Duner EPOCHs! 0 0 [Enabled] 0 0 0 [Disabled] Enable/Disable Software Guard Extensions (SGX). Will disable and grayed out ADDOC, UMA-Based Clustering SGX, mirror and enable NUMA. SGX cannot co-exists PMem(Persistent Memory),ADDOC, MGA Recovery-Execution Path, Run Sure, Memory Mirroring; Address Range Mirroring(in the same memory region), dynamice change CPU/memory/Iio, static/Hard Partitioning +: Select Screen I: Select Item Enter: Select +/-: Change Out. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit Version 2.21.1290 Copyright (C) 2021 AMI

SGX Package Info In-Band Access

Setting this feature to Enabled is required before BIOS provides software with the key blobs, which are generated for each CPU package. The options are Disabled and Enabled.

PRMRR Size

Use this feature to set the Processor Reserved Memory Range Register (PRMRR) size. The options are No valid PRMRR size, 1G, 2G, 4G, 8G, 16G, 32G, 64G, 128G, 256G, and 512G.

SGX QoS

Use this feature to enable Intel SGX Quality of Service (QoS) support. QoS can make better network performance by prioritizing network traffic. The options are Disabled and Enabled.

Select Owner EPOCH input type

Owner EPOCH is used as a parameter to allow the owner to add entropy to the keys during the derivation. Use this feature to select the two Owner EPOCH modes. One is New Random Owner EPOCH, the other is manually entered by the user. Each EPOCH is 64-bit. The options are Change to New Random Owner EPOCHs and Manual User Defined Owner EPOCHs.

Supermicro X12DPG-QBT6 - Select Owner EPOCH input type - 1

Note: Changing the Owner EPOCH value will lose the data in enclaves.

Software Guard Extensions Epoch 0 (Available when "Select Owner EPOCH input type" is set to Manual User Defined Owner EPOCHs)

Enter a numeric value for this feature. The default is 0.

Software Guard Extensions Epoch 1 (Available when "Select Owner EPOCH input type" is set to Manual User Defined Owner EPOCHs)

Enter a numeric value for this feature. The default is 0.

SGXLEPUBKEYHASHx Write Enable

Use this feature to write SGX LE Public Key Hash 0-3 from OS/SW. The options are Disabled and Enabled.

SGXLEPUBKEYHASH0 (Available when "SGXLEPUBKEYHASHx Write Enable" is set to Enabled)

Use this feature to enter the bytes 0-7 of SGX Launch Enclave Public Key Hash. The default is 0.

SGXLEPUBKEYHASH1 (Available when "SGXLEPUBKEYHASHx Write Enable" is set to Enabled)

Use this feature to enter the bytes 8-15 of SGX Launch Enclave Public Key Hash. The default is 0.

SGXLEPUBKEYHASH2 (Available when "SGXLEPUBKEYHASHx Write Enable" is set to Enabled)

Use this feature to enter the bytes 16-23 of SGX Launch Enclave Public Key Hash. The default is 0.

SGXLEPUBKEYHASH3 (Available when "SGXLEPUBKEYHASHx Write Enable" is set to Enabled)

Use this feature to enter the bytes 24-31 of SGX Launch Enclave Public Key Hash. The default is 0.

Enable/Disable SGX Auto MP Registration Agent

Use this feature to enable/disable SGX Auto Multi-Package Registration Agent (MPA) running automatically at boot time. The options are Disabled and Enabled.

Limit CPU PA to 46 Bits

Select Enable to limit CPU physical address to 46 bits to support the older Hyper-v CPU platform. The options are Disable and Enable.

▶ Advanced Power Management Configuration

Power Technology

Select Energy Efficient to support power-saving mode. Select Custom to customize system power settings. Select Disable to disable power-saving settings. The options are Disable, Energy Efficient, and Custom.

*If the feature above is set to Custom, the following features will become available for configuration:

Power Performance Tuning

This feature allows the user to select whether the BIOS or Operating System chooses energy performance bias tuning. The options are OS Controls EPB and BIOS Controls EPB.

ENERGY\_PERF\_BIAS CFG Mode (Available when "Power Performance Tuning" is set to BIOS Controls EPB)

The Energy Performance BIAS (EPB) feature allows the user to configure CPU power and performance settings. Select Maximum Performance to set the highest performance. Select Performance to optimize performance over energy efficiency. Select Balanced Performance to prioritize performance optimization while conserving energy. Select Balanced Power to prioritize energy conservation while maintaining good performance. Select Power to optimize energy efficiency over performance. The options are Extreme Performance, Maximum Performance, Performance, Balanced Performance, Balanced Power, and Power.

▶CPU P State Control

This feature allows you to configure the following CPU power settings:

SpeedStep (P-States)

Intel SpeedStep Technology allows the system to automatically adjust processor voltage and core frequency to reduce power consumption and heat dissipation. The options are Disable and Enable.

Dynamic SST-PP

Use this feature to enable the Dynamic SST-PP support. The options are Disable and Enable.

*If the feature above is set to Disable, the following feature will become available for configuration:

Intel SST-PP

Use this feature to select from up to two additional base frequency conditions. The options are Base, Config 1, and Config 2.

The following information displays.

Intel SST-PP (Core Count, Current P1 Ration [0], Package TDP (W), Tjmax) / Base / Config 1 / Config 2

*If SpeedStep (P-States) is set to Enable, the following features will become available for configuration:

EIST (Enhanced Intel SpeedStep Technology) PSD Function (Available when SpeedStep is set to Enable)

This feature reduces the latency that occurs when one P-state changes to another, thus allowing the transitions of P-state changing to occur more frequently. This will allow for more demand-based P-state changing or switching that is based on real-time energy needs of applications so that the power-to-performance balance can be optimized for energy efficiency. The options are HW_ALL and SW_ALL.

AVX P1 (Available when "SpeedStep (P-States)" is set to Enable)

Use this feature to set the appropriate TDP level for the system. The Intel Advanced Vector Extensions (Intel AVX) P1 feature allows you to set the base P1 ratio for Streaming SIMD Extensions (SSE) and AVX workloads. Each P1 ratio has the corresponding AVX Impressed Current Cathodic Protection (ICCP) pre-grant license level, which refers to the selection between different AVX ICCP transition levels. The options are Nominal, Level 1, and Level 2.

Activate SST-BF

Select Enable for Intel Speed Select Technology-Base Frequency support. The options are Disable and Enable. (SST-BF is the abbreviation for Speed Select Technology-Base Frequency.)

Configure SST-BF

When this feature is set to Enable, the system BIOS will configure SST-BF High Priority Core settings so that system software does not have to configure these settings. The options are Disable and Enable.

EIST PSD Function (Available when "SpeedStep (P-States)" is set to Enable)

This feature reduces the latency that occurs when one P-state changes to another, thus allowing the transitions to occur more frequently. This will allow for more demand-based P-state switching to occur based on the real-time energy needs of applications so that the power-to-performance balance can be optimized for energy efficiency. The options are HW_ALL and SW_ALL.

Turbo Mode

This feature will enable dynamic control of the processor, allowing it to run above stock frequency. The options are Disable and Enable.

CPU Flex Ratio Override

Select Enable to activate CPU Flex Ratio programming. The options are Disable and Enable.

CPU Core Flex Ratio

If CPU Flex Ratio Override is set to Enable, this sets the value of the CPU Flex Ratio. The default is 23.

▶Hardware PM State Control

Hardware P-States

This feature allows the user to select between OS and hardware-controlled P-states. Selecting Native Mode allows the OS to choose a P-state. Selecting Out of Band Mode allows the hardware to autonomously choose a P-state without OS guidance. Selecting Native Mode with No Legacy Support functions as Native Mode with no support for older hardware. The options are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.

▶ Frequency Prioritization

RAPL Prioritization

This feature allows you to create core groups of different priority. The options are Enable and Disable. (RAPL: Running Average Power Limit)

▶CPU C State Control

Enable Monitor MWAIT

Select Enable to support Monitor and Mwait, which are two instructions in Streaming SIMD Extension 3 (SSE3), to improve synchronization between multiple threads for CPU performance enhancement. The options are Disable and Enable.

CPU C6 Report

Select Enable to allow the BIOS to report the CPU C6 State (ACPI C3) to the operating system. During the CPU C6 State, the power to all cache is turned off. The options are Disable, Enable, and Auto.

Enhanced Halt State (C1E)

Select Enable to use Enhanced Halt State technology, which will significantly reduce the CPU's power consumption by reducing its clock cycle and voltage during a Halt-state. The options are Disable and Enable.

▶Package C State Control

Package C State

This feature allows the user to set the limit on the C State package register. The options are C0/C1 state, C2 state, C6 (non Retention) state, and Auto.

▶CPU T State Control (Available when Power Technology is set to Custom)

Software Controlled T-States

Use this feature to enable Software Controlled T-States. The options are Disable and Enable.

T-State Throttle Level (Available when Software Controlled T-States is set to Enable)

Select any percentage (%) from the option list to configure the on-die thermal throttling setting. The options are Disable, 6.25%, 12.5%, 18.75%, 25.0%, 31.25%, 37.5%, 43.75%, 50.0%, 56.25%, 62.5%, 68.75%, 75.0%, 81.25%, 87.5%, and 93.75%.

▶Chipset Configuration

Warning: Setting the wrong values in the following features may cause the system to malfunction.

▶ North Bridge

This feature allows you to configure the following North Bridge settings.

▶Uncore Configuration

The following information is display:

• Number of CPU
• Number of IIO
• Current UPI Link Speed
• Current UPI Link Frequency
• Global MMIO Low Base / Limit
• Global MMIO High Base / Limit
- Pci-e Configuration Base / Size

Degrade Precedence

Use this feature to set degrade precedence when system settings are in conflict. Select Topology Precedence to degrade Features. Select Feature Precedence to degrade Topology. The options are Topology Precedence and Feature Precedence.

Select Enable for the QPI to enter the L0p state for power saving. The options are Disable, Enable, and Auto.

Select Enable for the QPI to enter the L1 state for power saving. The options are Disable, Enable, and Auto.

XPT Remote Prefetch

Select Enable to support XPT (Extended Prediction Table) Remote Prefetch, which will allow an LLC request to be duplicated and sent to an appropriate memory controller in a remote machine based on the recent LLC history to reduce latency. The options are Enable, Disable, and Auto.

KTI Prefetch

KTI Prefetch enables memory read to start early on a DDR bus. The options are Disable, Enable, and Auto.

Local/Remote Threshold

This feature allows the user to set the threshold for the Interrupt Request (IRQ) signal. The options are Disable, Auto, Low, Medium, and High.

IO Directory Cache (IODC)

IO Directory Cache is an 8-entry cache that stores the directory state of remote IIO writes and memory lookups, and saves directory updates. Use this feature to lower cache to cache (C2C) transfer latencies. The options are Disable, Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Remote InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WViLF.

SNC (Sub NUMA)

Sub NUMA Clustering (SNC) is a feature that breaks up the Last Level Cache (LLC) into clusters based on address range. Each cluster is connected to a subset of the memory controller. Enable this feature to improve average latency and reduce memory access congestion for higher performance. The options are Disable and Enable SNC2 (2-clusters).

XPT Prefetch

This feature makes a copy to the memory controller of a read request being sent to LLC. The options are Disable, Enable, and Auto.

Snoop Throttle Configuration

Use this feature to select the level of snoop throttle setting for CHA. The options are Disabled, Low, Medium, High, and Auto.

PCIe Remote P2P Relaxed Ordering

This feature is for UPI PCIe P2P Relaxed Ordering. PCIe peer-to-peer communication (P2P) is a PCIe feature that enables two PCIe devices to directly transfer data between each other without using host RAM Relax P2P write ordering in hardware if software enforces ordering, or doesn't care. The options are Disable and Enable.

Stale AtoS

Use this feature to optimize the A to S directory. The options are Disable, Enable, and Auto.

LLC Dead Line Alloc

Select Enable to optimally fill dead lines in LLC. The options are Disable, Enable, and Auto.

▶ Memory Configuration

Enhanced PPR

Use this feature to enable/disable Enhanced PPR function. The options are Disable and Enable.

Enforce POR

Select POR (Plan of Record) to enforce POR restrictions on DDR4 frequency and voltage programming. The options are POR and Disable.

PPR Type

Use this feature to set the Post Package Repair type. The options are PPR Disabled, Hard PPR, and Soft PPR.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory modules. The options are Auto, 2133, 2200, 2400, 2600, 2666, 2800, 2933, 3000, and 3200.

Data Scrambling for DDR4

Use this feature to enable or disable data scrambling for DDR4 memory. The options are Disable and Enable.

Enable ADR

Select Enable for ADR (Async DIMM Self-Refresh) support to enhance memory performance. The options are Disable and Enable.

Data Scrambling for PMem

Select Enable to enable data scrambling for PMem to enhance system performance and security. Select Auto for the default setting of the Memory Reference Code (MRC) to set configure data scrambling for DDR4 setting. The options are Enable and Disable.

Legacy ADR Mode (Available when Enabled ADR is set to Enable)

Select Enable to support Legacy ADR (Async DIMM Module Self-Refresh) mode to enhance memory performance. The options are Enable and Disable.

Erase-Arm NVDIMMs (Available when Enabled ADR is set to Enable, and when NVDIMMs are detected/installed in the system)

If this feature is set to Enable, the function that arms the NVDIMMs for safe operations in the event of a power loss will be removed. The options are Disable and Enable.

Restore NVDIMMs (Available when Enabled ADR is set to Enable, and when NVDIMMs are detected/installed in the system)

Select Enable to automatically restore the functionality and the features of NVDIMM modules. The options are Disable and Enable.

Interleave NVDIMMs (Available when Enabled ADR is set to Enable, and when NVDIMMs are detected/installed in the system)

If this feature is set to Enable, all onboard NVDIMM modules will be configured together as a group for the interleave mode. If this feature is set to Disable, individual NVDIMM module will be configured separately for the interleave mode. The options are Disable and Enable.

2x Refresh Enable

Select Enable for memory 2X refresh support to enhance memory performance. The options are Auto, Disable, and Enable.

▶ Memory Topology

This feature displays the information of onboard memory modules as detected by the BIOS.

▶ Memory RAS Configuration

Enable Pcode WA (Workaround) for SAI (Security Attribute of the Initiator) PG (Policy Group)

Pcode, a register transfer language designed for reverse engineering, translates individual processor instructions into a sequence of Pcode operations in order to facilitate the construction of data-flow graphs and dissembling of processor instructions for machine application. Select Enabled to allow Pcode to work around the SAI group policy to achieve a solution with a next-step instruction.

This feature is only for ICX R0 and will do a Bios 2 Pcu mailbox write for adding SMM into WAC of BIOS_W policy group. The options are Disabled and Enabled.

Mirror Mode (Available when "ADDDC Sparing" is set to Disabled and "UEFI ARM Mirror" is set to Disabled)

This feature allows memory to be mirrored between two channels, providing 100% redundancy. The options are Disabled, Full Mirror Mode, and Partial Mirror Mode.

UEFI ARM Mirror (Available when "ADDDC Sparing" is set to Disabled and "Mirror Mode" is set to Disabled)

Select Enabled to support the UEFI-based address range mirroring with setup option. The options are Disabled and Enabled.

ARM Mirror Percentage (Available when "UEFI ARM Mirror" is set to Enabled)

Use this feature to set the percentage of memory space to be used for UEFI ARM mirroring for memory security enhancement. The default setting is 0.

Correctable Error Threshold

Use this feature to specify the threshold value for correctable memory-error logging, which sets a limit on the maximum number of events that can be logged in the memory error log at a given time. The default setting is 512.

Leaky Bucket Low Bit

Use this feature to set the Low Bit value for the Leaky Bucket algorithm which is used to check the data transmissions between CPU sockets and the memory controller. The default setting is 13.

Leaky Bucket High Bit

Use this feature to set the High Bit value for the Leaky Bucket algorithm which is used to check the data transmissions between CPU sockets and the memory controller. The default setting is 14.

Partial Cache Line Sparing PCLS

Use this feature to enable/disable PCLS sparing. The options are Disabled and Enabled.

ADDDC Sparing

Adaptive Double Device Data Correction (ADDDC) Sparing detects when the predetermined threshold for correctable errors is reached, copying the contents of the failing DIMM to spare memory. The failing DIMM or memory rank will then be disabled. The options are Disabled and Enabled.

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors detected on a memory module and send the correction to the requestor (the original source). When this feature is set to Enable, the IO hub will read and write back one cache line every 16K cycles if there is no delay caused by internal processing. By using this method, roughly 64 GB of memory behind the IO hub will be scrubbed every day. The options are Disabled, Enabled, and Enable at End of POST.

▶IIO Configuration

▶CPU1 Configuration

IOU0 (IIO PCIe Port 1)

This feature configures the PCIe port Bifurcation setting for a PCIe port specified by the user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.

IOU1 (IIO PCIe Port 2)

This feature configures the PCIe port Bifurcation setting for a PCIe port specified by the user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.

IOU3 (IIO PCIe Port 4)

This feature configures the PCIe port Bifurcation setting for a PCIe port specified by the user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.

IOU4 (IIO PCIe Port 5)

This feature configures the PCIe port Bifurcation setting for a PCIe port specified by the user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.

▶CPU1 SLOT9 PCI-E 4.0 X16 / CPU1 SLOT4 PCI-E 4.0 X16 / CPU1 SLOT2 PCI-E 4.0 X16 / P1\_NVME0 / P1\_NVME1 / P1\_NVME2 / P1\_NVME3

Use this feature to select the link speed for the PCIe port specified by the user. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), Gen 3 (8 GT/s), and Gen 4 (16 GT/s).

The following information is displayed:

• PCI-E Port Link Status
- PCI-E Port Link Max
- PCI-E Port Link Speed

Use this feature to enable/disable the PCIe port to enter PCIe 4.0 DL_Feature negotiation state. The options are Disable and Enable.

PCI-E Port Max (Maximum) Payload Size

Use this feature to set the maximum payload size support in the PCIe Device Capabilities Register for the device installed in the DMI port. The options are 128B, 256B, 512B, and Auto.

▶CPU2 Configuration

IOU0 (IIO PCIe Port 1)

This feature configures the PCIe port Bifurcation setting for a PCIe port specified by the user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.

IOU1 (IIO PCIe Port 2)

This feature configures the PCIe port Bifurcation setting for a PCIe port specified by the user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.

IOU3 (IIO PCIe Port 4)

This feature configures the PCIe port Bifurcation setting for a PCIe port specified by the user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.

IOU4 (IIO PCIe Port 5)

This feature configures the PCIe port Bifurcation setting for a PCIe port specified by the user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.

▶CPU2 SLOT11 PCI-E 4.0 X8 / M.2-HC1 / M.2-HC2 / CPU2 SLOT8 PCI-E 4.0 X16 / CPU2 SLOT6 PCI-E 4.0 X16 / CPU2 SLOT10 PCI-E 4.0 X16

Use this feature to select the link speed for the PCIe port specified by the user. The options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), Gen 3 (8 GT/s), and Gen 4 (16 GT/s).

The following information is displayed:

• PCI-E Port Link Status
- PCI-E Port Link Max
- PCI-E Port Link Speed

Use this feature to enable/disable the PCIe port to enter PCIe 4.0 DL_Feature negotiation state. The options are Disable and Enable.

PCI-E Port Max Payload Size

Use this feature to set the maximum payload size support in the PCIe Device Capabilities Register for the device installed in the DMI port. The options are 128B, 256B, 512B, and Auto.

▶ IOAT Configuration

Disable TPH

Transparent Huge Pages (TPH) is a Linux memory management system that enables communication in larger blocks (pages). Enabling this feature will increase performance. The options are No and Yes.

Prioritize TPH

Use this feature to enable Prioritize TPH support. The options are Enable and Disable.

Relaxed Ordering

Select Enable to enable Relaxed Ordering support, which will allow certain transactions to violate the strict-ordering rules of PCI bus for a transaction to be completed prior to other transactions that have already been enqueued. The options are No and Yes.

Intel® VT for Directed I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel Virtualization Technology for Direct I/O VT-d support by reporting the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR ACPI tables. This feature offers fully-protected I/O resource sharing across Intel platforms, providing greater reliability, security and availability in networking and data-sharing. The options are Enable and Disable.

ACS Control (Available when "Intel VT for Directed I/O (VT-d)" is set to Enable)

Use this feature to program Access Control Services (ACS) to the PCIe Root Port Bridges. The options are Enable and Disable.

Interrupt Remapping (Available when "Intel VT for Directed I/O (VT-d)" is set to Enable)

Use this feature to enable Interrupt Remapping support, which detects and controls external interrupt requests. The options are Auto, Enable, and Disable.

Intel® VMD Technology

This section describes the configuration settings for the Intel VMD Technology.

Supermicro X12DPG-QBT6 - Intel® VMD Technology - 1

Note 1: After you've enabled VMD in the BIOS on a PCIe slot, this PCIe slot will be dedicated for VMD use only, and it will no longer support any PCIe device. To re-activate this slot for PCIe use, please disable VMD in the BIOS.

Note 2: PCIe slots and naming can differ depending on the PCIe devices installed on your motherboard.

NVMe Mode Switch

The options are Manual, VMD, and Auto. Select Auto to enable VMD support for NVMe devices in the system when a VROC RAID Key is installed. Select Manual to change the NVMe mode for each port. Select VMD to enable VMD support for each port.

Intel® VMD for Volume Management Device on CPU1 (Available when "NVMe Mode Switch" is set to Manual)

VMD Config for IOU 0 / VMD Config for IOU 1 / VMD Config for IOU 3 / VMD Config for IOU 4

Enable/Disable VMD

Select Enable to use the Intel Volume Management Device Technology for this stack. The options are Disable and Enable.

*If the feature above is set to Enable, the following features will become available for configuration:

CPU1 SLOT9 PCI-E 4.0 X16 VMD / CPU1 SLOT4 PCI-E 4.0 X16 VMD / CPU1 SLOT2 PCI-E 4.0 X16 VMD / P1_NVME0 VMD / P1_NVME1 VMD / P1_NVME2 VMD / P1_NVME3 VMD (Available when the device is detected by the system)

Select Enable to use the Intel Volume Management Device Technology for this specific root port. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Select Enable to enable Hot Plug support for the root ports specified, which allows you to change the devices on those root ports without shutting down the system. The options are Disable and Enable.

Intel® VMD for Volume Management Device on CPU2 (Available when "NVMe Mode Switch" is set to Manual)

VMD Config for IOU 0 / VMD Config for IOU 1 / VMD Config for IOU 3 / VMD Config for IOU 4

Enable/Disable VMD

Select Enable to use the Intel Volume Management Device Technology for this stack. The options are Disable and Enable.

*If the feature above is set to Enable, the following features will become available for configuration:

CPU2 SLOT11 PCI-E 4.0 X8 VMD / M.2-HC1 VMD / M.2-HC2 VMD / CPU2 SLOT8 PCI-E 4.0 X16 VMD / CPU2 SLOT6 PCI-E 4.0 X16 VMD / CPU2 SLOT10 PCI-E 4.0 X16 VMD (Available when the device is detected by the system)

Select Enable to use the Intel Volume Management Device Technology for this specific root port. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Select Enable to enable Hot Plug support for the root ports specified, which allows you to change the devices on those root ports without shutting down the system. The options are Disable and Enable.

PCIe ASPM Support (Global)

Use this feature to disable the Active State Power Management (ASPM) support for all PCIe root ports. The options are Disable and Auto.

IIO eDPC Support (Available when your system supports this feature)

To improve containment within the PCIe sub-system when an uncorrected error is detected, either at the root port or at the switch downstream port. The options are Disable, On Fatal Error, and On Fatal and Non-Fatal Errors.

IIO eDPC Interrupt (Available when your system supports this feature and when "IIO eDPC Support" is set to On Fatal Error/On Fatal and Non-Fatal Errors)

Select Enable to enable IIO eDPC Interrupt support. The options are Disable and Enable.

IIO eDPC ERR_COR Message (Available when your system supports this feature and when "IIO eDPC Support" is set to On Fatal Error/On Fatal and Non-Fatal Errors)

If this feature is set to Enable, an IIO eDPC error correction message will be displayed. The options are Disable and Enable.

▶ South Bridge

The following information is displayed:

  • USB Module Version
  • USB Devices:

Legacy USB Support

This feature enables support for USB 2.0 and older. The options are Enabled, Disabled, and Auto.

XHCI Hand-off

When this feature is disabled, the motherboard will not support USB 3.0. The options are Enabled and Disabled.

Port 60/64 Emulation

Select Enabled for I/O port 60h/64h emulation support, which in turn, will provide complete legacy USB keyboard support for the operating systems that do not support legacy USB devices. The options are Disabled and Enabled.

PCIe PLL SCC

Select Enable for PCH PCIe Spread Spectrum Clocking support, which will allow the BIOS to monitor and attempt to reduce the level of Electromagnetic INterference caused by the components whenever needed. The options are Disabled and Enabled.

Port 61h Bit-4 Emulation

Select Enabled for I/O Port 61h-Bit 4 emulation support to enhance system performance. The options are Disabled and Enabled.

▶Server ME Information

The following General ME Configuration is displayed:

  • General ME Configuration
    • Oper. Firmware Version
  • Backup Firmware Version
    • Recovery Firmware Version
    • ME Firmware Status #1

• ME Firmware Status #2
- Current State
- Error Code

▶PCH SATA Configuration

When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA devices that are supported by the Intel PCH chip and displays the following features

SATA Controller

This feature enables or disables the onboard SATA controller supported by the Intel PCH chip. The options are Disable and Enable.

Configure SATA as (Available when "SATA Controller" is set to Enable)

Select AHCI to configure a SATA drive specified by the user as an AHCI drive. Select RAID to configure a SATA drive specified by the user as a RAID drive. The options are AHCI and RAID.

When this feature is set to Enable, the SATA AHCI controller manages the power usage of the SATA link. The controller will put the link in a low power mode during extended periods of I/O inactivity, and will return the link to an active state when I/O activity resumes. The options are Disable and Enable.

*If the feature "Configure SATA as" above is set to RAID, the following two features will become available for configuration:

SATA RSTe Boot Info

Select Enable to provide full int13h support for the devices attached to SATA controller. The options are Disable and Enable.

SATA RAID Option ROM/UEFI Driver

Select UEFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for system boot. The options are Disable, EFI, and Legacy.

SATA Port 0 \~ Port 7

These features display the information detected on the installed SATA drive on the particular SATA port.

Hot Plug

Set this feature to Enable for hot plug support, which will allow the user to replace a SATA drive without shutting down the system. The options are Disable and Enable.

Spin Up Device

On an edge detect from 0 to 1, set this feature to allow the PCH to initialize the device. The options are Disable and Enable.

SATA Device Type

Use this feature to specify if the SATA port specified by the user should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.

▶PCH sSATA Configuration

When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA devices that are supported by the Intel PCH chip and displays the following features:

sSATA Controller

This features enables or disables the onboard sSATA controller supported by the Intel PCH chip. The options are Enable and Disable.

Configure sSATA as (Available when "sSATA Controller" is set to Enable)

Select AHCI to configure an sSATA drive specified by the user as an AHCI drive. Select RAID to configure an sSATA drive specified by the user as a RAID drive. The options are AHCI and RAID.

When this feature is set to Enable, the SATA AHCI controller manages the power usage of the SATA link. The controller will put the link in a low power mode during extended periods of I/O inactivity, and will return the link to an active state when I/O activity resumes. The options are Disable and Enable.

*If the feature "Configure sSATA as" above is set to RAID, the following two features will become available for configuration:

sSATA RSTe Boot Info

Select Enable to provide full int13h support for the devices attached to sSATA controller. The options are Disable and Enable.

sSATA RAID Option ROM/UEFI Driver

Select UEFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for system boot. The options are Disable, EFI, and Legacy.

sSATA Port 2 \~ Port 5

These features display the information detected on the installed sSATA drive on the particular sSATA port.

Hot Plug

Set this feature to Enable for hot plug support, which will allow the user to replace a SATA drive without shutting down the system. The options are Disable and Enable.

Spin Up Device

On an edge detect from 0 to 1, set this feature to allow the PCH to initialize the device. The options are Disable and Enable.

sSATA Device Type

Use this feature to specify if the SATA port specified by the user should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.

▶Network Configuration

Network Stack

Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unified Extensible Firmware Interface) for network stack support. The options are Disabled and Enabled.

IPv4 PXE Support

Select Enabled to enable IPv4 PXE boot support. The options are Disabled and Enabled.

IPv4 HTTP Support

Select Enabled to enable IPv4 HTTP boot support. The options are Disabled and Enabled.

IPv6 PXE Support

Select Enabled to enable IPv6 PXE boot support. The options are Disabled and Enabled.

IPv6 HTTP Support

Select Enabled to enable IPv6 HTTP boot support. The options are Disabled and Enabled.

PXE Boot Wait Time

Use this feature to specify the wait time to press the ESC key to abort the PXE boot. Press "+" or "-" on your keyboard to change the value. The default setting is 0.

Media Detect Count

Use this option to specify the number of times media will be checked. Press "+" or "-" on your keyboard to change the value. The default setting is 1.

*Use the following features to configure network parameters:

▶MAC:(MAC address)-IPv4 Network Configuration

Configured

Use this feature to indicate whether the above MAC address has been configured successfully. The options are Disabled and Enabled.

Save Changes and Exit

Press to save changes and exit. The options are Yes and No.

▶MAC:(MAC address)-IPv6 Network Configuration

▶ Enter Configuration Menu

The following information is displayed:

Interface Name / Interface Type / MAC address / Host addresses / Route Table / Gateway addresses / DNS addresses

Interface ID

Use this feature to change/enter the 64 bit alternative interface ID for the device. The string format is colon separated. The default setting is the above MAC address.

DAD Transmit Count

This feature displays the number of consecutive neighbor solicitation messages have been sent while performing duplicate address detection on a tentative address.

Policy

Use this feature to select how the policy is to be configured. The options are automatic and manual.

Save Changes and Exit

Press to save changes and exit. The options are Yes and No.

▶MAC:(MAC address)-IPv4 Network Configuration

Configured

Use this feature to indicate whether the above MAC address has been configured successfully. The options are Disabled and Enabled.

Save Changes and Exit

Press to save changes and exit. The options are Yes and No.

▶MAC:(MAC address)-IPv6 Network Configuration

▶ Enter Configuration Menu

The following information is displayed:

Interface Name / Interface Type / MAC address / Host addresses / Route Table / Gateway addresses / DNS addresses

Interface ID

Use this feature to change/enter the 64 bit alternative interface ID for the device. The string format is colon separated. The default setting is the above MAC address.

DAD Transmit Count

This feature displays the number of consecutive neighbor solicitation messages have been sent while performing duplicate address detection on a tentative address.

Policy

Use this feature to select how the policy is to be configured. The options are automatic and manual.

Save Changes and Exit

Press to save changes and exit. The options are Yes and No.

▶ PCIe/PCI/PnP Configuration

The following information is displayed:

• PCI Bus Driver Version
• PCI Devices Common Settings:

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address. The options are Disabled and Enabled.

SR-IOV Support

Use this feature to enable or disable Single Root IO Virtualization Support. The options are Disabled and Enabled.

ARI Support

Select Enabled for the Alternative Routing ID Interpretation support. The options are Disabled and Enabled.

Bus Master Enable

Select Enabled to enable the Bus Driver Master bit. The options are Disabled and Enabled.

Consistent Device Name Support

Select Enabled for ACPI_DSM (DSM: Device Specific Method) device name support for onboard devices and slots. The options are Disabled and Enabled.

MMIO High Base

Use this feature to select the base memory size according to memory-address mapping for the IO hub. The options are 56T, 40T, 32T, 24T, 16T, 4T, 2T, 1T, and 512 G.

MMIO High Granularity Size

Use this feature to select the high memory size according to memory-address mapping for the IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.

Maximum Read Request

Use this feature to select the Maximum Read Request size of the PCIe device, or select Auto to allow the System BIOS to determine the value. The options are Auto, 128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

MMCFG Base

Use this feature to select the low base address for PCIe adapters to increase base memory. The options are 1.5G, 1.75G, 2G, 2.25G, 3G, and Auto.

NVMe Firmware Source

The feature determines which type of NVMe firmware should be used in your system. The options are Vendor Defined Firmware and AMI Native Support.

VGA Priority

Use this feature to select VGA priority when multiple VGA devices are detected. Select Onboard to give priority to your onboard video device. Select Offboard to give priority to your graphics card. The options are Onboard and Offboard.

Onboard Video Option ROM

Use this feature to select the Onboard Video Option ROM type. The options are Disabled and EFI.

CPU1 SLOT2 PCI-E 4.0 X16 OPROM / CPU1 SLOT4 PCI-E 4.0 X16 OPROM / CPU2 SLOT6 PCI-E 4.0 X16 OPROM / CPU2 SLOT8 PCI-E 4.0 X16 OPROM / CPU1 SLOT9 PCI-E 3.0 X16 OPROM / CPU2 SLOT10 PCI-E 4.0 X16 OPROM / CPU2 SLOT11 PCI-E 4.0 X8 OPROM / M.2-HC1 OPROM / M.2-HC2 OPROM

Use this feature to select which firmware type to be loaded for the device in this slot. The options are Disabled and EFI.

Onboard LAN Device

Select Enabled to use the onboard LAN device. The options are Disabled and Enabled.

Onboard LAN1 Option ROM

Use this feature to select which firmware function to be loaded for LAN port 1 used for system boot. The options are Disabled and EFI.

Onboard P1\_NVME0 Option ROM

Use this feature to select which firmware type to be loaded for the NVMe device in this slot. The options are Disabled and EFI.

Onboard P1\_NVME1 Option ROM

Use this feature to select which firmware type to be loaded for the NVMe device in this slot. The options are Disabled and EFI.

▶Super IO Configuration

The following Super IO information is displayed:

• Super IO Chip AST2600

▶ Serial Port 1 Configuration

This submenu allows you to configure the settings of Serial Port 1.

Serial Port 1

Select Enabled to enable the selected onboard serial port. The options are Disabled and Enabled.

Device Settings

This feature displays the status of a serial part specified by the user.

Change Settings

This feature specifies the base I/O port address and the Interrupt Request address of a serial port specified by the user. Select Auto to allow the BIOS to automatically assign the base I/O and IRQ address. The options are Auto, (IO=3F8h; IRQ=4;), (IO=2F8h; IRQ=4;), (IO=3E8h; IRQ=4;), and (IO=2E8h; IRQ=4;).

▶ Serial Port 2 Configuration

This submenu allows you to configure the settings of Serial Port 2.

Serial Port 2

Select Enabled to enable the selected onboard serial port. The options are Disabled and Enabled.

Device Settings

This feature displays the status of a serial part specified by the user.

Change Settings

This feature specifies the base I/O port address and the Interrupt Request address of a serial port specified by the user. Select Auto to allow the BIOS to automatically assign the base I/O and IRQ address. The options are Auto, (IO=3F8h; IRQ=3;), (IO=2F8h; IRQ=3;), (IO=3E8h; IRQ=3;), and (IO=2E8h; IRQ=3;).

Serial Port 2 Attribute (Available for Serial Port 2 only)

Select SOL to use COM Port 2 as a Serial Over LAN (SOL) port for console redirection. The options are SOL and COM.

▶ Serial Port Console Redirection

COM1

Console Redirection

Select Enabled to enable console redirection support for a serial port specified by the user. The options are Disabled and Enabled.

*If the feature above is set to Enabled, the following features will become available for configuration:

▶Console Redirection Settings

Use this feature to specify how the host computer will exchange data with the client computer, which is the remote computer used by the user.

Terminal Type

This feature allows the user to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100, VT100+, VT-UTF8, and ANSI.

Bits Per Second

Use this feature to set the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 38400, 57600, and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are 7 and 8 (bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you do not want to send a parity bit with your data bits in transmission. Select Mark to add a mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity bit to be sent with your data bits. The options are None, Even, Odd, Mark, and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

Flow Control

Use this feature to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a "Stop" signal to stop sending data when the receiving buffer is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals. The options are Disabled and Enabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and Enabled.

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console Redirection for legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects the settings for Function Keys and KeyPad used for Putty, which is a terminal emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO, ESCN, and VT400.

Redirection After BIOS POST

Use this feature to enable or disable legacy console redirection after BIOS POST. When set to Bootloader, legacy console redirection is disabled before booting the OS. When set

to Always Enable, legacy console redirection remains enabled when booting the OS. The options are Always Enable and BootLoader.

SOL/COM2

Console Redirection

Select Enabled to use the SOL port for Console Redirection. The options are Disabled and Enabled.

*If the feature above is set to Enabled, the following features will become available for configuration:

▶Console Redirection Settings

Use this feature to specify how the host computer will exchange data with the client computer, which is the remote computer used by the user.

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100, VT100+, VT-UTF8, and ANSI.

Bits Per Second

Use this feature to set the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are 7 and 8 (bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you do not want to send a parity bit with your data bits in transmission. Select Mark to add a mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity bit to be sent with your data bits. The options are None, Even, Odd, Mark, and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

Flow Control

Use this feature to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a "Stop" signal to stop sending data when the receiving buffer is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals. The options are Disabled and Enabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and Enabled.

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console Redirection for legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a terminal emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO, ESCN, and VT400.

Redirection After BIOS POST

Use this feature to enable or disable legacy Console Redirection after BIOS POST. When set to Bootloader, legacy Console Redirection is disabled before booting the OS. When set to Always Enable, legacy Console Redirection remains enabled when booting the OS. The options are Always Enable and BootLoader.

Legacy Console Redirection

Legacy Serial Redirection Port

Use this feature to select a COM port to display redirection of Legacy OS and Legacy OPROM messages. The options are COM1 and SOL/COM2.

Serial Port for Out-of-Band Management/Windows Emergency Management Services (EMS)

Console Redirection EMS

Select Enabled to use a COM port selected by the user for EMS Console Redirection. The options are Disabled and Enabled.

*If the feature above is set to Enabled, the following features will become available for configuration:

▶Console Redirection Settings

This feature allows you to specify how the host computer will exchange data with the client computer, which is the remote computer used by the user.

Out-of-Band Mgmt Port

The feature selects a serial port in a client server to be used by the Microsoft Windows Emergency Management Services (EMS) to communicate with a remote host server. The options are COM1 and SOL/COM2.

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII character set. Select VT100+ to add color and function key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100, VT100+, VT-UTF8, and, ANSI.

Bits Per Second EMS

This feature sets the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 57600, and 115200 (bits per second).

Flow Control EMS

Use this feature to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a "Stop" signal to stop sending data when the receiving buffer is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None, Hardware RTS/CTS, and Software Xon/Xoff.

The following information displays:

Data Bits EMS, Parity EMS, Stop Bits EMS

▶ACPI Settings

NUMA

Use this feature to enable Non-Uniform Memory Access (NUMA), a feature that improves memory-to-processor communication and performance. The options are Disabled and Enabled.

UMA-Based Clustering

When this feature is set to Hemisphere, Uniform Memory Access (UMA)-based clustering will support 2-cluster configuration for system performance enhancement. The options are Disable (All2All) and Hemisphere (2-clusters).

WHEA Support

Select Enabled to support the Windows Hardware Error Architecture (WHEA) platform and provide a common infrastructure for the system to handle hardware errors within the Windows OS environment to reduce system crashes and to enhance system recovery and health monitoring. The options are Disabled and Enabled.

High Precision Event Timer

Select Enabled to activate the High Precision Event Timer (HPET) that produces periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing multimedia streams, providing smooth playback and reducing the dependency on other timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU. The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer. The options are Disabled and Enabled.

▶Trusted Computing (Available when a TPM device is installed and detected by the BIOS)

The X12DPG-QBT6 supports TPM 1.2 and 2.0. The following Trusted Platform Module (TPM) information will display if a TPM 2.0 module is detected:

  • Vendor Name
  • Firmware Version

Security Device Support

If this feature and the TPM jumper on the motherboard are both set to Enabled, onboard security devices will be enabled for TPM (Trusted Platform Module) support to enhance data integrity and network security. Please reboot the system for a change on this setting to take effect. The options are Disable and Enable.

• Active PCR Bank
• Available PCR banks
• SHA256 PCR Bank

*If the feature above is set to Enable, "SHA-1 PCR Bank" and "SHA256 PCR Bank" will become available for configuration:

SHA-1 PCR Bank

Use this feature to disable or enable the SHA-1 Platform Configuration Register (PCR) bank for the installed TPM device. The options are Disabled and Enabled.

SHA256 PCR Bank

Use this feature to disable or enable the SHA256 Platform Configuration Register (PCR) bank for the installed TPM device. The options are Disabled and Enabled.

Pending Operation

Use this feature to schedule a TPM-related operation to be performed by a security device for system data integrity. Your system will reboot to carry out a pending TPM operation. The options are None and TPM Clear.

Platform Hierarchy

Use this feature to disable or enable platform hierarchy for platform protection. The options are Disabled and Enabled.

Storage Hierarchy

Use this feature to disable or enable storage hierarchy for cryptographic protection. The options are Disabled and Enabled.

Endorsement Hierarchy

Use this feature to disable or enable endorsement hierarchy for privacy control. The options are Disabled and Enabled.

PH Randomization

Use this feature to disable or enable Platform Hierarchy (PH) Randomization. The options are Disabled and Enabled.

SMCI BIOS-Based TPM Provision Support

Use feature to enable the Supermicro TPM Provision support. The options are Disabled and Enabled.

TXT Support

Intel Trusted Execution Technology (TXT) helps protect against software-based attacks and ensures protection, confidentiality, and integrity of data stored or created on the system. Use this feature to enable or disable TXT Support. The options are Disabled and Enabled.

▶HTTP Boot Configuration

HTTP Boot Configuration

HTTP Boot Policy

Use this feature to set the HTTP boot policy. The options are Apply to all LANs, Apply to each LAN, and Boot Priority #1 instantly.

HTTPS Boot Checks Hostname

Enable this feature for HTTPS boot to check the hostname of the TLS certificates to see if it matches the host name provided by the remote server. The options are Enabled and Disabled (WARNING: Security Risk!!).

Priority of HTTP Boot

Instance of Priority 1:

The priority sequence of HTTP Boot. The default setting is 1.

Select IPv4 or IPv6

Use this feature to select which internet protocol the targeted LAN port is boot from. The options are IPv4 and IPv6.

Boot Description

Press and enter a boot description. The maximal length is 75 (bytes).

Boot URI

This feature allows you to boot the system from a network connection. The maximal length is 128 (bytes).

Instance of Priority 2:

The priority sequence of HTTP Boot. The default setting is 0.

▶SMCI KMS Server Configuration

SMCI KMS Server IP address

Use this feature to enter the Supermicro Key Management Service (KMS) server IPv4 address in dotted-decimal notation.

Second SMCI KMS Server IP address

Use this feature to enter the second Supermicro KMS server IPv4 address in dotted-decimal notation.

SMCI KMS TCP Port number

Use this feature to enter the Supermicro KMS TCP port number. The valid range is 100 - 9999. The default setting is 5696.

KMS Time Out

Use this feature to enter the KMS server connecting timeout (in seconds). The default setting is 5 (seconds).

SMCI KMS Server Retry Count

Use this feature to specify how many times of the connection retry to the KMS server. The valid range is 0 - 10. Press "+" or "-" on your keyboard to change the value. The default setting is 2 (retrying twice).

TimeZone

Use this feature to enter the correct time zone. The default setting is 0 (not specified).

TCG Nvme KMS Policy

Use this feature to select the TCG NVMe KMS policy. The options are Normal Unlock, Do Nothing, Reset All Devices, and Delete Key Id List.

Client UserName

Press to set the client identity (UserName). The maximum length is 63 characters.

Client Password

Press to set the client identity (Password). The maximum length is 31 characters.

KMS TLS Certificate / Size

This feature displays the Transport Layer Security (TLS) certificate and its size for CA Certificate, Client Certificate, and Client Private Key.

▶CA Certificate

For the CA certificate, use this feature to enroll factory defaults or load the KMS TLS certificates from the file. The options are Update, Delete, and Export.

▶Client Certificate

For the client certificate, use this feature to enroll factory defaults or load the KMS TLS certificates from the file. The options are Update, Delete, and Export.

▶Client Private Key

For the client private key, use this feature to enroll factory defaults or load the KMS TLS certificates from the file. The options are Update, Delete, and Export.

Private Key Password (Available when "Private Key Password" has been set)

Use this feature to change the private key password.

▶Supermicro 10GBASE-T Ethernet Controller -- (MAC address)

This submenu allows you to configure the Ethernet device parameters.

▶ Firmware Image Menu

The following firmware image information is displayed.

Family Firmware Version / Boot Code / MBA / EFI / iSCSI Boot / CCM / NCSI / RDMA FW

▶Device Configuration Menu

Multi-Function Mode

Use this feature to configure NIC hardware mode. The options are SF and NPAR 1.0.

SR-IOV

Select Enabled for Single-Root IO Virtualization support. The options are Disabled and Enabled.

Number of MSI-X Vectors per VF

Use this feature to set the number of MSI-X Vectors per VF. The valid range is 0-128. The default setting is 16.

Maximum Number of PF MSI-X Vectors

Use this feature to set the maximum number of PF MSI-X Vectors. The valid range is 0-512 per controller. The default setting is 255.

Energy Efficient Ethernet

Use this feature to configure Energy Efficient Ethernet operation. The options are Disabled and Enabled.

Use this feature to configure the default link speed. The default setting is AutoNeg.

Support RDMA

Use this feature to enable/disable the RDMA support. The options are Disabled and Enabled.

DCB Protocol

Use this feature to enable/disable the DCB protocol. The options are Disabled, Enabled (IEEE only), CEE (only), and Both (IEEE preferred with fallback to CEE).

LLDP nearest bridge

Use this feature to enable/disable the LLDP nearest bridge state. The options are Disabled and Enabled.

Default EVB Mode

Use this feature to configure the Default Edge Virtual Bridge mode. The options are VEB, VEPA, and None.

Enable PME Capability

Use this feature to enable/disable the PME capability support. The options are Disabled and Enabled.

Flow Offload

Use this feature to configure the Flow Offload mode. This feature is supported by Linux DPDK only, not by Windows or ESX OS. The options are Disabled and Enabled.

Live Firmware Upgrade

Use this feature to upgrade the device firmware with minimal down time and traffic interruption, which will avoid the host reboot, device power cycle, and driver reload. This feature is supported by Linux OS only. The options are Disabled and Enabled.

Adapter Error Recovery

Use this feature to enable the recovery of firmware from fatal errors without manual intervention, host reboot, and power cycle. The options are Disabled and Enabled.

▶MBA Configuration Menu

Option ROM

Use this feature to enable/disable the Boot Option ROM. The options are Disabled and Enabled.

Legacy Boot Protocol

Use this feature to select the non-UEFI boot protocol. The options are PXE, iSCSI, and NONE. (PXE: Preboot Execution Environment)

Boot Strap Type

Use this feature to select the boot strap type. The options are Auto, BBS, Int 18h, and Int 19h.

Hide Setup Prompt

Use this feature to enable/disable the setup prompt display during ROM initialization. The options are Disabled and Enabled.

Setup Key Stroke

Use this feature to select the keystroke to invoke configuration menu. The options are Ctrl-S and Ctrl-B.

Use this feature to set the time (in seconds) to display the Option ROM banner during POST. The default setting is 7 (seconds).

Pre-boot Wake On LAN

Use this feature to enable/disable the pre-boot Wake-on-LAN (WOL). The options are Disabled and Enabled.

VLAN Mode

Use this feature to enable/disable the virtual LAN (VLAN) mode. The options are Disabled and Enabled.

VLAN ID (Available when "VLAN Mode" is set to Enabled)

Use this feature to create a new VLAN ID by using an existing VLAN or creating a new VLAN ID. Enter a valid value between 1 - 4094. The default setting is 1.

Boot Retry Count

Use this feature to set the number of boot retries. The options are No Retry, 1 Retry, 2 Retries, 3 Retries, 4 Retries, 5 Retries, 6 Retries, and Indefinite Retries.

Use this feature to identify the physical network port by blinking the associated LED. The default setting is 0 (up to 15 seconds).

The following information is displayed:

  • Link Status
    • Physical Link Speed
  • Chip Type
  • PCI Device ID
  • Bus:Device:Function
    • Permanent MAC Address
    • Virtual MAC Address

Restore Defaults

Use this feature to restore factory defaults to the adapter.

▶TLS Authenticate Configuration

This submenu allows you to configure Transport Layer Security (TLS) settings.

▶Server CA Configuration

This feature allows you to configure the client certificate that is to be used by the server.

▶Enroll Certification

This feature allows you to enroll the certificate in the system.

▶Enroll Certification Using File

This feature allows you to enroll the security certificate in the system by using a file.

Certification GUID

Press and input the certification Global Unique Identifier (GUID).

▶ Commit Changes and Exit

Use this feature to save all changes and exit TLS settings.

▶Discard Changes and Exit

Use this feature to discard all changes and exit TLS settings.

▶ Delete Certification

This feature is used to delete the certificate if a certificate has been enrolled in the system. The options are Disabled and Enabled.

▶Client Certification Configuration

This feature allows you to configure the client certificate to be used by the server.

▶Enroll Certification

This feature allows you to enroll the certificate in the system.

▶Enroll Certification Using File

This feature allows you to enroll the security certificate in the system by using a file.

Certification GUID

Press and input the certification GUID.

▶ Commit Changes and Exit

Use this feature to save all changes and exit TLS settings.

▶Discard Changes and Exit

Use this feature to discard all changes and exit TLS settings.

▶ Delete Certification

This feature is used to delete the certificate if a certificate has been enrolled in the system.

▶Driver Health

This feature displays the health information of the drivers installed in your system, including LAN controllers, as detected by the BIOS. Select one and press to see the details.

Supermicro X12DPG-QBT6 - ▶Driver Health - 1

Note: This section is provided for reference only, for the driver health status will differ depending on the drivers installed in your system. It's also based on your system configuration and the environment that your system is operating in.

4.4 Event Logs

Use this feature to configure Event Log settings.

Supermicro X12DPG-QBT6 - Event Logs - 1

text_image Action Setup - AMI Main Advanced Event Logs IPMI Security Boot Save & Exit ▶ Change SMBIOS Event Log Settings ▶ View SMBIOS Event Log Press to change the SMBIOS Event Log configuration. +: Select Screen F1: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit Version 2.22.1262 Copyright (C) 2022 AMI

▶Change SMBIOS Event Log Settings

Enabling/Disabling Options

SMBIOS Event Log

Change this feature to enable or disable all features of the SMBIOS Event Logging during system boot. The options are Disabled and Enabled.

Erasing Settings

Erase Event Log

If No is selected, data stored in the event log will not be erased. Select Yes, Next Reset, data in the event log will be erased upon next system reboot. Select Yes, Every Reset, data in the event log will be erased upon every system reboot. The options are No, (Yes, Next reset), and (Yes, Every reset).

When Log is Full

Select Erase Immediately for all messages to be automatically erased from the event log when the event log memory is full. The options are Do Nothing and Erase Immediately.

SMBIOS Event Log Standard Settings

Log System Boot Event

This option toggles the System Boot Event logging to enabled or disabled. The options are Enabled and Disabled.

MECI

The Multiple Event Count Increment (MECI) counter counts the number of occurrences that a duplicate event must happen before the MECI counter is incremented. This is a numeric value. The default value is 1.

METW

The Multiple Event Time Window (METW) defines the number of minutes that must pass between duplicate log events before MECI is incremented. This is in minutes, from 0 to 99. The default value is 60.

Supermicro X12DPG-QBT6 - METW - 1

Note: After making changes on a setting, be sure to reboot the system for the changes to take effect.

▶View SMBIOS Event Log

Select this submenu and press enter to see the contents of the SMBIOS event log. The following categories is displayed:

DATE / TIME / ERROR CODE / SEVERITY.

4.5 IPMI

Use this feature to configure Intelligent Platform Management Interface (IPMI) settings.

Supermicro X12DPG-QBT6 - IPMI - 1

text_image Auto Setup - AMI Main Advanced Event Logs IPMI Security Boot Save & Exit BMC Firmware Revision 01.01.19 IPMI STATUS Working ► System Event Log ► EMC Network Configuration Press to change the SEL event log configuration. +: Select Screen T1: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit Version 2.22.1282 Copyright (C) 2022 AMI

BMC Firmware Revision

This feature indicates the BMC firmware revision used in your system.

IPMI STATUS

This feature indicates the status of the BMC firmware installed in your system.

▶System Event Log

Enabling/Disabling Options

SEL Components

Select Enabled for all system event logging at bootup. The options are Disabled and Enabled.

Erasing Settings

Erase SEL

Select Yes, On next reset to erase all system event logs upon next system reboot. Select Yes, On every reset to erase all system event logs upon each system reboot. Select No to keep all system event logs after each system reboot. The options are No, (Yes, On next reset), and (Yes, On every reset).

When SEL is Full

This feature allows the user to decide what the BIOS should do when the system event log is full. Select Erase Immediately to erase all events in the log when the system event log is full. The options are Do Nothing and Erase Immediately.

Supermicro X12DPG-QBT6 - When SEL is Full - 1

Note: After making changes on a setting, be sure to reboot the system for the changes to take effect.

▶BMC Network Configuration

Update IPMI LAN Configuration

Select Yes for the BIOS to implement all IP/MAC address changes at the next system boot. The options are No and Yes.

*If the feature above is set to Yes, the following features will become available for configuration:

Configure IPv4 Support

This section displays configuration features for IPv4 support.

IPMI LAN Selection

This feature displays the IPMI LAN setting. The default setting is Failover.

This feature displays the IPMI Network Link status. The default setting is Dedicated LAN.

Configuration Address Source

This feature allows the user to select the source of the IP address for this computer. If Static is selected, you will need to know the IP address of this computer and enter it to the system manually in the field. If DHCP is selected, the BIOS will search for a DHCP (Dynamic Host Configuration Protocol) server in the network that is attached to and request the next available IP address for this computer. The options are Static and DHCP.

*If the feature above is set to Static, the following features will become available for configuration:

Station IP Address

This feature displays the Station IP address for this computer. This should be in decimal and in dotted quad form (i.e., 192.168.10.253). Press to change the setting.

Subnet Mask

This feature displays the sub-network that this computer belongs to. The value of each three-digit number separated by dots should not exceed 255. Press to change the setting.

Station MAC Address

This feature displays the Station MAC address for this computer. Mac addresses are six two-digit hexadecimal numbers.

Gateway IP Address

This feature displays the Gateway IP address for this computer. This should be in decimal and in dotted quad form (i.e., 172.31.0.1). Press to change the setting.

VLAN

This feature displays the virtual LAN (VLAN) settings. The options are Disable and Enable.

Supermicro X12DPG-QBT6 - VLAN - 1

Configure IPv6 Support

Supermicro X12DPG-QBT6 - Configure IPv6 Support - 1

This section displays configuration features for IPv6 support.

IPv6 Address Status

This feature displays the IPv6 address status.

IPv6 Support

Use this feature to enable IPv6 support. The options are Enabled and Disabled.

*If the feature above is set to Enabled, the following feature will become available for configuration:

Configuration Address Source

This feature allows the user to select the source of the IP address for this computer. If Static is selected, you will need to know the IP address of this computer and enter it to the system manually in the field. If DHCP is selected, the BIOS will search for a DHCP (Dynamic Host Configuration Protocol) server in the network that is attached to and request the next available IP address for this computer. The options are Static Configuration, DHCPv6 Stateless, and DHCPv6 Stateful.

*If the feature above is set to Static Configuration, the following features will become available for configuration:

Station IPv6 Address

Use this feature to enter the station IPv6 address.

Prefix Length

Use this feature to enter the IPv6 prefix length from BMC.

Gateway IP

Use this feature to enter the IPv6 gateway IP address. Press to change the setting.

Advanced Settings

Use this feature to set the DNS server IP. The options are Auto obtain DNS server IP and Manually obtain DNS server IP.

Preferred DNS server IP (Available when "Advanced Settings" above is set to Manually obtain DNS server IP)

This feature allows you to set the preferred DNS server IP.

Alternative DNS server IP (Available when "Advanced Settings" above is set to Manually obtain DNS server IP)

This feature allows you to set the alternative DNS server IP.

4.6 Security

This submenu allows you to configure the following security settings for the system.

Supermicro X12DPG-QBT6 - Security - 1

text_image Antio Setup - AMI Main Advanced Event Logs IPMI Security Boot Save & Exit Administrator Password Not Installed User Password Not Installed Password Description If the Administrator's / User's password is set, then this only limits access to Setup and is asked for when entering Setup. Please set Administrator's password first in order to set User's password, if clear Administrator's password, the User's password will be cleared as well. The password length must be in the following range: Minimum Length 8 Maximum Length 20 Administrator Password Password Check [Setup] Hard Drive Security Frozen [Disabled] Lockdown Mode [Disabled] Set Administrator Password +: Select Screen T1: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit Version 2.22.1282 Copyright (C) 2022 AMI

The following information is displayed:

  • Administrator Password
  • User Password
  • Password Description

Administrator Password

Press to create a new or change an existing administrator password.

Password Check

Select Setup for the system to check for a password at Setup. Select Always for the system to check for a password at bootup or upon entering the BIOS Setup utility. The options are Setup and Always.

Hard Drive Security Frozen

Select Enabled to enable the freeze lock security feature. The options are Enabled and Disabled.

Lockdown Mode (Available when the DCMS key is activated)

Select Enabled to support Lockdown Mode that will prevent the existing data or keys stored in the system from being altered or changed in an effort to preserve system integrity and security. The options are Enabled and Disabled.

Supermicro X12DPG-QBT6 - Lockdown Mode (Available when the DCMS key is activated) - 1

Note: Supermicro DataCenter Management Suite per Node License Key (SFT-DCMS-SINGLE) is Supermicro's Data Center Management Suite license that enables server node to take full advantage of Supermicro Management Software and Utilities features. Contact us for more information.

▶Secure Boot

The following information is displayed.

  • System Mode
  • Vendor Keys
  • Secure Boot

Secure Boot

Use this feature to enable secure boot. The options are Disabled and Enabled.

Secure Boot Mode

Use this feature to configure Secure Boot variables without authentication. The options are Standard and Custom.

CSM Support

Select Enabled to support the EFI Compatibility Support Module (CSM), which provides compatibility support for traditional legacy BIOS for system boot. The options are Disabled and Enabled.

▶ Enter Audit Mode

Select Ok to enter the audit mode workflow. It will result in erasing of Platform Key (PK) variables and reset system to the Setup/Audit Mode.

▶Enter Deployed Mode / Exit Deployed Mode

Select Ok to reset system to the User Mode or to the Deployed Mode.

▶Key Management (Available when Secure Boot Mode is set to Custom)

This submenu allows the user to configure the following Key Management settings.

Vendor Keys

This feature displays the status of vendor keys.

Provision Factory Defaults

Select Yes to install the default Secure Boot keys set by the manufacturer. The options are Yes and No.

▶Restore Factory Keys (Available when any secure keys have been installed)

Select Yes to restore manufacturer default keys to ensure system security. The options are Yes and No. Selecting Yes will reset system to the Deployed mode.

▶Reset To Setup Mode (Available when any secure keys have been installed)

This feature resets the system to the Setup Mode. The options are Yes and No.

▶Export Secure Boot Variables (Available when any secure keys have been installed)

This feature exports the NVRAM contents of secure boot variables to a storage device. The options are Yes and No.

Enroll Efi Image

This feature allows the Efi image to run in the secure boot mode, which will enroll the SHA256 Hash certificate of a PE image into the Authorized Signature Database (DB).

Device Guard Ready

▶Remove 'UEFI CA' from DB

Select Yes to remove UEFI CA from the database. The options are Yes and No.

Select Yes to restore database variables to the manufacturer default settings. The options are Yes and No.

Secure Boot Variable / Size / Keys / Key Source

▶ Platform Key (PK)

Use this feature to enter and configure a set of values to be used as platform firmware keys for the system. These values also indicate the sizes, keys numbers, and the sources of the authorized signatures. Select Update to update the platform key.

▶Key Exchange Keys

Use this feature to enter and configure a set of values to be used as Key-Exchange-Keys for the system. These values also indicate the sizes, keys numbers, and the sources of the authorized signatures. Select Update to update your "Key Exchange Keys". Select Append to append your "Key Exchange Keys".

▶ Authorized Signatures

Use this feature to enter and configure a set of values to be used as Authorized Signatures for the system. These values also indicate the sizes, keys numbers, and the sources of the authorized signatures. Select Update to update your "Authorized Signatures". Select Append to append your "Authorized Signatures".

▶ Forbidden Signatures

Use this feature to enter and configure a set of values to be used as Forbidden Signatures for the system. These values also indicate sizes, key numbers, and key sources of the forbidden signatures. Select Update to update your "Forbidden Signatures". Select Append to append your "Forbidden Signatures".

▶ Authorized TimeStamps

This feature allows you to set and save the timestamps for the authorized signatures which will indicate the time when these signatures are entered into the system. These values also indicate sizes, keys, and key sources of the authorized timestamps. Select Update to update your "Authorized TimeStamps". Select Append to append your "Authorized TimeStamps".

OsRecovery Signature

This feature allows you to set and save the authorized signatures used for OS recovery. Select Update to update your "OS Recovery Signatures". These values also indicate sizes, keys, and key sources of the OsRecovery signatures. Select Append to append your "OS Recovery Signatures".

4.7 Boot

Use this feature to configure Boot settings.

Supermicro X12DPG-QBT6 - Boot - 1

text_image Boot Configuration Boot Mode Select LEGACY to EFI Support FIXED BOOT ORDER Priorities Boot Option #1 Boot Option #2 Boot Option #3 Boot Option #4 Boot Option #5 Boot Option #6 Boot Option #7 Boot Option #8 Boot Option #9 Delete Boot Option [UEFI] [Disabled] [UEFI Hard Disk] [UEFI CD/DVD] [UEFI USB Hard Disk] [UEFI USB CD/DVD] [UEFI USB Key] [UEFI USB Floppy] [UEFI USB Lan] [UEFI Network: (B4/DO/F0) UEFI FXE 1Fv4: Supermicro 10GBASE-T Ethernet Controller(MAC:7cc255 06f1(4)] [UEFI AF:UEFI: Built-in EFI Shell] Select boot mode LEGACY/UEFI +: Select Screen +/-: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit Version 2.22.1252 Copyright (C) 2022 AMI

Boot Mode Select

Use this item to select the type of device that the system is going to boot from. The options are Legacy, UEFI, and Dual.

Legacy to EFI Support

Select Enabled to boot EFI OS support after Legacy boot order has failed. The options are Disabled and Enabled.

FIXED BOOT ORDER Priorities

This feature prioritizes the order of bootable devices that the system boots from. Press on each item sequentially to select devices.

*If the feature "Boot Mode Select" above is set to UEFI, the following information is displayed:

- Boot Option #1 \~ Boot Option #9

*If the feature "Boot Mode Select" above is set to Legacy, the following information is displayed:

- Boot Option #1 \~ Boot Option #8

*If the feature "Boot Mode Select" above is set to Dual, the following information is displayed:

- Boot Option #1 \~ Boot Option #17

▶ Delete Boot Option

This feature allows you to select a boot device to delete from the boot priority list.

Delete Boot Option

Use this feature to remove an EFI boot option from the boot priority list.

▶UEFI NETWORK Drive BBS Priorities

This feature sets the system boot order of detected devices.

- Boot Option #1 \~ Boot Option #4

▶UEFI Application Boot Priorities

This feature sets the system boot order of detected devices.

- Boot Option #1

*If any storage media is detected, the following features will become available for configuration:

▶ Add New Boot Option

This feature allows the user to add a new boot option to the boot priority features for your system.

Add Boot Option

Use this item to specify the name for the new boot option.

Path for Boot Option

Use this item to enter the path for the new boot option in the format fsx:\path\filename.efi.

Boot Option File Path

Use this item to specify the file path for the new boot option.

Create

Use this item to set the name and the file path of the new boot option.

▶UEFI USB Key Drive BBS Priorities

This feature sets the system boot order of detected devices.

- Boot Option #1

▶USB Key Drive BBS Priorities

This feature sets the system boot order of detected devices.

- Boot Option #1

▶UEFI Hard Disk Drive BBS Priorities

This feature sets the system boot order of detected devices.

- Boot Option #1

▶Hard Disk Drive BBS Priorities

This feature sets the system boot order of detected devices.

- Boot Option #1

4.8 Save & Exit

Select the Save & Exit tab from the BIOS Setup screen to configure the settings below:

Supermicro X12DPG-QBT6 - Save & Exit - 1

text_image Aptio Setup - AMI Main Advanced Event Logs IPMI Security Boot Save & Exit Save Options Discard Changes and Exit Save Changes and Reset Save Changes Discard Changes Default Options Restore Optimized Defaults Save as User Defaults Restore User Defaults Boot Override (B4/DO/F0) UEFI PXE IPv4: Supermicro 10GBASE-T Ethernet Controller(MAC:7cc25506f1f4) (B4/DO/F1) UEFI PXE IPv4: Supermicro 10GBASE-T Ethernet Controller(MAC:7cc25506f1f5) (B4/DO/F0) UEFI PXE IPv6: Supermicro 10GBASE-T Ethernet Controller(MAC:7cc25506f1f4) (B4/DO/F1) UEFI PXE IPv6: Supermicro 10GBASE-T Ethernet Controller(MAC:7cc25506f1f5) UEFI: Built-in EFI Shell Launch EFI Shell from filesystem device Exit system setup without saving any changes. +: Select Screen ↑1: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit Version 2.22.1262 Copyright (C) 2022 AMI

Save Options

Discard Changes and Exit

Use this feature to quit the BIOS Setup without making any permanent changes to the system configuration and reboot the computer.

Save Changes and Reset

When you have completed the system configuration changes, use this feature to exit the BIOS Setup utility and reboot the computer for the new system configuration parameters to become effective.

Save Changes

When you have completed the system configuration changes, use this feature to save all changes you've made. This will not reset (reboot) the system.

Discard Changes

Select this feature and press to discard all the changes you've made.

Default Options

Restore Optimized Defaults

Select this feature and press to load manufacturer optimized default settings which are intended for maximum system performance but not for maximum stability.

Save as User Defaults

Select this feature and press to save all changes on the default values specified to the BIOS Setup utility for future use.

Select this feature and press to retrieve user-defined default settings that have been saved previously.

Boot Override

This feature allows you to override the Boot priorities sequence in the Boot menu, and immediately boot the system with a device specified instead of the one specified in the boot list. This is a one-time override.

Appendix A

BIOS POST Codes

A.1 BIOS POST Codes

The AMI BIOS supplies additional checkpoint codes, which are documented online at http://www.supermicro.com/support/manuals/ ("AMI BIOS POST Codes User's Guide").

When BIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, a diagnostic card can be attached to the computer to read I/O port 0080h (Supermicro P/N AOM-SPI80-V).

For information on AMI updates, please refer to http://www.ami.com/products/.

Appendix B

Software

After the hardware has been installed, you can install the Operating System (OS), configure RAID settings, and install the drivers.

B.1 Microsoft Windows OS Installation

If you will be using RAID, you must configure RAID settings before installing the Windows OS and the RAID driver. Refer to the RAID Configuration User Guides posted on our website at www.supermicro.com/support/manuals.

Installing the OS

  1. Create a method to access the MS Windows installation ISO file. That might be a USB flash, media drive, or the BMC KVM console.
  2. Retrieve the proper RST/RSTe driver. Go to the Supermicro web page for your motherboard and click on "Download the Latest Drivers and Utilities", select the proper driver, and copy it to a USB flash drive.
  3. Boot from a bootable device with Windows OS installation. You can see a bootable device list by pressing F11 during the system startup.

Supermicro X12DPG-QBT6 - Installing the OS - 1

text_image Please select boot device: ATEN Virtual CDROM YSOJ → IPMI virtual drive (Legacy) ASUS SDRW-08D2S-U F601 → USB DVD device (Legacy) USB FLASH DRIVE PMAP → USB flash drive with OS installation (Legacy) IBA 40-10G Slot 1900 v1060 → PXEboot (Legacy) UEFI: ATEN Virtual CDROM YSOJ → IPMI virtual drive (UEFI) UEFI: ASUS SDRW-08D2S-U F601 → USB DVD device (UEFI) UEFI: Built-in EFI Shell Enter Setup ↑ and ↓ to move selection ENTER to select boot device ESC to boot using defaults
  1. During Windows Setup, continue to the dialog where you select the drives on which to install Windows. If the disk you want to use is not listed, click on "Load driver" link at the bottom left corner.

Supermicro X12DPG-QBT6 - Installing the OS - 2

text_image Where do you want to install Windows? Name Total size Free space Type Refresh Delete Format New Load driver Extend We couldn't find any drives. To get a storage driver, click Load driver. Next

To load the driver, browse the USB flash drive for the proper driver files.

  • For RAID, choose the SATA/sSATA RAID driver indicated then choose the storage drive on which you want to install it.
  • For non-RAID, choose the SATA/sSATA AHCI driver indicated then choose the storage drive on which you want to install it.

  • Once all devices are specified, continue with the installation.

  • After the Windows OS installation has completed, the system will automatically reboot multiple times.

B.2 Driver Installation

The Supermicro website that contains drivers and utilities for your system is at https://www.supermicro.com/wdl/driver. Some of these must be installed, such as the chipset driver.

After accessing the website, go into the CDR_Images (in the parent directory of the above link) and locate the ISO file for your motherboard. Download this file to a USB flash or media drive. (You may also use a utility to extract the ISO file if preferred.)

Another option is to go to the Supermicro website at http://www.supermicro.com/products/. Find the product page for your motherboard, and "Download the Latest Drivers and Utilities".

Insert the flash drive or disk and the screen shown below should appear.

Supermicro X12DPG-QBT6 - B.2 Driver Installation - 1

text_image SUPERMICRO X12DPG-QBT6 Motherboard Drivers & Tools (Win11) Intel® C621A Chipset X12DPG-QBT6 SUPERMICRO Computer Inc. Intel Chipset INF files Microsoft .Net Framework 4.8 (Optional) ASPEED Graphics Driver Realtek High Definition Audio Driver 10G Broadcom Ethernet Driver Intel Virtual RAID on CPU Microsoft .Net SDK SUPERMICRO SuperDoctor 5 Build driver diskettes and manuals Browse CD Auto Start Up Next Time For more information, please visit SUPERMICRO's web site.

Supermicro X12DPG-QBT6 - B.2 Driver Installation - 2

Note: Click the icons showing a hand writing on paper to view the readme files for each item. Click the computer icons to the right of these items to install each item (from top to bottom) one at a time. After installing each item, you must re-boot the system before moving on to the next item on the list. The bottom icon with a CD on it allows you to view the entire contents.

B.3 SuperDoctor® 5

The Supermicro SuperDoctor 5 is a program that functions in a command-line or web-based interface for Windows and Linux operating systems. The program monitors such system health information as CPU temperature, system voltages, system power consumption, fan speed, and provides alerts via email or Simple Network Management Protocol (SNMP).

SuperDoctor 5 comes in local and remote management versions and can be used with Nagios to maximize your system monitoring needs. With SuperDoctor 5 Management Server (SSM Server), you can remotely control power on/off and reset chassis intrusion for multiple systems with SuperDoctor 5 or BMC. SuperDoctor 5 Management Server monitors HTTP and SMTP services to optimize the efficiency of your operation.

Supermicro X12DPG-QBT6 - B.3 SuperDoctor® 5 - 1

text_image SuperDoctor 5 MOTHERBOARD: CTB360-CB-ML Voltage 1.0V 2.0V 3.0V 4.0V 5.0V 6.0V 7.0V 8.0V 9.0V 10.0V 11.0V 12.0V 13.0V 14.0V 15.0V 16.0V 17.0V 18.0V 19.0V 20.0V 21.0V 22.0V 23.0V 24.0V 25.0V 26.0V 27.0V 28.0V 29.0V 30.0V 31.0V 32.0V 33.0V 34.0V 35.0V 36.0V 37.0V 38.0V 39.0V 40.0V 41.0V 42.0V 43.0V 44.0V 45.0V 46.0V 47.0V 48.0V 49.0V 50.0V 51.0V 52.0V 53.0V 54.0V 55.0V 56.0V 57.0V 58.0V 59.0V 60.0V 61.0V 62.0V 63.0V 64.0V 65.0V 66.0V 67.0V 68.0V 69.0V 70.0V 71.0V 72.0V 73.0V 74.0V 75.0V 76.0V 77.0V 78.0V 79.0V 80.0V 81.0V 82.0V 83.0V 84.0V 85.0V 86.0V 87.0V 88.0V 89.0V 90.0V 91.0V 92.0V 93.0V 94.0V 95.0V 96.0V 97.0V 98.0V 99.0V 100.0V

B.4 BMC

The X12DPG-QBT6 supports the Baseboard Management Controller (BMC). BMC is used to provide remote access, monitoring and management. There are several BIOS settings that are related to BMC.

For general documentation and information on BMC, please visit our website at: http://www.supermicro.com/products/nfo/BMC.cfm.

B.5 Logging into the BMC (Baseboard Management Controller)

Supermicro ships standard products with a unique password for the BMC ADMIN user. This password can be found on a label on the motherboard.

When logging in to the BMC for the first time, please use the unique password provided by Supermicro to log in. You can change the unique password to a user name and password of your choice for subsequent logins.

For more information regarding BMC passwords, please visit our website at http://www.supermicro.com/bmcpassword.

Appendix C

Standardized Warning Statements

The following statements are industry standard warnings, provided to warn the user of situations where a potential bodily injury may occur. Should you have questions or experience difficulty, contact Supermicro's Technical Support department for assistance. Only certified technicians should attempt to install or configure components.

Read this section in its entirety before installing or configuring components.

These warnings may also be found on our website at http://www.supermicro.com/about/policies/safety_information.cfm.

Battery Handling

Supermicro X12DPG-QBT6 - Battery Handling - 1

Warning! There is the danger of explosion if the battery is replaced incorrectly. Replace the battery only with the same or equivalent type recommended by the manufacturer. Dispose of used batteries according to the manufacturer's instructions

電池の取り扱い

Warning! Ultimate disposal of this product should be handled according to all national laws and regulations.

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Product information

Brand : Supermicro

Model : X12DPG-QBT6

Category : Motherboard