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USER MANUAL MicroBlade MBI-6219G-T7LX Supermicro
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Internal view of a server rack with multiple drive bays and a central power supply unit (no visible text or labels)User's Manual
Revision 1.0b
The information in this User's Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note: For the most up-to-date version of this manual, please see our website at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except as expressly permitted by the terms of said license.
IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in industrial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the manufacturer's instruction manual, may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case you will be required to correct the interference at your own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. "Perchlorate Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate".

WARNING: This product can expose you to chemicals including lead, known to the State of California to cause cancer and birth defects or other reproductive harm. For more information, go to www.P65Warnings.ca.gov.
Manual Revision 1.0b
Release Date: March 20, 2024
Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this document. Information in this document is subject to change without notice. Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders.
Copyright © 2020 by Super Micro Computer, Inc.
All rights reserved.
Printed in the United States of America
Preface
About this Manual
This manual is written for professional system integrators, Information Technology professionals, service personnel and technicians. It provides information for the installation and use of both the Supermicro MBI-6219G-T7LX and MBI-6119G-T7LX MicroBlade modules. Installation and maintenance should be performed by experienced professionals only.
Manual Organization
Chapter 1: Introduction
The first chapter provides a checklist of the main components included with the MicroBlade modules and describes their main features.
Chapter 2: System Safety
You should familiarize yourself with this chapter for a general overview of safety precautions that should be followed when installing and servicing the MicroBlade modules.
Chapter 3: Setup and Installation
Refer to this chapter for details on installing the MicroBlade modules into the MicroBlade chassis. Other sections cover the installation and placement of memory modules and the installation of hard disk drives into the blade module.
Chapter 4: Blade Module Features
This chapter coves features and component information about the MicroBlade modules. Included here are descriptions and information for mainboard components, connectors, LEDs and other features of the blade module.
Chapter 5: BIOS
BIOS setup is covered in this chapter for the MicroBlade modules.
Appendix A: BIOS POST Codes
BIOS POST Codes for the MicroBlade modules are explained in this appendix.
Secure Data Deletion
A secure data deletion tool designed to fully erase all data from storage devices can be found on our website: https://www.supermicro.com/about/policies/disclaimer.cfm?url=/wftp/utility/Log9_Secure_Data_Deletion_Utility/
Table of Contents
Chapter 1 Introduction....1-1
1-1 Overview....1-1
1-2 Blade Module Features.... 1-2
Processors 1-2
Memory 1-2
Storage 1-3
RAID 1-3
Density....1-3
BMC Password 1-3
1-3 Contacting Supermicro 1-4
Chapter 2 Standardized Warning Statements....2-1
2-1 About Standardized Warning Statements ......2-1
Warning Definition....2-1
Installation Instructions 2-3
Circuit Breaker 2-4
Power Disconnection Warning 2-5
Equipment Installation....2-6
Restricted Area 2-7
Battery Handling 2-9
Redundant Power Supplies 2-10
Backplane Voltage 2-11
Comply with Local and National Electrical Codes....2-12
Product Disposal....2-13
Hot Swap Fan Warning 2-14
Power Cable and AC Adapter 2-15
Chapter 3 Setup and Installation....3-1
3-1 Overview....3-1
3-2 Installing MicroBlade Modules 3-1
Powering Up a MicroBlade Module Unit ....3-1
Powering Down a MicroBlade Module Unit....3-1
Removing a MicroBlade Module Unit from the Enclosure 3-2
Installing a Blade Unit into the Enclosure 3-2
3-3 Onboard Battery Installation....3-3
3-4 Memory Installation....3-4
Populating Memory Slots 3-4
Memory Support 3-4
DIMM Installation 3-5
3-5 Hard Disk Drive Installation 3-7
3-6 Installing the Operating System....3-7
Installing with a SATA-DOM Module 3-7
Installing via PXE Boot....3-7
Installing via Virtual Media (Drive Redirection) 3-7
Chapter 4 MicroBlade Module Features ....4-1
4-1 Control Panel 4-2
Power Button 4-3
LED Indicators 4-3
4-2 Serverboard 4-4
Jumpers 4-6
CMOS Clear 4-6
4-3 Blade Unit Components 4-7
Memory Support 4-8
Hard Disk Drives 4-9
Blade Power Consumption Page.... 4-9
Chapter 5 BIOS....5-1
5-1 Introduction.... 5-1
System BIOS 5-1
How To Change the Configuration Data 5-1
Starting the Setup Utility 5-1
5-2 BIOS Updates....5-2
Flashing a BIOS using a Floppy Image File....5-2
5-3 Running Setup 5-2
5-4 Main BIOS Setup....5-3
5-5 Advanced Setup 5-5
5-6 Event Logs Setup....5-17
5-7 IPMI Setup....5-18
5-8 Security 5-19
5-9 Boot 5-19
5-10 Save & Exit.... 5-20
Appendix A AMI UEFI BIOS POST Codes....A-1
A-1 Checkpoint Ranges....A-1
A-2 Standard Checkpoints....A-2
A-3 OEM-Reserved Checkpoint Ranges ......A-9
Chapter 1 Introduction
1-1 Overview
This user's manual covers the MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module. This MicroBlade module is a compact self-contained server that connects into a pre-cabled enclosure that provides power, cooling, management and networking functions. One enclosure for the MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module can hold twenty-eight blade units.
In this manual, “blade system” refers to the entire system (including the enclosure and blades units), “blade”, “MicroBlade” or “blade unit” refers to a single MicroBlade module and “blade enclosure” is the chassis that the MicroBlades, power supplies and MicroBlade modules are housed within.
Please refer to our web site for information on operating systems that have been certified for use with the MicroBlade (http://www.supermicro.com/products/nfo/microblade.cfm).
Note: For your system to work properly, please follow the links below to download all necessary drivers/utilities and the user's manual for your server.
- Supermicro product manuals: http://www.MicroBlade.com/support/manuals/
- Product drivers and utilities: ftp://ftp.supermicro.com
- Product safety information: http://www.supermicro.com/about/policies/safety_information.cfm
- If you have any questions, please contact our support team at: support@supermicro.com
Note: A complete list of safety warnings is provided on the Supermicro web site at http://www.supermicro.com/about/policies/safety_information.cfm.
1-2 Blade Module Features
Table 1-1 lists the main features of the MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module. See the proceeding section for components typically included in a blade system and other optional components. Specific details for the MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module are found in Chapter 4: "MicroBlade Module Features" on page 4-1. The only difference between the two MicroBlade modules is that the MBI-6119G-T7LX MicroBlade module has one node and the B2SS1-MTF serverboard, while the MBI-6219G-T7LX MicroBlade module has two nodes and the B2SS2-MTF serverboard.
Table 1-1. MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade Module Specification Features
| Serverboard | B2SS1-MTF (MBI-6119G-T7LX), B2SS2-MTF (MBI-6219G-T7LX)/(proprietary form factor) |
| Blade System Enclosures MBE-628E-420/820 | |
| Chassis Specifications | Chassis Dimensions (HxWxD): 1.2" x 4.94" x 23.2" (30.48-mm x 125.476-mm x 589.28-mm), Gross Weight: 7.5 lbs (3.4 kg) |
| Processors | One (1) Intel® Xeon® E5-2600 V3/V4 embedded processor in an FCB-GA1440 socket on the serverboard |
| Chipset Intel C236 | |
| BIOS 128 MB SPI Flash EEPROM with AMI® BIOS | |
| Memory Capacity | Supports up to 32 GB SODIMM DDR4 2133 MHz speed and 16 GB size SODIMM memory in two (2) FCBGA1440 DIMM sockets |
| Hard Drive Bays | The blade module supports one (1) 2.5" SATA3 HDD/SSD disk drive per node. Additionally, two (2) M.2 and one (1) SATA-DOM connectors are also available per node. |
Processors
The MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module supports one E3-1500 V5 series processor in an FCBGA1440 socket embedded in the serverboard for each node.
Refer to the Supermicro web site for a complete listing of supported processors (http://www.supermicro.com/products/microblade). Please note that you will need to check the detailed specifications of a particular blade module for a list of the CPUs it supports.
Details on installation of the processor into the MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module are found in Chapter 3: " Setup and Installation" on page 3-1.
Memory
Each of the MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module's nodes have two (2) FCBGA1440 DIMM sockets that can support up to 32 GB SODIMM of DDR4 2133 MHz speed, 16 GB size SODIMM memory. Memory is interleaved, which requires both modules to be of the same size and speed.
Please refer to the Supermicro web site for a list of supported memory http://www.supermicro.com/products/microblade The detailed specifications for a blade module will contain a link to a list of recommended memory sizes and manufacturers. etails on installation of memory modules into the MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module are found in Chapter 3: " Setup and Installation" on page 3-1.
Storage
The MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module has one (1) 2.5" SATA3 HDD/SSD for an internally mounted drive per node. Additionally, two (2) M.2 and one (1) SATA-DOM connectors are available that can be used for connection to drives for storage or for installation of the node's operating system for each node. See Chapter 3: " Setup and Installation" on page 3-1 for storage installation details.
RAID
The MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module has only one hard drive per node, so no RAID array is possible.
Density
A maximum of twenty-eight blade modules may be installed into a single blade enclosure. Each blade enclosure is a 6U form factor, so a standard 42U rack may accommodate up to seven enclosures with 196 blade modules, the equivalent of 392 1U servers. With the inclusion of up to fourteen CMM modules and up to twenty-eight Gigabit Ethernet switches this would occupy up to 434U space in a conventional 1U server configuration.
BMC Password
For security, each blade unit is assigned a unique default BMC password for the ADMIN user. It can be found on a sticker on the blade service tab, and a sticker on the motherboard. The sticker also displays the BMC MAC address. For more information, refer to our website at https://www.supermicro.com/en/support/BMC_Unique_Password. The service tab and an example sticker are illustrated below.

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Service TabPassword Sticker

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BMC AC1F6BC PWD SUOKJ1-3 Contacting Supermicro
Headquarters
Address: Super Micro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel: +1 (408) 503-8000
Fax: +1 (408) 503-8008
marketing@supermicro.com (General Information)
Email: support@supermicro.com (Technical Support)
Web Site: www.supermicro.com
Europe
Address: Super Micro Computer B.V.
's-Hertogenbosch, The Netherlands
Tel: +31 (0) 73-6400390
Fax: +31 (0) 73-6416525
sales@supermicro.nl (General Information)
Email: support@supermicro.nl (Technical Support)
rma@supermicro.nl (Customer Support)
Asia-Pacific
Address: Super Micro Computer, Inc.
3F, No. 150, Jian 1st Rd.
Zhonghe Dist., New Taipei City 23511
Taiwan (R.O.C)
Tel: +886-(2) 8226-3990
Fax: +886-(2) 8226-3992
Web Site: www.supermicro.com.tw
Technical Support:
Email: support@supermicro.com.tw
Tel: +886-(2)-8226-3990
Chapter 2 Standardized Warning Statements
2-1 About Standardized Warning Statements
The following statements are industry standard warnings, provided to warn the user of situations which have the potential for bodily injury. Should you have questions or experience difficulty, contact Supermicro's Technical Support department for assistance. Only certified technicians should attempt to install or configure components.
Read this appendix in its entirety before installing or configuring components in the Supermicro chassis
These warnings may also be found on our website at http://www.supermicro.com/about/policies/safety_information.cfm.
Warning Definition

Warning!
This warning symbol means danger. You are in a situation that could cause bodily injury. Before you work on any equipment, be aware of the hazards involved with electrical circuitry and be familiar with standard practices for preventing accidents.
警告の定義
この警告サインは危険を意味します。
Installation Instructions

Warning!
Read the installation instructions before connecting the system to the power source.
設置手順書
This product relies on the building's installation for short-circuit (overcurrent) protection. Ensure that the protective device is rated not greater than: 250 V,
20 A.
サーキット・ブレーカー
Power Disconnection Warning

Warning!
The system must be disconnected from all sources of power and the power cord removed from the power supply module(s) before accessing the chassis interior to install or remove system components.
電源切断の警告
Equipment Installation

Warning!
Only trained and qualified personnel should be allowed to install, replace, or service this equipment.
機器の設置
This unit is intended for installation in restricted access areas. A restricted access area can be accessed only through the use of a special tool, lock and key, or other means of security. (This warning does not apply to workstations).
アクセス制限区域
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경고!
There is the danger of explosion if the battery is replaced incorrectly. Replace the battery only with the same or equivalent type recommended by the manufacturer. Dispose of used batteries according to the manufacturer's instructions.
電池の取り扱い
Redundant Power Supplies

Warning!
This unit might have more than one power supply connection. All connections must be removed to de-energize the unit.
冗長電源裝置
Hazardous voltage or energy is present on the backplane when the system is operating. Use caution when servicing.
バックプレーンの電圧
Comply with Local and National Electrical Codes

Warning!
Installation of the equipment must comply with local and national electrical codes.
地方および国の電気規格に準拠
Ultimate disposal of this product should be handled according to all national laws and regulations.
製品の廃棄
The fans might still be turning when you remove the fan assembly from the chassis. Keep fingers, screwdrivers, and other objects away from the openings in the fan assembly's housing.
ファン・ホットスワップの警告
Power Cable and AC Adapter

Warning!
When installing the product, use the provided or designated connection cables, power cables and AC adaptors. Using any other cables and adaptors could cause a malfunction or a fire. Electrical Appliance and Material Safety Law prohibits the use of UL or CSA-certified cables (that have UL/CSA shown on the code) for any other electrical devices than products designated by Supermicro only.
電源コードと AC アダプター
Chapter 3 Setup and Installation
3-1 Overview
This chapter covers the setup and installation of the MicroBlade module and its components.
3-2 Installing MicroBlade Modules
Up to twenty-eight MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module may be installed into a single MBE-628E-420/820 MicroBlade module enclosure. MicroBlade modules with Windows and Linux operating systems may be mixed together in the same blade enclosure.
Powering Up a MicroBlade Module Unit
Each MicroBlade module unit may be powered on and off independently from the rest of the MicroBlade modules installed in the same enclosure. A MicroBlade module unit may be powered up in two ways:
- Press the power button on the MicroBlade module unit.
- Use IPMIView or the web-browser based management utility to apply power using the CMM MicroBlade module.
Powering Down a MicroBlade Module Unit
A MicroBlade module unit may be powered down in either of the following ways:
- Press the power button on the MicroBlade module unit.
- Use IPMIView or the web-browser based management utility to power down (if you have Operator or Admin privileges on the CMM).
- Use IPMItool when connected to the CMM to power down (if you have Operator or Admin privileges on the CMM).
Removing a MicroBlade Module Unit from the Enclosure
Although the MicroBlade module system may continue to run, individual MicroBlade modules should always be powered down before removing them from the enclosure.
Removing a MicroBlade Module Unit from the Enclosure
- Power down the MicroBlade module unit (see "Powering Down a MicroBlade Module Unit" above).
- Squeeze both handles to depress the red sections then pull out both handles completely and use them to pull the MicroBlade module unit from the enclosure.
Note: MicroBlade modules can be hot-plugged from the enclosure.
Installing a Blade Unit into the Enclosure
Use the procedure below to install a blade unit into an enclosure.
Installing a MicroBlade Module Unit into the Enclosure
- Slowly push the MicroBlade module unit into its bay with the handles fully pulled out (see Figure 3-1).
- When the MicroBlade module stops, push the handles back in to their locked position, making sure the notches in both handles catch the lip of the enclosure.
Note: MicroBlade modules can be Hot-Plugged into the enclosure.
Caution: Use extreme caution when inserting a MicroBlade module into the enclosure. If the MicroBlade module's power connector becomes damaged, it can damage pins on other MicroBlade module bays that it is inserted into.
Figure 3-1. Inserting a MicroBlade Module into the Enclosure

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Technical line drawing of a server rack unit with mounting brackets and internal panel structures (no text or symbols)3-3 Onboard Battery Installation
A battery is included on the serverboard to supply certain volatile memory components with power when power has been removed from the MicroBlade module. If this battery dies, it must be replaced with an equivalent CR2032 Lithium 3V battery. Dispose of used batteries according to the manufacturer's instructions. See Figure 3-2 for a diagram of installing a new onboard battery.
Caution: There is a danger of explosion if the onboard battery is installed upside down, which reverses its polarities.
Figure 3-2. Installing the Onboard Battery

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Lithium Battery Battery Holder3-4 Memory Installation
The serverboard of each MicroBlade module unit must be populated with DIMMs (Dual In-line Memory Modules) to provide system memory. The DIMMs should all be of the same size and speed and from the same Super Micro authorized manufacturer due to compatibility issues. See details below on supported memory and our web site (www.superblade.com/products/microblade for recommended memory.
Populating Memory Slots
The mainboard of a MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module has two (2) memory slots for each processor of a node, up to two nodes total for a total of four (4) memory slots per MicroBlade module. Both interleaved and non-interleaved memory are supported, so you may populate any number of DIMM slots.
Each of the nodes has its own memory bank. Populate Channel A first, the Channel B. In this example, Channel A of Node 1 is designated as P1-DIMMA1 and Channel B is P1-DIMMB1. Be sure to populate the sockets with SODIMM memory with the same speed.
For an interleaved configuration, memory modules of the same size and speed must be installed in pairs. You should not mix DIMMs of different sizes and speeds.
Note: Check the Supermicro website for a list of memory modules that have been validated with the B2SS1-MTF/B2SS2-MTF motherboard.
Note: Though multiple DIMM memory module types and speeds may be supported, you need to use DIMM memory modules of the same speed and type.
Memory Support
Each node on the B2SS1-MTF/B2SS2-MTF motherboard supports up to 32GB of 1600MHz of ECC DDR4 SODIMM memory in two SODIMM slots (see Figure 3-3).
Figure 3-3. SO DIMM Sideways View

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P1-DIMMA1 P1-DIMMB1Table 3-1. Memory Population Guidelines
| P1/P2/P3/P4-DIMMA1 P1/P2/P3/P4-DIMMB1 Total System Memory | ||
| 2GB 2GB | ||
| 2GB 2GB 4GB | ||
| 4GB 4GB | ||
| 4GB 4GB 8GB | ||
| 8GB 8GB | ||
| 8GB 8GB 16GB | ||
| 16GB 16GB | ||
| 16GB 16GB 32GB | ||
DIMM Installation
Caution: Exercise extreme care when installing or removing SODIMM modules to prevent any possible damage.
Installing/Removing SODIMM Memory Modules
- Power down the MicroBlade module (see "Powering Down a MicroBlade Module Unit" on page 3-1).
- Remove the MicroBlade module from the enclosure.
- Position the SODIMM module's bottom key so it aligns with the receptive point on the slot (Figure 3-4).
Figure 3-4. Aligning the SO DIMM

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Align- Insert the SODIMM module vertically at about a 45 degree angle (Figure 3-5).
Figure 3-5. Inserting the SO DIMM

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Insert this end first Press down until the module locks into place.- Press down until the module locks into place. The side clips will automatically secure the SODIMM module, locking it into place (Figure 3-6).
Figure 3-6. Securing the SO DIMM in Place

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Locking Clip Locking Clip- Power up the blade unit (see "Powering Up a MicroBlade Module Unit" on page 3-1).
- To Remove: Use your thumbs to gently push the side clips near both ends away from the module. This should release it from the slot. Pull the SODIMM module upwards.
3-5 Hard Disk Drive Installation
A single SATA3 HDD/SSD can be installed in the MicroBlade module for each node (up to two nodes/drives total for MBI-6219G-T7LX MicroBlade module) and cannot be removed or replaced without powering down the blade unit they reside in. A blade module needs a hard disk drive with an operating system installed to operate.
Additionally, two (2) M.2 are available that can be used for connection to SSD drives for storage or for installation of the node's operating system per node.
3-6 Installing the Operating System
An operating system (OS) must be installed on each MicroBlade module. Blades with Microsoft Windows OS and blades with Linux OS can both occupy and operate within the same blade enclosure. Refer to the SuperMicro web site for a complete list of supported operating systems.
There are several methods of installing an OS to the blade modules.
Installing with a SATA-DOM Module
The MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module contains a SATA-DOM socket for each node on the serverboard. The operating system can be installed separately onto the SATA-DOM module, which when plugged into the SATA-DOM socket of a node of the MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module, can be used as the system's operating system just as if it was a hard disk drive of the system.
Installing via PXE Boot
PXE (Preboot Execution Environment) is used to boot a computer over a network. To install the OS via PXE, the following conditions must be met:
- The PXE BOOT option in BIOS must be enabled.
- A PXE server has been configured (this can be another blade in the system).
- The PXE server must be connected over a network to the blade to be booted.
- The blade has only non-partitioned/unformatted hard drives installed and no bootable devices attached to it.
Once these conditions are met, make sure the PXE server is running. Then turn on the blade on which you wish to boot and/or install the OS. The BIOS in the blade will look at all bootable devices and finding none will connect to the PXE server to begin the boot/install.
Installing via Virtual Media (Drive Redirection)
You can install the OS via Virtual Media through either the IPMIview (Java based client utility), IPMItool or the Web-based Management Utility. With this method, the OS is installed from an ISO image that resides on another system/blade.
Chapter 4 MicroBlade Module Features
Figure 4-1. MBI-6219G-T7LX /MBI-6119G-T7LX Blade Unit Front View

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Internal view of a server rack with multiple CPU modules and a power adapter (no visible text or labels)This chapter describes the MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module unit. Installation and maintenance should be performed by experienced technicians only.
See Figure 4-1 for a front view of the blade unit and Table 4-1 for its features.
Table 4-1. MBI-6219G-T7LX /MBI-6119G-T7LX Blade Unit Features
| Feature Description | |
| Processors | One (1) Intel® Xeon® E3-1500 V5 embedded processor in an FCBGA1440 socket per node on the serverboard |
| Memory | Supports up to 32 GB SODIMM DDR4 2133 MHz speed and 16 GB size SODIMM memory in two (2) DIMM sockets per node |
| Storage | The blade module supports one (1) 2.5" SATA3 HDD/SSD disk drive per node. Additionally, two (2) M.2 and one (1) SATA-DOM connectors are also available per node. |
| BIOS 128 MB SPI Flash EEPROM with AMI® BIOS | |
4-1 Control Panel
Each MicroBlade module has a similar control panel (Figure 4-2) with power on/off button, reset button and LEDs on the front left side of the module. The numbers mentioned in Figure 4-2 are described in Table 4-2.
Figure 4-2. Blade Control Panel

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5 4 3 2 1Table 4-2. Blade Control Panel
| Item | Function State | Description | |
| 1 Power Button N/A Turns | MicroBlade module on and off | ||
| 2 Power LED | Green Indicates power status “On” | ||
| Amber | Before the BMC is ready, the Amber LED will blink until the last node out of the four is ready. | ||
| Red Power Failure | |||
| 3 | KVM/UID LED (Blue) | Steady On Indicates that KVM has been initialized on this blade module | |
| Flashing | Serves as a UID indicator (the UID function is activated with a management program) | ||
| 4 | Network LED (Green) | Flashing Green | Flashes on and off to indicate traffic (Tx and RX data) on the LAN connection to this blade module. |
| Network LED (Orange) | Flashing Orange | Flashes on and off to indicate traffic over the InfiniBand module (when present in the system) | |
| 5 | System Fault LED (Red) | Steady On | This LED illuminates red when a fatal error occurs. This may be the result of a memory error, a VGA error or any other fatal error that prevents the operating system from booting up. |
Power Button
Each MicroBlade module has its own power button so that individual blade units within the enclosure may be turned on or off independently of the others. Press the power button (#1) to turn on the blade server. The power LED (#3) will turn green. To turn off, press and hold the power button for >4 seconds and the power LED will turn orange.
LED Indicators
Blade module LEDs are described below in Table 4-3.
Table 4-3. Blade Module LED Indicators
| LED State Description | ||
| Power LED | Green Power OnAmber StandbyRed Power Failure | a |
| System Fault LED (Red) | Steady On | This LED illuminates red when a fatal error occurs. This may be the result of a memory error, a VGA error or any other fatal error that prevents the operating system from booting up. |
a. In the event of a power failure, the N+1 Redundant Power Supply (if included in your system's configuration) automatically turns on and picks up the system load to provide uninterrupted operation. The failed power supply should be replaced with a new one as soon as possible.
4-2 Serverboard
Both serverboards of the MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module are a proprietary design, based upon the E3-1500 V5 processor. See Figure 4-3 for a view of the B2SS2-MTF serverboard, Figure 4-4 and Figure 4-5 for block diagrams of these chipsets, and Figure 4-6 and Figure 4-7 for exploded view diagrams of the MicroBlade module units.
Figure 4-3. B2SS1-MTF and B2SS2-MTF Serverboards

text_image
B2SS1-MTF Serverboard 1 2 3B2SS2-MTF Serverboard

text_image
3 3 1 2 1 2Table 4-4. Serverboard Layout Items
| Item Description | |
| 1 One E3-1 | 500 V5 processors in a FCBGA1440 sockets (one per node) |
| 2 Two memory slots for SODIMM memory modules (two per node) | |
| 3 One 2.5" | SATA3 HDD/SSD drives (one per node) |
Figure 4-4. Intel B2SS1-MTF Block Diagram

flowchart
graph TD
A["IMVP8"] -->|SVID| B["INTEL BGA1440"]
C["M.2"] -->|PCIe 3.0 X 4| B
D["M.2"] -->|PCIe 3.0 X 4| B
B -->|DDR4 (CHA) 2133/1866/1600MHz| E["DIMM1"]
B -->|DDR4 (CHB) 2133/1866/1600MHz| F["DIMM2"]
B -->|PCIe 3.0 X 4| G["X710-BM2"]
G --> H["10G KRx2"]
H -->|12V| I["GOLD FINGER"]
I --> J["1G Serdes"]
I --> K["REALTEK RTL8367MB (LAN Switch)"]
K --> L["USB 2.0 X 2 480Mb/s"]
L --> M["ASPEED ASP2400"]
M --> N["RGB,DEBUG"]
N --> O["TPM Header"]
O --> P["USB 2.0 X 2 480Mb/s"]
P --> Q["SATA 3.0 X 2 6.0Gb/s"]
Q --> R["AOM-BPN-MS28HS"]
R --> S["1 X SATA DOM 1 X 2.5" SATA"]
T["C236 PCH"] --> U["FLASH SPI 128Mb"]
U --> V["SPI"]
V --> W["x4 DMI II 8.0GT"]
W --> X["&I DI MI II"]
style A fill:#f9f,stroke:#333
style C fill:#f9f,stroke:#333
style D fill:#f9f,stroke:#333
style E fill:#ccf,stroke:#333
style F fill:#ccf,stroke:#333
style G fill:#ccf,stroke:#333
style H fill:#ccf,stroke:#333
style I fill:#ccf,stroke:#333
style J fill:#ccf,stroke:#333
style K fill:#ccf,stroke:#333
style L fill:#ccf,stroke:#333
style M fill:#ccf,stroke:#333
style N fill:#ccf,stroke:#333
style O fill:#ccf,stroke:#333
style P fill:#ccf,stroke:#333
style Q fill:#ccf,stroke:#333
style R fill:#ccf,stroke:#333
style S fill:#ccf,stroke:#333
style T fill:#ccf,stroke:#333
Figure 4-5. Intel B2SS2-MTF Block Diagram

flowchart
graph TD
subgraph NODE 1
A["INTEL BGA1440"] -->|PCIe 3.0 X 4| B["C236 PCH"]
B -->|PCIe 1.0 X 1 PCIe 1.0 X 1| C["ASPEED ASP2400"]
C -->|RGMII| D["GOLD FINGER"]
D -->|1G Serdes| E["REALTEK RTL8367MB (LAN Switch)"]
E -->|RGMII| F["ASPEED ASP2400"]
F -->|LPCLPC| G["C236 PCH"]
G -->|SPI| H["FLASH SPI 128Mb"]
I["FLASH SPI 128Mb"] --> J["SPI"]
K["MACs"] --> L["FC=30X4"]
M["MACs"] --> N["FC=30X4"]
O["MACs"] --> P["FC=30X4"]
Q["MACs"] --> R["FC=30X4"]
S["MACs"] --> T["FC=30X4"]
U["MACs"] --> V["FC=30X4"]
end
subgraph NODE 2
W["INTEL BGA1440"] -->|PCIe 3.0 X 4| X["X710-BM2"]
X -->|PCIe 3.0 X 4| Y["X710-BM2"]
Y -->|PCIe 3.0 X 4| Z["X710-BM2"]
AA["MACs"] --> AB["FC=30X4"]
AC["MACs"] --> AD["FC=30X4"]
AE["MACs"] --> AF["FC=30X4"]
AG["MACs"] --> AH["FC=30X4"]
AI["MACs"] --> AJ["FC=30X4"]
AK["MACs"] --> AL["FC=30X4"]
AM["MACs"] --> AN["FC=30X4"]
end
B -->|PCIe 1.0 X 1 PCIe 1.0 X 1| B
B -->|TPM Header| B
B -->|ASPEED ASP2400| B
B -->|KVM Connector| B
B -->|AOM-BPN-MS26/IS| B
B -->|RGB, DEBUGRGB, DEBUG| B
B -->|USB 2.0 X 2USB 2.0 X 2| B
B -->|SATA 3.0 X 2SATA 3.0 X 2| B
B -->|2 X 2.5" SATA 2 X SATA DOM| B
B -->|12V| B
B -->|1G Serdes| B
B -->|1G Serdes| B
B -->|1G Serdes| B
B -->|1G Serdes| B
B -->|1G Serdes| B
B -->|1G Serdes| B
B -->|1G Serdes| B
B -->|1G Serdes| B
B -->|1G Serdes| B
B -->|1G Serdes|
B -->|1G Serdes|
B -->|1G Serdes|
B -->|1G Serdes|
B -->|1G Serdes|
B -->|1G Serdes|
B -->|1G Serdes|
B -->|1G Serdes|
B -->|1G Serdes|
B -->|1G Serdes|
B -->|1G Serdes|
B -->|1G Serdes|
Jumpers
Any jumpers present on the mainboard are used by the manufacturer only; there are no jumpers used to configure the operation of the mainboard.
CMOS Clear
JBT1 is used to clear CMOS and will also clear any passwords. JBT1 consists of two contact pads located near the BIOS chip.
Clearing CMOS
- First power down the blade and remove it from the enclosure.
- Short the CMOS pads with a metal object such as a small screwdriver.
- Install the blade back into the enclosure and power it on.
4-3 Blade Unit Components
Figure 4-6. Exploded View of a MBI-6119G-T7LX Blade Module

text_image
Technical diagram of an electronic device with numbered components and dashed lines indicating assembly or connection points.Table 4-5. Main Components of a MBI-6119G-T7LX Blade Module
| Item Description |
| 1 Blade Unit/Module |
| 2 2.5" SATA3 HDD/SSD Hard Drive |
| 3 Front Top Cover |
| 4 DIMM slots |
| 5 CPU/Heatsink |
| 6 Hard Drive Backplane |
| 7 M.2 Ports |
| 8 SATA-DOM Ports |
Figure 4-7. Exploded View of a MBI-6219G-T7LX Blade Module

text_image
Technical diagram of an electronic device with numbered components and red circular annotations indicating specific areas.Table 4-6. Main Components of a MBI-6219G-T7LX Blade Module
| Item Description |
| 1 Blade Unit/Module |
| 2 2.5" SATA3 HDD/SSD Hard Drives |
| 3 Front Top Cover |
| 4 DIMM slots |
| 5 CPU/Heatsinks |
| 6 Hard Drive Backplane |
| 7 M.2 Ports |
| 8 SATA-DOM ports |
Memory Support
The MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module supports up to 32 GB SODIMM of DDR4 2133 MHz speed, 16 GB size memory in two (2) sockets per node. See Section 3-4: Memory Installation on page 3-4 for further details on serverboard memory installation.
Hard Disk Drives
The MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module accommodates one (1) 2.5" SATA3 HDD/SSD SATA3 HDD/SSD drive per node. The drives cannot be removed or replaced without powering down the blade unit they reside in. See Chapter 1 for information on RAID Setup.
WARNING: Enterprise level hard disk drives are recommended for use in Supermicro chassis and servers. For information on recommended HDDs, visit the Supermicro Web site at http://www.supermicro.com/products/nfo/storage.cfm.
Blade Power Consumption Page
Using the Web-based Management Utility from the CMM module you may use the System Health - Blade Power Consumption page to view graphs and other information about the power consumption of each MBI-6219G-T7LX /MBI-6119G-T7LX blade in your system (Figure 4-8).
For more details on the Web-based Management Utility see http://www.supermicro.com/products/superblade/management/ on the Supermicro Website.
Figure 4-8. System Health - Blade Power Consumption Page

line
| Time | Average (V) | Minimum (W) | Maximum (V) | |------|-------------|-------------|-------------| | 0 | 52 | 58 | 62 | | 1 | 51 | 47 | 84 | | 2 | 325 | 0 | 370 | | 3 | None | 2015/05/05 11:14:23 | 2915/05/05 11:28:09 | | 4 | None | 2015/05/04 20:13:27 | 2915/05/05 15:15:27 | | 5 | None | 0 | 370 | | 6 | None | 2015/04/24 04:10:45 | 2915/04/24 06:38:43 | | 7 | None | 0 | 370 | | 8 | None | 0 | 370 | | 9 | None | 0 | 370 | | 10 | None | 0 | 370 | | 11 | None | 0 | 370 | | 12 | None | 0 | 370 | | 13 | None | 0 | 370 | | 14 | None | 0 | 370 | | 15 | None | 0 | 370 | | 16 | None | 0 | 370 | | 17 | None | 0 | 370 | | 18 | None | 0 | 370 | | 19 | None | 0 | 370 | | 20 | None | 0 | 370 | | 21 | None | 0 | 370 | | 22 | None | 0 | 370 | | 23 | None | 0 | 370 | | 24 | None | 0 | 370 | | 25 | None | 0 | 370 | | 26 | None | 0 | 370 | | 27 | None | 0 | 370 | | 28 | None | 0 | 370 | | 29 | None | 0 | 370 | | 30 | None | 0 | 370 | | 31 | None | 0 | 370 | | 32 | None | 0 | 370 | | 33 | None | 0 | 370 | | 34 | None | 0 | 370 | | 35 | None | 0 | 370 | | 36 | None | 0 | 370 | | 37 | None | 0 | 370 | | 38 | None | 0 | 370 | | 39 | None | 0 | 370 | | 40 | None | 0 | 370 | | Note: Power Statistics and Time Metric Analysis. The Power Statistics data is extracted from the Source Health configuration. The Remote Control and Virtual Node Maintenance and MacroRescure are shown on the chart. The Power Statistics data is presented in the table above. The Time and Power Consumption data are plotted as lines on the charts. The Power Statistics data is presented in the table below. The Power Statistics data is presented in the table above. The Remote Control data is presented in the table below. The Virtual Node Maintenance and MacroRescure data is presented in the table above. The Power Statistics data is presented in the table above. The Power Consumption data is presented in the table above. The Power Statistics data is presented in the table above. The Remote Control data is presented in the table above. The Virtual Node Maintenance and MacroRescure data is presented in the table above. The Power Statistics data is presented in the table above. The Power Consumption data is presented in the table above. The Power Statistics data is presented in the table above. The Remote Control data is presented in the table above. The Virtual Node Maintenance and MacroRescure data is presented in the table above. The Power Statistics data is presented in the table above. The Power Consumption data is presented in the table below.Chapter 5 BIOS
5-1 Introduction
This chapter describes the BIOS for the MBI-6219G-T7LX /MBI-6119G-T7LX MicroBlade module. This MicroBlade module uses a 128 MB SPI Flash EEPROM with AMI® BIOS™ that is stored in a flash chip. This BIOS can be easily upgraded using a floppy disk-based program.
Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual. Please refer to the http://www.supermicro.com/products/microblade/module/web site for further details on BIOS setup and the BIOS menus for your MicroBlade module.
System BIOS
BIOS stands for Basic Input Output System. The 128 MB SPI Flash EEPROM with AMI® BIOS BIOS flash chip stores the system parameters, types of disk drives, video displays, in the CMOS. The CMOS memory requires very little electrical power. When the blade unit is turned off, a backup battery provides power to the BIOS flash chip, enabling it to retain system parameters. Each time the blade is powered on it is configured with the values stored in the BIOS ROM by the system BIOS, which gains control at boot up.
How To Change the Configuration Data
The CMOS information that determines the system parameters may be changed by entering the BIOS Setup utility. This Setup utility can be accessed by pressing the
Starting the Setup Utility
Normally, the only visible POST (Power-On Self-Test) routine is the memory test. As the memory is being tested, press the
Caution: To prevent possible boot failure, do not shut down or reset the system while updating the BIOS.
5-2 BIOS Updates
It may be necessary to update the BIOS used in the blade modules on occasion. However, it is recommended that you not update BIOS if you are not experiencing problems with a blade module.
Updated BIOS files are located on our web site (http://www.supermicro.com/products/microblade). Please check the current BIOS revision and make sure it is newer than your current BIOS before downloading.
There are several methods you may use to upgrade (flash) your BIOS. After downloading the appropriate BIOS file (in a zip file format), follow one of the methods described below to flash the new BIOS.
Flashing a BIOS using a Floppy Image File
This method must be performed remotely.
- Copy the image file from the zip file to your desktop.
-
Use the web browser or IPMIView to access your CMM remotely using its IP Address.
-
Go to the V IRTUAL MEDIA menu and select FLOPPY IMAGE UPLOAD.
-
BROWSE or OPEN to locate the *.img file on your desktop and select it.
-
Press the UPLOAD button and wait a few seconds for the image to upload to the CMM.
-
Once the upload finishes, turn on the blade module and press
to enter the BIOS setup utility. -
In the B OOT MENU, bring USB LS120: PEPPCMM VIRTUAL DISC 1 to the top of the boot priority list.
-
Exit while saving the changes. The blade module will boot to the virtual media (floppy image) A:!>.
-
Type flash filename.rom.
Note: Replace filename.rom by the actual ROM file name (such as B8DTE142.rom for example) in the command.
5-3 Running Setup
Note: Default settings are in bold text unless otherwise noted.
The BIOS setup options described in this section are selected by choosing the appropriate text from the MAIN BIOS SETUP screen. All displayed text is described in this section, although the screen display is often all you need to understand how to set the options.
When you first power on the computer, the BIOS is immediately activated.
While the BIOS is in control, the Setup program can be activated in one of two ways:
- By pressing
immediately after turning the system on, or - When the message Press the
key to enter Setup appears briefly at the bottom of the screen during the POST, press the key to activate the main SETUP menu:
5-4 Main BIOS Setup
Figure 5-1. BIOS Setup Screen
| System Date System Time | [Wed 08/31/2016] [11:47:15] | Set the Date. Use Tab to switch between Date elements. |
| Supermicro B2SS2-MTF BIOS Version Build Date CPLD Version | 1.0 08/11/2016 04.b1.00 | |
| Memory Information Total Memory Memory Speed | 16384 MB 2133 MHz | |
| +: Select Screen ↑↓: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit |
Version 2.17.1254. Copyright (C) 2016 American Megatrends, Inc.
All Main Setup options are described in this section. Use the UP/DOWN arrow keys to move among the different settings in each menu. Use the LEFT/RIGHT arrow keys to change the options for each setting. Press the
Menu options found in the MAIN BIOS SETUP menu are described in Table 5-1.
Table 5-1. Main BIOS Setup Menu Options
| Menu Option Description | |
| System Date | Using the arrow keys, highlight the month, day and year fields, and enter the correct data for the system date. Press thekey to save the data. |
| System Time | To set the system date and time, key in the correct information in the appropriate fields. Then press thekey to save the data. |
| BIOS Information | BIOS static display information including the serverboardserverboard number, SMC version, SMC Build Date and Total Memory is also shown on the screen. |
5-5 Advanced Setup
Choose Advanced from the BIOS Setup Utility main menu with the arrow keys to display the ADVANCED SETUP menu. The items with a triangle beside them are sub-menus that can be accessed by highlighting the item and pressing
Table 5-2 describes all sub-menus found in the ADVANCED SETUP menu.
Table 5-2. Advanced Setup Menu Options
| Sub-menu Description | |
| ►Boot Feature | See Table 5-3 for a description of BIOS setup menu options in this sub-menu. |
| ►CPU Configuration | See Table 5-4 for a description of BIOS setup menu options in this sub-menu. |
| ►Chipset Configuration | See Table 5-5 for a description of BIOS setup menu options in this sub-menu. |
| ►SATA Configuration | See Table 5-6 for a description of BIOS setup menu options in this sub-menu. |
| ►sSAT A Configuration | See Table 5-7 for a description of BIOS setup menu options in this sub-menu. |
| ►Server ME Information | See Table 5-8 for a description of BIOS setup menu options in this sub-menu. |
| ►PCIe/PCI/PnP Configuration | See Table 5-9 for a description of BIOS setup menu options in this sub-menu. |
| ►Super I/O Configuration | See Table 5-10 for a description of BIOS setup menu options in this sub-menu. |
| ►Serial Port Console Redirection | See Table 5-11 for a description of BIOS setup menu options in this sub-menu. |
| ►ACPI Settings | See Table 5-12 for a description of BIOS setup menu options in this sub-menu. |
| ►iSCSI Configuration | See Table 5-14 for a description of BIOS setup menu options in this sub-menu. |
Table 5-3. Boot Feature Sub-menu
| Menu Option Description | |
| Quiet Boot | Use this feature to select the screen display between the POST messages and the OEM logo upon bootup. Select Disabled to display the POST messages. Select Enabled to display the OEM logo instead of the normal POST messages. The options are Enabled and Disabled. |
| AddOn ROM Display Mode | Use this feature to set the display mode for the Option ROM. Select Keep Current to display the current AddOn ROM setting. Select Force BIOS to use the Option ROM display set by the system BIOS. The options are Force BIOS and Keep Current. |
| Bootup NUM-Lock | Use this feature to set the Power-on state for thekey. The options are Off and On. |
| Wait for 'F1' If Error | Use this feature to force the system to wait until the 'F1' key is pressed if an error occurs. The options are Disabled and Enabled. |
| Interrupt 19 Capture | Interrupt 19 is the software interrupt that handles the boot disk function. When this item is set to Enabled, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup and allow the drives that are attached to these host adaptors to function as bootable disks. If this item is set to Disabled, the ROM BIOS of the host adaptors will not capture Interrupt 19, and the drives attached to these adaptors will not function as bootable devices. The options are Immediate and Postponed. |
| Re-try Boot | This feature allows you to set Re-try Boot options to either Disabled, Legacy Boot or EFI Boot. |
| Watch Dog Function | If enabled, the Watch Dog Timer will allow the system to reboot when it is inactive for more than 5 minutes. The options are Enabled and Disabled. |
| Power Button Function | This feature controls how the system shuts down when the power button is pressed. Select 4_Seconds_Override for the user to power off the system after pressing and holding the power button for 4 seconds or longer. Select Instant Off to instantly power off the system as soon as the user presses the power button. The options are 4 Seconds Override and Instant Off. |
| Restore on AC Power Loss | Use this feature to set the power state after a power outage. Select Stay-Off for the system power to remain off after a power loss. Select Power-On for the system power to be turned on after a power loss. Select Last State to allow the system to resume its last power state before a power loss. The options are Power-On, Stay-Off and Last State. |
Table 5-4. CPU Configuration Sub-menu
| Menu Option Description | |
| Processor Information | Static processor information is displayed at the top of the menu for Processor ID, Processor Frequency, Microcode Revision, L1 Cache RAM, L2 Cache RAM and Processor Version. |
| Clock Spread Spectrum | If this feature is set to Enabled, the BIOS utility will monitor the level of Electromagnetic Interference caused by the components and will attempt to reduce the interference whenever needed. The options are Enabled and Disabled. |
| Hyper-Threading (ALL) | This feature enables Hyper Threading (software method to enable/disable logical processor threads). Options include Enable or Disable. |
| Menu Option Description | |
| Core's Enabled | Use this setting to specify the number of cores to enable. Use the number pad “+” or “-” keys to specify a number up to 12. The number 0 means all cores with 12 cores available. |
| Execute Disable Bit | Set to Enabled to enable the Execute Disable Bit which will allow the processor to designate areas in the system memory where an application code can execute and where it cannot, thus preventing a worm or a virus from flooding illegal codes to overwhelm the processor and damage the system during an attack. The default is Enable. (Refer to Intel and Microsoft Web Sites for more information.) |
| PPIN Control | This setting is used to unlock and enable or disable PPIN control for your system. Options include Unlock/Enable or Unlock/Disable. |
| Hardware Prefetcher | This setting lets you Enable or Disable the Hardware Prefetcher to prefetch streams of data and instructions from the main memory to the L1 cache in order to improve CPU performance. |
| Adjacent Cache Prefetch | This setting lets you Enable or Disable the use of the Adjacent Prefetch to prefetch streams of data and instructions from the main memory to the L1 cache in order to improve CPU performance. |
| DCU Streamer Prefetcher | This setting lets you Enable or Disable the DCU Streamer Prefetcher to prefetch streams of data and instructions from the main memory to the L1 cache in order to improve CPU performance. |
| DCU IP Prefetcher | This setting lets you Enable or Disable the DCU IP Prefetcher to prefetch streams of data and instructions from the main memory to the L1 cache in order to improve CPU performance. |
| Direct Cache Access (DCA) | This setting enables direct cache access for your system. Options include Auto, Enable or Disable. |
| X2APIC | Use this setting to enable/disable extended APIC support for your system. Options include Disable or Enable. |
| AES-NI | This setting Enables or Disables AES-NI support for your system. |
| Intel Virtualization Technology | This setting Enables or Disables Vanderpool technology for your system and takes effect only after a reboot. |
Table 5-5. Chipset Configuration Sub-menu
| Menu Option Description | |
| ►North Bridge Configuration | This sub-menu configures North Bridge features and shows configuration information. |
| ►IIO Configuration | Use this sub-menu to set IIO configuration features and options. |
| EV DFX Features | Set this option to allow DFX Lock Bits to remain clear. Options include Enable and Disable. |
| ►IIO0 Configuration | Use this sub-menu to set IIO0 configuration features and options. |
| IOU2(IIO PCIe Port 1) | This setting selects PCIe port bifurcation for selected slot(s). Options include x4x4, x8 and Auto. |
| IOU0(IIO PCIe Port 2) | This setting selects PCIe port bifurcation for selected slot(s). Options include x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16 and Auto. |
| IOU1(IIO PCIe Port 3) | This setting selects PCIe port bifurcation for selected slot(s). Options include x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16 and Auto. |
| No PCIe Port Active ECO | This setting is used for workaround settings when no PCIe port is active. Options include PCU Squelch exit ignore option and Reset the SQ FLOP by CSR option. |
| ►Socket 0PCIeD00F0 -Port 0/DMI | Use this sub-menu for settings related to PCI Express Ports |
| Link Speed | Link Speed is specified as either Auto, Gen 1 (2.5 GT/s) or Gen 2 (5 GT/s). |
| PCI-E Port DeEmphasis | This setting specifies De-Emphasis control (LNKCON2 [6]) for this PCIe port. Options include -6.0 dB or -3.5 dB. |
| PCI-E Information | Information for the PCI-E Port Link for Status, Max and Speed is shown here. |
| PCI-E Port L0s Exit Latency | This setting specifies the length of time this port requires to complete transition from L0s to L0. Only the 4us - 8us option is available. |
| PCI-E Port L1s Exit Latency | This setting specifies the length of time this port requires to complete transition from L1 to L0. Options include settings from <1us all the way to >64us with 8us - 16us the default. |
| Fatal Err Over | Use this setting to Enable or Disable forcing fatal error propagation to the IIO core error logic for this port. |
| Non-Fatal Err Over | Use this setting to Enable or Disable forcing non-fatal error propagation to the IIO core error logic for this port. |
| Corr Err Over | Use this setting to Enable or Disable forcing correctable error propagation to the IIO core error logic for this port. |
| L0s Support | When Disabled, IIO never puts its transmitter in L0s state. |
| ►IIO1 Configuration | Use this sub-menu to set IIO1 configuration features and options. |
| IOU2 (IIO PCIe Port 1)Menu Option Description | This setting selects PCIe port bifurcation for selected slot(s). Options include x4x4, x8 or Auto. |
| IOU0 (IIO PCIe Port 2) | This setting selects PCIe port bifurcation for selected slot(s). Options include x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16 and Auto. |
| IOU1 (IIO PCIe Port 3) | This setting selects PCIe port bifurcation for selected slot(s). Options include x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16 and Auto. |
| No PCIe Port Active ECO | This setting is used for workaround settings when no PCIe port is active. Options include PCU Squelch exit ignore option and Reset the SQ FLOP by CSR option. |
| ►IOAT Configuration | Use this sub-menu to set IOAT configuration features and options. |
| Enable the IOAT | Use this setting to Enable or Disable IOAT devices. |
| No Snoop | Use this setting to Enable or Disable No Snoop for each CB device. |
| Relaxed Ordering | Use this setting to Enable or Disable Relaxed Ordering. |
| ►Intel VT for Directed I/O (VT-d) | Use this sub-menu to set Intel VT for Directed I/O configuration features and options. |
| Intel VT for Directed I/O (VT-d) | This setting Enables or Disables Intel Virtualization Technology for Directed I/O (VT-d) by reporting the I/O device assignment to VMM through DMAR ACPI tables. |
| Interrupt Remapping | This setting Enables or Disables VT-d interrupt remapping support. |
| ►QPI Configuration Use | this sub-menu to set QPI configuration features and options. |
| ►QPI General Configuration | Use this sub-menu to display and provide options to change the QPI General Settings. |
| ►QPI Status This | sub-menu leads QPI Status information. |
| Link Frequency Select | This setting allows for selecting the QPI Link Frequency. Option include 6.4GB/s, 8.0GB/s, 9.6GB/s, Auto and Auto Limited. |
| Link L0p Enable | Use this setting to Enable or Disable the Link L0p setting. |
| Link L1 Enable | Use this setting to Enable or Disable the Link L1 setting. |
| COD Enable | Use this setting to Enable or Disable the Cluster on Die setting. |
| Early Snoop | Use this setting to set the Early Snoop setting. Options include Disable, Enable and Auto. |
| Isoc Mode | Use this setting to Enable or Disable Isoc Mode. |
| ►Memory Configuration | Use this sub-menu to set Memory Configuration features and options. |
| Enforce PDR | This setting Enables or Disables the system's ability to enforce POR restrictions for DDR4 frequency and voltage programming. |
| Memory Frequency | This setting selects the memory frequency in Mhz. Options include Auto, and speed 1333 through 3200. Do not select Reserved. |
| Data Scrambling | This setting Enables or Disables data scrambling. Options include Auto, Disabled and Enabled. |
| Menu Option Description | |
| DRAM RAPL Baseline | Use this setting to set the DRAM RAPL Baseline mode. Options include Disabled, DRAM RAPL Mode 0 and DRAM RAPL Mode 1. |
| Set Throttling Mode | Use this setting to configure Thermal Throttling mode. Options include Disabled and CLTT. |
| Socket Interleave Below 4GB | This setting splits the 0-4GB address space between two sockets, so that both sockets get a chunk of local memory below 4GB. Options include Enable and Disable. |
| A7 Mode | Use this setting to Enable or Disable A7 Mode in your system. |
| ►DIMM Information | This sub-menu displays memory topology with DIMM population information when selected. |
| ►Memory RAS Configuration | This sub-menu displays and provides options to change the memory RAS settings. |
| RAS Mode | Use this setting to Enable or Disable RAS Mode. |
| Memory Rank Sparing | This setting allows you to Enable or Disable Memory Rank Sparking. |
| Patrol Scrub | Use this setting to Enable or Disable Patrol Scrub. |
| Patrol Scrub Interval | This setting allows you to select the number of hours (1-24) required to complete a full scrub. A value of zero (0) means auto. The number is determined by pressing the “+” or “-” keys on your keyboard's number pad. |
| Demand Scrub | This setting Enables or Disables the Demand Scrub. |
| Device Tagging | Use this setting to Enable or Disable Device Tagging. |
| ►South Bridge Configuration | This sub-menu static displays PCH Information (chipset Name, Stepping and USB Devices), and allows you to configure other South Bridge features. |
| USB Configuration Information | This static display shows information regarding the USB Version and the system's USB Devices. |
| Legacy USB Support | This setting allows you to enable the use of Legacy USB devices. If this option is set to Auto, legacy USB support will be automatically disabled if no USB device is connected. The Disable option will keep USB devices available only for EFI applications. Options include Auto, Disabled and Enabled. |
| XHCI Hand-off | This item is a work-around solution for operating systems that do not support XHCI (Extensible Host Controller Interface) hand-off. The XHCI ownership change should be claimed by the XHCI driver. The options are Enabled and Disabled. |
| EHCI Hand-off | This item is for the Operating Systems that do not support Enhanced Host Controller Interface (EHCI) hand-off. When this item is enabled, EHCI ownership change will be claimed by the EHCI driver. The settings are Enabled and Disabled. |
| Port 60/64 Emulation | This feature enables or disables I/O port 60h/64h emulation support. This feature should be enabled for complete USB keyboard legacy support for operating systems that cannot detect the presence of USB devices. Options include Enabled or Disabled. |
| USB3.0 Support | This setting enables or disables USB 3.0 (XHCI) controller support. Options include Smart Auto, Auto, Enabled or Disabled. |
| EHCI1 | This setting controls the USB EHCI (USB 2.0) functions. One EHCI controller must always be enabled. Options include Enabled or Disabled. |
| EHCI2 | This setting controls the USB EHCI (USB 2.0) functions. One EHCI controller must always be enabled. Options include Enabled or Disabled. |
Table 5-6. SATA Configuration Sub-menu
| Menu Option Description | |
| SATA Controller | This setting allows you to Enable or Disable the SATA device. |
| Configure SATA as | Use this setting to select the SATA mode you desire. Options include IDE, AHCI and RAID. |
| Support Aggressive Link Power Mana | Use this setting to Enable or Disable SALP. |
| SATA Port 0~5 Settings | For each of the ports you many configure the settings listed below. |
| Spin Up Device | This setting allows you to Enable or Disable the Spin up Device for the system. If enabled for any ports staggered spin up will be performed and only the drives that have this option enabled will spin up at boot. Otherwise all drives spin up at boot if this setting is disabled. |
| SATA Device Type | This setting allows you to identify that the SATA port is connected to either a Solid State Drive or a Hard Disk Drive. |
Table 5-7. sSATA Configuration Sub-menu
| Menu Option Description | |
| sSATA Controller | This setting allows you to Enable or Disable the SATA controller. |
| Configure sSATA as | Use this setting to select the SATA mode you desire. Options include IDE, AHCI and RAID. |
| Support Aggressive Link Power Mana | Use this setting to Enable or Disable SALP. |
| sSATA Port 0~3 Settings | For each of the ports you many configure the settings listed below. |
| Spin Up Device | This setting allows you to Enable or Disable the Spin up Device for the system. If enabled for any ports staggered spin up will be performed and only the drives that have this option enabled will spin up at boot. Otherwise all drives spin up at boot if this setting is disabled. |
| SATA Device Type | This setting allows you to identify that the SATA port is connected to either a Solid State Drive or a Hard Disk Drive. |
Table 5-8. Server ME Configuration Sub-menu
| Menu Option Description | |
| General ME Configuration Information | General ME configuration information is displayed at the top of this screen. |
| Altitude | The altitude of the platform location above sea level, expressed in meters, is set using the keyboard's number pad “+” or “-” keys. Use the default 80000000 value if the altitude is unknown. |
| MCTP Bus Owner | This setting is for specifying the MCTP bus owner location on PCIe. Values can be [15:8] bus, [7:3] device or [2:0] function. If 0, then the sending bus owner is disabled. |
Table 5-9. PCIe/PCI/PnP Configuration Sub-menu
| Menu Option Description | |
| PCI Latency Timer | Use this feature to set the latency Timer of each PCI device installed on a PCI bus. Select 32 to set the PCI latency to 32 PCI clock cycles. The options are 32 PCI Bus Clocks, 64 PCI Bus Clocks, 96 PCI Bus Clocks, 128 PCI Bus Clocks, 160 PCI Bus Clocks, 192 PCI Bus Clocks, 224 PCI Bus Clocks and 248 PCI Bus Clocks. |
| PERR# Generation | Select Enabled to allow a PCI device to generate a PERR number for a PCI Bus Signal Error Event. The options are Disabled and Enabled. |
| SERR# Generation | Select Enabled to allow a PCI device to generate an SERR number for a PCI Bus Signal Error Event. The options are Enabled and Disabled. |
| PCI PERR/SERR Support | This setting Enables or Disables the runtime event for SERR/PERR errors. |
| Above 4G Decoding (Available if the system supports 64-bit PCI decoding) | Select Enabled to decode a 64-bit PCI device in the space above 4G Address. The options are Enabled and Disabled. |
| SR-IOV Support | If the system has SR-10V capable PCIe device, this option Enables or Disables single root I/O virtualization support. |
| Maximum Payload | Select Auto to allow the system BIOS to automatically set the maximum payload value for a PCI-E device to enhance system performance. The options are Auto, 128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes. |
| Maximum Read Request | Select Auto to allow the system BIOS to automatically set the maximum Read Request size for a PCI-E device to enhance system performance. The options are Auto, 128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes. |
| ASPM Support | This feature allows the user to set the Active State Power Management (ASPM) level for a PCI-E device. Select Force L0 to force all PCI-E links to operate at L0 state. Select Auto to allow the system BIOS to automatically set the ASPM level for the system. Select Disabled to disable ASPM support. The options are Disabled, Force L0, and Auto. Enabling ASPM support may cause some PCI-E devices to fail! |
| MMIOHBase | This setting must specify a number between 4032 - 4078. Options include 56T, 48T, 24T, 2T, 512G and 256G. |
| MMIO High Size | This setting allocates MMIOH size per CPU. Options include 256G, 128G, 512G and 1024G. |
| CPU1 Slot 1 PCI-E OPROM | This setting enables or disables the PCIe Slot OPROM option. Options include Disabled, Legacy or EFI. |
| Onboard Video OPROM | Use this setting to control the execution of UEFI and Legacy Video OPROM on your system. Options include Disabled, Legacy or EFI. |
| VGA Priority | This setting decides the priority between Onboard and the first Offboard video device found. |
| Onboard LAN Option ROM Type | Select the onboard LAN option ROM type from this setting. Options include Legacy and EFI. |
| Onboard LAN 1 OPROM | This setting enables or disables Onboard LAN 1 Option ROM. Options include PXE, iSCSI or Disabled. |
| Onboard LAN 2 OPROM | This setting enables or disables Onboard LAN 2 Option ROM. Options include PXE or Disabled. |
| Network Stack | This setting Enables or Disables the UEFI Network Stack. |
Table 5-10. SuperIO Device Configuration Sub-menu
| Menu Option Description | |
| Super IO Chip | This static display shows the name of the Super IO chip installed for your system. |
| ▶Serial Port 1/2Configuration | This sub-menu allows the user the configure settings of Serial Port 1 or Serial Port 2. |
| Serial Port | Select Enabled to enable the a selected onboard serial port. The options areEnabledand Disabled. |
| Device Settings | This item displays the status of a serial part specified by the user. |
| Change Settings | This feature specifies the base I/O port address and the Interrupt Request address of a serial port specified by the user. Select Auto to allow the BIOS to automatically assign the base I/O and IRQ address.The options for Serial Port 1 areAuto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12) and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).The options for Serial Port 2 areAuto, (IO=2F8h; IRQ=3), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), (IO=3E8h; IRQ=3, 4, 5, 6. 7, 9, 10, 11, 12) and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12). |
| Device Mode | Use this feature to set the optimal setting for a super I/O device. The options are24MHz/13and 24MHz. |
| Serial Port 2 Attribute(Available for Serial Port 2 only) | This feature specifies the attribute of Serial Port 1. The options areSOLand COM. |
Table 5-11. Serial Port Console Redirection Sub-menu
| Menu Option Description | |
| COM1 Console Redirection, COM2/SOL/Legacy Console Redirection Sub-menus | |
| Console Redirection | Select Enabled to enable console redirection support for a serial port specified by the user. The options are Enabled and Disabled. |
| ►Console Redirection Settings | This feature allows the user to specify how the host computer will exchange data with the client computer, which is the remote computer used by the user. |
| Terminal Type | This feature allows the user to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8. |
| Bits Per second | Use this feature to set the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 38400, 57600 and 115200 (bits per second). |
| Data Bits | Use this feature to set the data transmission size for Console Redirection. The options are 7 Bits and 8 Bits. |
| Parity | A parity bit can be sent along with regular data bits to detect data transmission errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you do not want to send a parity bit with your data bits in transmission. Select Mark to add a mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space. |
| Stop Bits | A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2. |
| Flow Control | Use this feature to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a "Stop" signal to stop sending data when the receiving buffer is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None and Hardware RTS/CTS. |
| VT-UTF8 Combo Key Support | Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals. The options are Enabled and Disabled. |
| Recorder Mode | Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server. The options are Disabled and Enabled. |
| Resolution 100x31 | Select Enabled for extended-terminal resolution support. The options are Disabled and Enabled. |
| Legacy OS Redirection Resolution | Use this feature to select the number of rows and columns used in Console Redirection for legacy OS support. The options are 80x24 and 80x25. |
| Menu Option DescriptionPutty KeyPad | This feature selects the settings for Function Keys and KeyPad used for Putty, which is a terminal emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SC0, ESCN, and VT400. |
| Redirection After BIOS Post | Use this feature to enable or disable legacy console redirection after BIOS POST. When set to Bootloader, legacy console redirection is disabled before booting the OS. When set to Always Enable, legacy console redirection remains enabled when booting the OS. The options are Always Enable and Bootloader. |
| Legacy Serial Redirection Port (for Legacy Console Redirection only) | Use this setting to select a COM port to display redirection of Legacy OS and Legacy OPROM messages. Options include COM1 Console Redirection or COM2/SOL Console Redirection. |
| Serial Port for Out-of-Band Management/Windows Emergency Management Services (EMS) | |
| Console Redirection (for EMS) | Select Enabled to use a COM Port selected by the user for Console Redirection. The options are Enabled and Disabled. |
| ►Console Redirection Settings (for EMS) | This feature allows the user to specify how the host computer will exchange data with the client computer, which is the remote computer used by the user. |
| Out-of-Band Management Port | The feature selects a serial port used by the Microsoft Windows Emergency Management Services (EMS) to communicate with a remote server. The options are COM1 Console Redirection and COM2/SOL Console Redirection. |
| Terminal Type | This feature allows the user to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII character set. Select VT100+ to add color and function key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8. |
| Bits Per Second | This item sets the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 57600, and 115200 (bits per second). |
| Flow Control | This feature allows the user to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a "Stop" signal to stop sending data when the receiving buffer is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None, Hardware RTS/CTS, and Software Xon/Xoff. |
| Data Bits, Parity, Stop Bits | The status of each item above is displayed. |
Table 5-12. ACPI Settings Sub-menu
| Menu Option Description | |
| WHEA Support | This feature Enables the Windows Hardware Error Architecture (WHEA) support for the Windows 2008 (or a later vision) operating system. The options are Enabled and Disabled. |
| High Precision Event Timer | Select Enabled to activate the High Performance Event Timer (HPET) that produces periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing multimedia streams, providing smooth playback and reducing the dependency on other timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU. The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer. The options are Enabled and Disabled. |
| NUMA Use this setting | to Enable or Disable NUMA. |
| PCI AER Support | This setting allows you to Enable or Disable PCI AER Support. |
Table 5-13. Trusted Computer Sub-menu
| Menu Option Description | |
| Security Device Support | This settingEnablesor Disables BIOS support for a security device. The OS will not show the security device if enabled. TCG EFI protocol and INT1A interface will not be available. |
| TPM State | This settingEnablesor Disables a security device.NOTE:Your computer will reboot during restart in order to change the state of the device. |
| Pending Operation | This setting schedules an operation for the security device. Options include Noneand TPM Clear.NOTE:Your computer will reboot during restart in order to change the state of the device. |
| Current Status Information | Static information about TPM Enabled Status, TPM Active Status and TPM Owner Status are displayed in this location. |
| TXT Support | This setting Enables orDisables TXT support. |
Table 5-14. iSCSI Configuration Sub-menu
| Menu Option Description | |
| iSCSI Initiator Name | Use this setting to enter a unique name of the iSCSI Initiator. Only IQN format is accepted. Range is from 4 to 223. |
5-6 Event Logs Setup
Table 5-15. Event Logs Menu
| Menu Option Description | |
| ►Change SMBIOS Event Log Settings | This sub-menu allows you to change the SMBIOS Event Log configuration settings. |
| SMBIOS Event Log | Change this setting to enable or disable all features of the SMBIOS Event Logging during system boot. The options are Enabled and Disabled. |
| Runtime Error Logging Support | This setting Enables or Disables Runtime Error Logging Support. |
| Memory Corrected Error Enabling | This setting Enables or Disables Corrected Memory Error Logging. |
| PCI-Ex Error Enable | This setting Enables or Disables PCI-Ex Error Logging. |
| Memory Corr. Error Threshold | Use this setting to set the Corrected Memory Error Logging Threshold using the keyboard's "+" or "-" keys. Default is 10. |
| Erase Event Log | If No is selected, data stored in the event log will not be erased. Select Yes, Next Reset, data in the event log will be erased upon next system reboot. Select Yes, Every Reset, data in the event log will be erased upon every system reboot. The options are No, Yes, Next reset, and Yes, Every reset. |
| When Log is Full | Select Erase Immediately for all messages to be automatically erased from the event log when the event log memory is full. The options are Do Nothing and Erase Immediately. |
| Log System Boot Event | This option toggles the System Boot Event logging to enabled or disabled. The options are Disabled and Enabled. |
| MECI | The Multiple Event Count Increment (MECI) counter counts the number of occurrences that a duplicate event must happen before the MECI counter is incremented. This is a numeric value. The default value is 1. |
| METW | The Multiple Event Time Window (METW) defines number of minutes must pass between duplicate log events before MECI is incremented. This is in minutes, from 0 to 99. The default value is 60. |
| ►View SMBIOS Event Log | This section displays the contents of the SMBIOS Event Log. It provides a date, time, error code and severity with a brief description of each event. |
5-7 IPMI Setup
Table 5-16. IPMI Menu
| Menu Option Description | |
| IPMI Information This item indicates the IPMI firmware revision used in your system. | |
| ►System Event Log | Use this sub-menu to configure the System Event Log.NOTE: All values changed here in this sub-menu do not take effect until the computer is restarted. |
| SEL Components | Use this setting to Enable or Disable all features of the System Event Logging during boot. |
| Erase SEL | Use this setting to choose options for erasing SEL. Options include No, Yes on Next Reset and Yes on Every Reset |
| When SEL is Full | Use this setting to choose what reactions to use when SEL is full. Options include Do Nothing and Erase Immediately. |
| Log EFI Status Codes | Use this setting to disable the logging of EFI Status Codes or log only error codes or other progress codes or both. Options include Disabled, Both, Error Code and Progress Code. |
| ►BMC Network Configuration | Use this sub-menu to configure BMC network parameters. |
| Update IPMI LAN Configuration | This setting updates the IPMI LAN Configuration. BIOS will be set to the other settings specified and changed in this screen to the IPMI on the next boot. Options include No or Yes. |
| Configuration Address Source | This feature allows the user to select the source of the IP address for this computer. If Static is selected, you will need to know the IP address of this computer and enter it to the system manually in the field. If DHCP is selected, the BIOS will search for a DHCP (Dynamic Host Configuration Protocol) server in the network that is attached to and request the next available IP address for this computer. Options include Static or DHCP. The following items are assigned IP addresses automatically if DHCP is selected. |
| Station IP Address | This item displays the Station IP address for this computer. This should be in decimal and in dotted quad form (i.e., 192.168.10.253). |
| Subnet Mask | This item displays the sub-network that this computer belongs to. The value of each three-digit number separated by dots should not exceed 255. |
| Station MAC Address | This item displays the Station MAC address for this computer. Mac addresses are 6 two-digit hexadecimal numbers. |
| Router IP Address | This item displays the Router IP address for this computer. This should be in decimal and in dotted quad form (i.e., 192.168.10.253). |
| Router MAC Address | This item displays the Router MAC address for this computer. Mac addresses are 6 two-digit hexadecimal numbers. |
5-8 Security
Choose Security from the BIOS Setup main menu with the arrow keys to bring up the SECURITY SETUP menu. Security setting options are displayed by highlighting the setting using the arrow keys and pressing
Table 5-17. Security Menu Options
| Menu Option Description | |
| Administrator Password | This allows you to create an administrator password for the system. |
| User Password | Use this feature to set a User Password which is required to log into the system and to enter the BIOS setup utility. The length of the password should be from 3 characters to 20 characters long. |
5-9 Boot
Choose Boot from the 128 MB SPI Flash EEPROM with AMI® BIOS BIOS Setup Utility main menu with the arrow keys to bring up the BOOT SETUP menu. Security setting options are displayed by highlighting the setting using the arrow keys and pressing
Table 5-18. Boot Setup Menu Options
| Menu Option Description | |
| Boot PriorityOption 1 ~ 15 | This feature allows you to specify the sequence of priority for the boot device (such as hard disk drives, USB devices, CD-ROM drives, Network drives and so on). The menu options are for 1st Boot Device, 2nd Boot Device and 3rd Boot device. Each numbered boot device can be set to a specific device installed in your system or to Disabled.NOTE:A device enclosed in parenthesis has been disabled in the corresponding type menu. |
| ►Delete Boot Option | This sub-menu allows you to remove an EFI boot option form the boot order. |
| ►Delete Driver Option | This sub-menu allows you to remove an EFI driver option form the boot order. |
| ►Hard Drive BBS Priorities | This sub-menu allows you to set the order of the legacy devices in this group for setting the boot order. |
| ►Network Device BBS Priorities | This sub-menu allows you to set the order of the legacy devices in this group for setting the boot order. |
| ►UEFI Application Boot Priorities | This sub-menu specifies the boot device priority sequence from the available UEFI application. |
5-10 Save & Exit
Choose SAVE & EXIT from the 128 MB SPI Flash EEPROM with AMI® BIOS BIOS Setup Utility main menu with the arrow keys to display the SAVE & EXIT SETUP menu. All Exit BIOS settings are described in Table 5-19 below.
Table 5-19. Exit Menu Options
| Menu Option Description | |
| Discard Changes and Exit | Highlight this item and hitto exit the BIOS Setup utility without saving any changes you may have made. Any changes you have made to the BIOS Setup will not take effect upon system bootup. |
| Save Changes and Reset | Highlight this item and hitto save any changes you made and to exit the BIOS Setup utility. The system will reboot and implement the changes you have made to the BIOS Setup. |
| Save Changes | Highlight this item and hitto save changes done so far to any of the setup options. |
| Discard Changes | Highlight this item and hitto discard (cancel) any changes you made. You will remain in the Setup utility. |
| Restore Optimized Defaults | Highlight this item and hitto load the default settings for all items in the BIOS Setup. These are the safest settings to use and are designed for maximum system performance, but may not work best for all computer applications. |
| Save as Users Defaults | Highlight this item and hitto save changes done so far as user defaults. |
| Restore User Defaults | Highlight this item and hitto restore the user defaults to all the setup options. |
| Boot Override | For each boot device you have the option of saving the configuration for it and exiting. |
Appendix A AMI UEFI BIOS POST Codes
A status code is a data value used to indicate progress during the boot phase. A subset of these status codes, known commonly as checkpoints, indicate common phases of the BIOS boot process.
Checkpoints are typically output to I/O port 80h, but Aptio 4.x core can be configured to send status codes to a variety of sources. Aptio 4.x core outputs checkpoints throughout the boot process to indicate the task the system is currently executing. Checkpoints are very useful in aiding software developers or technicians in debugging problems that occur during the pre-boot process.
A-1 Checkpoint Ranges
Table A-1. Checkpoint Ranges
| Status Code Range Description | |
| 0x01 – 0x0B SEC execution | |
| 0x0C – 0x0F SEC errors | |
| 0x10 – 0x2F PEI execution up to and including memory detection | |
| 0x30 – 0x4F PEI execution after memory detection | |
| 0x50 – 0x5F PEI errors | |
| 0x60 – 0x8F DXE execution up to BDS | |
| 0x90 – 0xFC BDS execution | |
| 0xD0 – 0xDF DXE errors | |
| 0xE0 – 0xE8 S3 Resume (PEI) | |
| 0xE9 – 0xEF S3 Resume errors (PEI) | |
| 0xF0 – 0xF8 Recovery (PEI) | |
| 0xF9 – 0xFF Recovery errors (PEI) | |
A-2 Standard Checkpoints
Table A-2. SEC Phase
| Codes Description | |
| Status Code | |
| 0x00 Not Used | |
| Progress Codes | |
| 0x01 Power on. Reset type detection (soft/hard). | |
| 0x02 AP initialization before microcode loading | |
| 0x03 North Bridge initialization before microcode loading | |
| 0x04 South Bridge initialization before microcode loading | |
| 0x05 OEM initialization before microcode loading | |
| 0x06 Microcode loading | |
| 0x07 AP initialization after microcode loading | |
| 0x08 North Bridge initialization after microcode loading | |
| 0x09 South Bridge initialization after microcode loading | |
| 0x0A OEM initialization after microcode loading | |
| 0x0B | Cache initialization |
| 0x0C – 0x0D Reserved for future AMI SEC error codes | |
| 0x0E Microcode not found | |
| 0x0F Microcode not loaded | |
Table A-3. PEI Phase
| Status Codes Description | |
| Progress Codes | |
| 0x10 PEI Core is started | |
| 0x11 Pre-memory CPU initialization is started | |
| 0x12 Pre-memory CPU initialization (CPU module specific) | |
| 0x13 Pre-memory CPU initialization (CPU module specific) | |
| 0x14 Pre-memory CPU initialization (CPU module specific) | |
| 0x15 Pre-memory North Bridge initialization is started | |
| 0x16 Pre-Memory North Bridge initialization (North Bridge module specific) | |
| 0x17 | Pre-Memory North Bridge initialization (North Bridge module specific) |
| 0x18 Pre-Memory North Bridge initialization (North Bridge module specific) | |
Table A-3. PEI Phase
| Status Codes Description | |
| 0x19 Pre-memory South Bridge initialization is started | |
| 0x1A Pre-memory South Bridge initialization (South Bridge module specific) | |
| 0x1B Pre-memory South Bridge initialization (South Bridge module specific) | |
| 0x1C Pre-memory South Bridge initialization (South Bridge module specific) | |
| 0x1D - 0x2A OEM pre-memory initialization codes | |
| 0x2B Memory initialization. Serial Presence Detect (SPD) data reading | |
| 0x2C Memory initialization. Memory presence detection | |
| 0x2D Memory initialization. Programming memory timing information | |
| 0x2E Memory initialization. Configuring memory | |
| 0x2F | Memory initialization (other). |
| 0x30 Reserved for ASL (see ASL Status Codes section below) | |
| 0x31 | Memory Installed |
| 0x32 CPU post-memory initialization is started | |
| 0x33 CPU post-memory initialization. Cache initialization | |
| 0x34 | CPU post-memory initialization. Application Processor(s) (AP) initialization |
| 0x35 CPU post-memory initialization. Boot Strap Processor (BSP) selection | |
| 0x36 | CPU post-memory initialization. System Management Mode (SMM) initialization |
| 0x37 Post-Memory North Bridge initialization is started | |
| 0x38 | Post-Memory North Bridge initialization (North Bridge module specific) |
| 0x39 Post-Memory North Bridge initialization (North Bridge module specific) | |
| 0x3A | Post-Memory North Bridge initialization (North Bridge module specific) |
| 0x3B Post-Memory South Bridge initialization is started | |
| 0x3C | Post-Memory South Bridge initialization (South Bridge module specific) |
| 0x3D Post-Memory South Bridge initialization (South Bridge module specific) | |
| 0x3E | Post-Memory South Bridge initialization (South Bridge module specific) |
| 0x3F-0x4E OEM post memory initialization codes | |
| 0x4F DXE IPL is started | |
| PEI Error Codes | |
| 0x50 | Memory initialization error. Invalid memory type or incompatible memory speed |
| 0x51 Memory initialization error. SPD reading has failed | |
| 0x52 | Memory initialization error. Invalid memory size or memory modules do not match. |
Table A-3. PEI Phase
| Status Codes Description | |
| 0x53 Memory initialization error. No usable memory detected | |
| 0x54 Unspecified memory initialization error. | |
| 0x55 Memory not installed | |
| 0x56 Invalid CPU type or Speed | |
| 0x57 | CPU mismatch |
| 0x58 CPU self test failed or possible CPU cache error | |
| 0x59 CPU micro-code is not found or micro-code update is failed | |
| 0x5A Internal CPU error | |
| 0x5B reset PPI is not available | |
| 0x5C-0x5F Reserved for future AMI error codes | |
| S3 Resume Progress Codes | |
| 0xE0 S3 Resume is stared (S3 Resume PPI is called by the DXE IPL) | |
| 0xE1 S3 Boot Script execution | |
| 0xE2 Video repost | |
| 0xE3 OS S3 wake vector call | |
| 0xE4-0xE7 Reserved for future AMI progress codes | |
| S3 Resume Error Codes | |
| 0xE8 S3 Resume Failed | |
| 0xE9 S3 Resume PPI not Found | |
| 0xEA S3 Resume Boot Script Error | |
| 0xEB S3 OS Wake Error | |
| 0xEC-0xEF Reserved for future AMI error codes | |
| Recovery Progress Codes | |
| 0xF0 Recovery condition triggered by firmware (Auto recovery) | |
| 0xF1 Recovery condition triggered by user (Forced recovery) | |
| 0xF2 Recovery process started | |
| 0xF3 Recovery firmware image is found | |
| 0xF4 Recovery firmware image is loaded | |
| 0xF5-0xF7 Reserved for future AMI progress codes | |
| Recovery Error Codes | |
| 0xF8 Recovery PPI is not available | |
| 0xF9 Recovery capsule is not found | |
Table A-3. PEI Phase
| Status Codes Description |
| 0xFA Invalid recovery capsule |
| 0xFB – 0xFF Reserved for future AMI error codes |
Table A-4. PEI Beep Codes
| # of Beeps Description | |
| 1 Memory not Installed | |
| 1 | Memory was installed twice (InstallPeiMemory routine in PEI Core called twice) |
| 2 Recovery started | |
| 3 DXEIPL was not found | |
| 3 DXE Core Firmware Volume | was not found |
| 4 | Recovery failed |
| 4 S3 Resume failed | |
| 7 Reset PPI is not available |
Table A-5. DXE Phase
| Status Codes Description | |
| 0x60 DXE Core is started | |
| 0x61 | NVRAM initialization |
| 0x62 Installation of the South Bridge Runtime Services | |
| 0x63 CPU DXE initialization is started | |
| 0x64 CPU DXE initialization (CPU module specific) | |
| 0x65 CPU DXE initialization (CPU module specific) | |
| 0x66 CPU DXE initialization (CPU module specific) | |
| 0x67 CPU DXE initialization (CPU module specific) | |
| 0x68 PCI host bridge initialization | |
| 0x69 North Bridge DXE initialization is started | |
| 0x6A North Bridge DXE SMM initialization is started | |
| 0x6B North Bridge DXE initialization (North Bridge module specific) | |
| 0x6C | North Bridge DXE initialization (North Bridge module specific) |
| 0x6D North Bridge DXE initialization (North Bridge module specific) | |
| 0x6E | North Bridge DXE initialization (North Bridge module specific) |
| 0x6F North Bridge DXE initialization (North Bridge module specific) | |
Table A-5. DXE Phase
| Status Codes Description | |
| 0x70 South Bridge DXE initialization is started | |
| 0x71 South Bridge DXE SMM initialization is started | |
| 0x72 South Bridge devices initialization | |
| 0x73 South Bridge DXE Initialization (South Bridge module specific) | |
| 0x74 South Bridge DXE Initialization (South Bridge module specific) | |
| 0x75 South Bridge DXE Initialization (South Bridge module specific) | |
| 0x76 South Bridge DXE Initialization (South Bridge module specific) | |
| 0x77 South Bridge DXE Initialization (South Bridge module specific) | |
| 0x78 ACPI module initialization | |
| 0x79 CSM initialization | |
| 0x7A - 0x7F Reserved for future AMI DXE codes | |
| 0x80 - 0x8F OEM DXE initialization codes | |
| 0x90 Boot Device Selection (BDS) phase is started | |
| 0x91 Driver connecting is started | |
| 0x92 PCI Bus initialization is started | |
| 0x93 PCI Bus Hot Plug Controller Initialization | |
| 0x94 PCI Bus Enumeration | |
| 0x95 PCI Bus Request Resources | |
| 0x96 PCI Bus Assign Resources | |
| 0x97 Console Output devices connect | |
| 0x98 Console input devices connect | |
| 0x99 Super IO Initialization | |
| 0x9A USB initialization is started | |
| 0x9B USB Reset | |
| 0x9C USB Detect | |
| 0x9D USB Enable | |
| 0x9E - 0x9F Reserved for future AMI codes | |
| 0xA0 IDE initialization is started | |
| 0xA1 IDE Reset | |
| 0xA2 IDE Detect | |
| 0xA3 IDE Enable | |
| 0xA4 SCSI initialization is started |
Table A-5. DXE Phase
| Status Codes Description | |
| 0xA5 SCSI Reset | |
| 0xA6 | SCSI Detect |
| 0xA7 SCSI Enable | |
| 0xA8 Setup Verifying Password | |
| 0xA9 Start of Setup | |
| 0xAA Reserved for ASL (see ASL Status Codes section below) | |
| 0xAB Setup Input Wait | |
| 0xAC Reserved for ASL (see ASL Status Codes section below) | |
| 0xAD Ready To Boot event | |
| 0xAE Legacy Boot event | |
| 0xAF Exit Boot Services event | |
| 0xB0 Runtime Set Virtual Address MAP Begin | |
| 0xB1 Runtime Set Virtual Address MAP End | |
| 0xB2 Legacy Option ROM Initialization | |
| 0xB3 System Reset | |
| 0xB4 USB hot plug | |
| 0xB5 PCI bus hot plug | |
| 0xB6 | Clean-up of NVRAM |
| 0xB7 Configuration Reset (reset of NVRAM settings) | |
| 0xB8 - 0xBF Reserved for future AMI codes | |
| 0xC0 - 0xCF OEM BDS initialization codes | |
| DXE Error Codes | |
| 0xD0 CPU initialization error | |
| 0xD1 North Bridge initialization error | |
| 0xD2 South Bridge initialization error | |
| 0xD3 Some of the Architectural Protocols are not available | |
| 0xD4 PCI resource allocation error. Out of Resources | |
| 0xD5 No Space for Legacy Option ROM | |
| 0xD6 No Console Output Devices are found | |
| 0xD7 No Console Input Devices are found | |
| 0xD8 Invalid password | |
| 0xD9 Error loading Boot Option (LoadImage returned error) | |
Table A-5. DXE Phase
| Status Codes Description | |
| 0xDA Boot Option is failed (StartImage returned error) | |
| 0xDB Flash update is failed | |
| 0xDC Reset protocol is not available | |
Table A-6. DXE Beep Codes
| # of Beeps Description | |
| 1 Invalid password | |
| 4 Some of the Architectural | Protocols are not available |
| 5 No Console Output Devices are found | |
| 5 No Console Input Devices are found | |
| 6 Flash update is failed | |
| 7 Reset protocol is not available | |
| 8 Platform PCI resource requirements cannot be met |
Table A-7. ACPI/ASL Checkpoints
| Status Codes Description | |
| 0x01 System is entering S1 | sleep state |
| 0x02 System is entering S2 | sleep state |
| 0x03 System is entering S3 | sleep state |
| 0x04 System is entering S4 | sleep state |
| 0x05 System is entering S5 | sleep state |
| 0x10 System is waking up from the S1 sleep state | |
| 0x20 System is waking up from the S2 sleep state | |
| 0x30 System is waking up from the S3 sleep state | |
| 0x40 System is waking up from the S4 sleep state | |
| 0xAC | System has transitioned into ACPI mode. Interrupt controller is in PIC mode. |
| 0xAA | System has transitioned into ACPI mode. Interrupt controller is in APIC mode. |
A-3 OEM-Reserved Checkpoint Ranges
Table A-8. OEM-Reserved Checkpoint Ranges
| Status Codes Description | |
| 0x05 OEM SEC initialization | before microcode loading |
| 0x0A OEM SEC initialization | after microcode loading |
| 0x1D – 0x2A OEM pre-memory initialization codes | |
| 0x3F – 0x4E OEM PEI post memory initialization codes | |
| 0x80 – 0x8F OEM DXE initialization codes | |
| 0xC0 – 0xCF OEM BDS initialization codes | |
Disclaimer
The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and proceedings of any kind arising out of or related to such ultra-hazardous use or sale.
Appendix B
Specifications and Compliance
Operating Environment
Operating Temperature: 10° to 35° C (50° to 95° F)
Non-operating Temperature: -40^ to 70^ C ( -40^ to 158^ F)
Operating Relative Humidity: 8% to 90% (non-condensing)
Non-operating Relative Humidity: 5% to 95% (non-condensing)
Regulatory Compliance
FCC, ICES, CE, VCCI, RCM, NRTL, CB
Applied Directives, Standards
EMC/EMI: 2014/30/EU (EMC Directive)
FCC Part 15
ICES-003
VCCI 32-1
AS/NZS CISPR 32
EN55032
EN55035
CISPR 24
EN 61000-3-2
EN 61000-3-3
EN 61000-4-2
EN 61000-4-3
EN 61000-4-4
EN 61000-4-5
EN 61000-4-6
EN 61000-4-8
EN 61000-4-11
Green Environment:
2011/65/EU (RoHS Directive)
EC 1907/2006 (REACH)
2012/19/EU (WEEE Directive)
Product Safety: 2014/35/EU (LVD Directive)
UL/CSA 60950-1, 62368-1 (USA and Canada)
IEC/EN 60950-1, 62368-1
Perchlorate Warnings
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. "Perchlorate Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate"
General Data Center Environmental Specifications
Particulate contamination specifications
Air filtration: Data centers must be kept clean to Class 8 of ISO 14644-1 (ISO 2015). The air entering the data center should be filtered with a MERV 11 filter or better. The air within the data center should be continuously filtered with a MERV 8 filter or better.
Conductive dust: Air should be free fo conductive dust, zinc whiskers, or other conductive particles.
Corrosive dust: Air should be free of corrosive dust.
Gaseous\* contamination specifications
Copper coupon corrosion rate: <300 Å/month per class G1 as defined by ANSI. ISA71.04-2013, reference by ASHRAE TC 9.9
Silver coupon corrosion rate: <200 Å/month per class G1 as defined by ANSI. ISA71.04-2013, reference by ASHRAE TC 9.9
*If testing with silver or copper coupons results in values less than 200 Å/month or 300 Å/month, respectively, then operating up to 70% relative humidity (RH) is acceptable. If the testing shows corrosion levels exceed these limits, then catalyst-type pollutants are probably present and RH should be driven to 50% or lower.