LMC6484IM/NOPB - Amplificateur opérationnel TEXAS INSTRUMENTS - Free user manual and instructions

USER MANUAL LMC6484IM/NOPB TEXAS INSTRUMENTS

LMC6484CMOS, Quad, Rail-to-RailInputandOutput, OperationalAmplifier

1Features

• Rail-to-railinputcommon-modevoltagerange (specified over temperature)
• Rail-to-railoutputswing(within20mVofsupply rail,100-kΩ load)
•Specified3-V,5-Vand15-Vperformance
•ExcellentCMRRandPSRR:82dB
•Ultra-lowinputcurrent:20fA
•Highvoltagegain(R _L=500k ):130dB
•Specifiedfor2-kΩ and600-Ω loads

2Applications

•Dataacquisition(DAQ)
•Currencycounter
•Oscilloscope(DSO)
• Intra-DCinterconnect(METRO)
• Macroremoteradiounit(RRU)
•Multiparameterpatientmonitor
• Merchanttelecomrectifiers
• Traincontrolandmanagement
- Processanalytics(pH,gas,concentration,force, andhumidity)
•ThreephaseUPS
- ImprovedreplacementforTLC274,TLC279

3Description

TheLMC6484deviceprovidesacommon-mode rangethatextendstobothsupplyrails. Thisrail-to-rail performancecombinedwithexcellentaccuracy, due toahighCMRR, makethisdeviceuniqueamong rail-to-railinputamplifiers.

TheLMC6484isanexcellentchoiceforsystems, suchasdataacquisition,that requirealargeinput signal range. The device is also an excellent upgrade forcircuitsusinglimitedcommon-moderange amplifiers,suchastheTLC274andTLC279.

Maximum dynamic signal range is maintained in low voltage and single-supply systems by the rail-to-rail output swing of the LMC6484. The rail-to-rail output swing of the LMC6484 is specified for loads down to 600Ω.

Specifiedlowvoltagecharacteristicsandlowpower dissipationmaketheLMC6484 an excellentchoice forbattery-operatedsystems.

See the LMC6482 for a dual CMOS operational amplifierwiththesesamefeatures.

DeviceInformation (1)

PARTNUMBER	PACKAGE	BODYSIZE(NOM)
LMC6484	SOIC(14)	8.65mm×3.91mm
	PDIP(14)	19.177mm×6.35mm

(1) For all available packages, seethe package option addendum at the end of the datasheet.

Single-EndedUnityGainBuffer

+3V 0.1 μF VIN + 1/4 LMC6484 - VOUT

TableofContents

1 Features.... 1
2 Applications 1
3 Description 1
4 Revision History...... 2

5PinConfigurationandFunctions....3

6 Specifications.... 4

6.1 AbsoluteMaximumRatings....4
6.2ESDRatings....4
6.3RecommendedOperatingConditions....4
6.4ThermalInformation....4
6.5DCElectricalCharacteristicsforLMC6484AI....5
6.6DCElectricalCharacteristicsforLMC6484I....7
6.7DCElectricalCharacteristicsforLMC6484M....9
6.8DCElectricalCharacteristicsforLMC6484AI....11
6.9DCElectricalCharacteristicsforLMC6484I......11
6.10DCElectricalCharacteristicsforLMC6484M.....12
6.11ACElectricalCharacteristicsforLMC6484A....13
6.12ACElectricalCharacteristicsforLMC6484I.....13
6.13ACElectricalCharacteristicsforLMC6484M.....14
6.14ACElectricalCharacteristics:V + =3V,V - =0V.14
6.15TypicalCharacteristics....15

7DetailedDescription....23

7.1Overview....23
7.2FunctionalBlockDiagram....23
7.3FeatureDescription....23
7.4DeviceFunctionalModes....24

8ApplicationandImplementation....25

8.1 Application Information....25
8.2TypicalApplication....25
8.3SystemExamples....31

9PowerSupplyRecommendations....36

10 Layout.... 36

10.1 LayoutGuidelines....36
10.2LayoutExample....37

11DeviceandDocumentationSupport....38

11.1DeviceSupport....38
11.2DocumentationSupport....38
11.3SupportResources....38
11.4Trademarks....38
11.5ElectrostaticDischargeCaution....38
11.6Glossary....38

12Mechanical, Packaging, and Orderable Information 38

4RevisionHistory

NOTE: Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion.

ChangesfromRevisionC(September2015)toRevisionDPage

• Deleted old note 3 from DC Electrical Characteristics for LMC6484AI table 5
• Deleted old note 3 from DC Electrical Characteristics for LMC6484I table 7
• Deleted old note 3 from DC Electrical Characteristics for LMC6484M table 9

ChangesfromRevisionB(August2000)toRevisionC

Page

- Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. 1

5PinConfigurationandFunctions

DorNFFPackages
14-PinSOICorPDIP TopView

14 13 12 11 10 9 8 4 V- 3 + 1 + - 2 V+ 5 6 7 1 2 3 4 5 6 7

PinFunctions

PIN		TYPEDESCRIPTION
NO.NAME
1OUTPUT	T10OutputforAmplifier1
2INVERT	INGINPUT1InvertinginputforAmplifier1
3	NONINVERTING INPUT1	INoninvertinginputforAmplifier1
4	V+	P Positivevoltagesupplypin
5	NONINTERTING INPUT2	INoninvertinginputforAmplifier2
6INVERT	INGINPUT2InvertinginputforAmplifier2
7OUTPUT	T20OutputforAmplifier2
8OUTPUT	T30OutputforAmplifier3
9INVERT	INGINPUT3InvertinginputforAmplifier3
10	NONINVERTING INPUT3	INoninvertinginputforAmplifier3
11	V-	P Negativesupplyvoltagepin
12	NONINVERTING INPUT4	INoninvertinginputforAmplifier4
13	INVERTINGINPUT4InvertinginputforAmplifier4
14	OUTPUT40OutputforAmplifier5

6Specifications

6.1 AbsoluteMaximumRatings

See ^(1)(2)

		MINMAXUNIT
	Differentialinputvoltage±SupplyVoltage
	Voltageatinput/outputpin(V)	^- - 0.3(V ^+ )+0.3V
	Supplyvoltage(V ^+ - V)16V
	Currentatinputpin (3)	±5	mA
	Currentatoutputpin (4)(5)	±30	mA
	Currentatpowersupplypin	40	mA
T_J	Junctiontemperature (6)	150	°C
T_stg	Storagetemperature, T_stg	-65 150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/Distributors for availability and specifications.

(3) Limiting input pincurrent is only necessary for input voltage that exceeds absolute maximum input voltage ratings.

(4) Applies to both single supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150^ C. Output currents in excess of ±30 mA over long term may adversely affect reliability.

(5)DonotshortcircuitoutputtoV +,whenV + isgreaterthan13Vorreliabilitywillbeadverselyaffected.

(6)ThemaximumpowerdissipationisafunctionofT J() , R JA -and T A .Themaximumallowablepowerdissipationatanyambient temperatureisP D = (T_J() - )/R_J A .AllnumbersapplyforpackagessoldereddirectlyintoaPCboard.

6.2ESDRatings

			VALUE	UNIT
V_(ESD)	ElectrostaticdischargeHuman	bodymodel(HBM),perANSI/ESDA/JEDECJS-001 (1)(2)	±2000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with lessthan500-VHBMispossiblewiththenecessaryprecautions.
(2) Human body model, 1.5-kΩ resistor in series with 100 pF. All pins rated per method 3015.6 of MIL-STD-883. This is a class 2 device rating.

6.3 Recommended Operating Conditions

overoperatingfree-airtemperaturerange(unlessotherwisenoted)

			MIN	MAX	UNIT
V+	Supply voltage		3	15.5	V
T_J	Junctiontemperature	LMC6484AM	-55	125	°C
		LMC6484AI, LMC6484I	-40	85	°C

6.4ThermalInformation

THERMALMETRIC (1)		LMC6484		UNIT
		D(SOIC)	NFF(PDIP)
		14PINS	14PINS
R_ JA	Junction-to-ambient thermal resistance	110	70	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5DCElectricalCharacteristicsforLMC6484AI

unless otherwise specified, all limits specified for T J=25^,V^+=5V,V^-=0V,VCM=V_O=V^+/2,andR_L>1M

PARAMETERTESTCONDITIONSMIN					(1)	TYP (2)	MAX (1)	UNIT
V_OS	Inputoffsetvoltage				0.110.75			mV
		Atthetemperatureextremes1.35
TCV_OS	Inputoffsetvoltage averagedrift				1μV/°C
I_B	Inputcurrent				0.02			pA
		Atthetemperatureextremes4
I_OS	Inputoffsetcurrent				0.01			pA
		Atthetemperatureextremes2
C_IN	Common-mode inputcapacitance				3			pF
R_IN	Inputresistance				>10			TeraΩ
CMRR	Common-mode rejection ratio	0V≤ V_CM ≤ 15V V^+ =15V			70	82		dB
			Atthetemperature extremes		67
		0V≤ V_CM ≤ 5V V^+ =5V			70	82		dB
			Atthetemperature extremes		67
+PSRR	Positivepower supplyrejection ratio	5V≤ V^+ ≤ 15V V^-=0V VO=2.5V			70	82		dB
			Atthetemperature extremes		67
-PSRR	Negativepower supplyrejection ratio	-5V≤ V^- ≤ -15V V^+ =0V V_O=-2.5V			70	82		dB
			Atthetemperature extremes		67
V_CM	Inputcommon-modevoltage range	V^+ =5Vand15VForCMRR≥ 50dB			V^--0.3		-0.25	V
			Atthetemperature extremes		0
					V^+ +0.25	V^+ +0.3		V
			Atthetemperature extremes		V^+
A_V	Largesignal voltagegain	R_L=2kΩ^(3)	Sourcing		140	666		V/mV
				Atthe temperature extremes	84
			Sinking		35	75		V/mV
				Atthe temperature extremes	20
		R_L=600Ω^(3)	Sourcing		80	300		V/mV
				Atthe temperature extremes	48
			Sinking		20	35		V/mV
				Atthe temperature extremes	13

(1) Alllimitsarespecifiedbytestingorstatisticalanalysis.
(2) Typical values represent themost likely parametric normal.
(3) V^+=15V, V_CM=7.5V and R connected to 7.5V. Forsourcing tests, 7.5V ≤ V 0 ≤ 11.5V. Forsinking tests, 3.5V ≤ V 0 ≤ 7.5V.

DCElectricalCharacteristicsforLMC6484Al(continued)

unless otherwise specified, all limit specific for T J=25^,V^+=5V,V^-=0V,VCM=V_O=V^+/2 , and R_L>1M

PARAMETERTESTCONDITIONSMIN				(1) TYP (2) MAX (1)	UNIT
V_O	Outputswing	V^+=5V R_L=2kΩ toV^+/2		4.84.9	V
			Atthetemperature extremes	4.7
				0.10.18	V
			Atthetemperature extremes	0.24
		V^+=5V R_L=600Ω toV^+/2		4.54.7	V
			Atthetemperature extremes	4.24
				0.30.5	V
			Atthetemperature extremes	0.65
		V^+=15V R_L=2kΩ toV^+/2		14.414.7	V
			Atthetemperature extremes	14.2
				0.160.32	V
			Atthetemperature extremes	0.45
		V^+=15V R_L=600Ω toV^+/2		13.414.1	V
			Atthetemperature extremes	13
				0.51	V
			Atthetemperature extremes	1.3
I_SC	Outputshortcircuit current V^+=5V	Sourcing, V_O=0V		1620	mA
			Atthetemperature extremes	12
		Sinking, V_O=5V		1115	mA
			Atthetemperature extremes	9.5
I_SC	Outputshortcircuit current V^+=15V	Sourcing, V_O=0V		2830	mA
			Atthetemperature extremes	22
		Sinking, V_O=12V^(4)		3030	mA
			Atthetemperature extremes	24
I_S	Supplycurrent	Allfouramplifiers V^+=+5V,V_O=V^+/2		22.8	mA
			Atthetemperature extremes	3.6
		Allfouramplifiers V^+=+15V,V_O=V^+/2		2.63	mA
			Atthetemperature extremes	3.8

(4)WhenV ^+ isgreaterthan13V,donotshortcircuitoutputtoV ^+ orreliabilitywillbeadverselyaffected.

6.6DCElectricalCharacteristicsforLMC6484I

unless otherwise specified, all limits specified for T J=25^,V^+=5V,V^-=0V,VCM=V_O=V^+/2,andR_L>1M

PARAMETERTESTCONDITIONS MIN					(1)	TYP(2)	MAX(1)	UNIT
V_OS	Inputoffsetvoltage				0.113			mV
		Atthetemperatureextremes3.7
TCV_OS	Inputoffsetvoltage averagedrift				1μV/°C
I_B	Inputcurrent				0.02			pA
		Atthetemperatureextremes4
I_OS	Inputoffsetcurrent				0.01			pA
		Atthetemperatureextremes2
C_IN	Common-mode inputcapacitance				3			pF
R_IN	Inputresistance				>10			TeraΩ
CMRR	Common-mode rejectionratio	0V≤ V_CM ≤ 15V V^+ =15V			65	82		dB
			Atthetemperatureextremes		62
		0V≤ V_CM ≤ 5V V^+ =5V			65	82		dB
			Atthetemperatureextremes		60
+PSRR	Positivepower supplyrejectionratio	5V≤ V^+ ≤ 15V V^-=0V,V_o=2.5V			65	82		dB
			Atthetemperatureextremes		62
-PSRR	Negativepower supplyrejectionratio	-5V≤ V^- ≤ -15V V^+ =0V, V_o =-2.5V			65	82		dB
			Atthetemperatureextremes		62
V_CM	Inputcommon-mode voltage range	V^+ =5Vand15VForCMRR≥ 50dB			V^- - 0.3		-0.25	V
			Atthetemperatureextremes		0
					V^+ +0.25	V^+ +0.3		V
			Atthetemperatureextremes		V^+
A_V	Largesignalvoltage gain	R_L=2kΩ^(3)	Sourcing		120	666		V/mV
				Atthe temperature extremes	72
			Sinking		35	75
				Atthe temperature extremes	20
		R_L=600Ω^(3)	Sourcing		50	300
				Atthe temperature extremes	30
			Sinking		15	35
				Atthe temperature extremes	10

(1) Alllimitsarespecifiedbytestingorstatisticalanalysis.
(2) Typical values represent themost likely parametric normal.
(3) V^+=15V, V_CM=7.5V and R connected to 7.5V. Forsourcing tests, 7.5V ≤ V 0 ≤ 11.5V. Forsinking tests, 3.5V ≤ V 0 ≤ 7.5V.

DCElectricalCharacteristicsforLMC6484I(continued)

unless otherwise specified, all limit specific for T J=25^,V^+=5V,V^-=0V,VCM=V_O=V^+/2,andR_L>1M

PARAMETERTESTCONDITIONSMIN				(1)	TYP(2)	MAX(1)	UNIT
V_O	Outputswing	V^+=5V R_L=2kΩ toV^+/2		4.84.9			V
			Athetemperatureextremes4.7
				0.10.18			V
			Athetemperatureextremes0.24
		V^+=5V R_L=600Ω toV^+/2		4.54.7			V
			Athetemperatureextremes4.24
				0.30.5			V
			Athetemperatureextremes0.65
		V^+=15V R_L=2kΩ toV^+/2		14.414.7			V
			Athetemperatureextremes14.2
				0.160.32			V
			Athetemperatureextremes0.45
		V^+=15V R_L=600Ω toV^+/2		13.414.1			V
			Athetemperatureextremes13
				0.5		1	V
			Athetemperatureextremes	1.3
I_SC	Outputshortcircuit current V^+=5V	Sourcing, V_O=0V		16	20		mA
			Athetemperatureextremes12
		Sinking, V_O=5V		11	15		mA
			Athetemperatureextremes9.5
I_SC	Outputshortcircuit current V^+=15V	Sourcing, V_O=0V		28	30		mA
			Athetemperatureextremes22
		Sinking, V_O=12V^(4)		30	30		mA
			Athetemperatureextremes24
I_S	Supplycurrent	Allfouramplifiers V^+=+5V V_O=V^+/2		22.8			mA
			Athetemperatureextremes	3.6
		Allfouramplifiers V^+=+15V V_O=V^+/2		2.6		3	mA
			Athetemperatureextremes	3.8

(4)WhenV ^+ isgreaterthan13V,donotshortcircuitoutputtoV ^+ orreliabilitywillbeadverselyaffected.

6.7DCElectricalCharacteristicsforLMC6484M

unless otherwise specified, all limits specified for T J=25^,V^+=5V,V^-=0V,VCM=V_O=V^+/2,andR_L>1M

PARAMETERTESTCONDITIONSMIN					(1)	TYP(2)	MAX(1)	UNIT
V_OS	Inputoffsetvoltage				0.113			mV
		Atthetemperatureextremes3.8
TCV_OS	Inputoffsetvoltage averagedrift				1μV/°C
I_B	Inputcurrent				0.02			pA
		Atthetemperatureextremes100
I_OS	Inputoffsetcurrent				0.01			pA
		Atthetemperatureextremes50
C_IN	Common-mode inputcapacitance				3			pF
R_IN	Inputresistance				>10			TeraΩ
CMRR	Common-mode rejectionratio	0V≤ V_CM ≤ 15V V^+ =15V			65	82		dB
			Atthetemperatureextremes		60
		0V≤ V_CM ≤ 5V V^+ =5V			65	8		dB
			Atthetemperatureextremes		60
+PSRR	Positivepower supplyrejectionratio	5V≤ V^+ ≤ 15V V^- =0V, V_O =2.5V			65	82		dB
			Atthetemperatureextremes		60
-PSRR	Negativepower supplyrejectionratio	-5V≤ V^- ≤ -15V V^+ =0V V_O =-2.5V			65	82		dB
			Atthetemperatureextremes		60
V_CM	Inputcommon-mode voltage range	V^+ =5Vand15VForCMRR≥ 50dB			V^- -0.3		-0.25	V
			Atthetemperatureextremes		0
					V^+ +0.25	V^+ +0.3		V
			Atthetemperatureextremes		V^+
A_V	Largesignalvoltage gain	R_L=2kΩ^(3)	Sourcing		120	666		V/mV
				Atthe temperature extremes	72
			Sinking		35	75
				Atthe temperature extremes	20
		R_L=600Ω^(3)	Sourcing		50	300
				Atthe temperature extremes	30
			Sinking		15	35
				Atthe temperature extremes	10

(1) Alllimitsarespecifiedbytestingorstatisticalanalysis.
(2) Typical values represent themost likely parametric normal.
(3) V^+=15V, V_CM=7.5V and R connected to 7.5V. Forsourcing tests, 7.5V ≤ V 0 ≤ 11.5V. Forsinking tests, 3.5V ≤ V 0 ≤ 7.5V.

DCElectricalCharacteristicsforLMC6484M(continued)

unless otherwise specified, all limit specific for T J=25^,V^+=5V,V^-=0V,VCM=V_O=V^+/2 , and R_L>1M

PARAMETERTESTCONDITIONS MIN				(1)	TYP(2)	MAX(1)	UNIT
V_O	Outputswing	V^+=5V R_L=2kΩ to V^+/2		4.84.9			V
			Athetemperatureextremes4.7
				0.10.18			V
			Athetemperatureextremes0.24
		V^+=5V R_L=600Ω to V^+/2		4.54.7			V
			Athetemperatureextremes4.24
				0.30.5			V
			Athetemperatureextremes0.65
		V^+=15V R_L=2kΩ to V^+/2		14.414.7			V
			Athetemperatureextremes14.2
				0.160.32			V
			Athetemperatureextremes0.45
		V^+=15V R_L=600Ω to V^+/2		13.414.1			V
			Athetemperatureextremes13
				0.5		1	V
			Athetemperatureextremes	1.3
I_SC	Outputshortcircuit current V^+=5V	Sourcing, V_O=0V		16	20		mA
			Athetemperatureextremes10
		Sinking, V_O=5V		11	15		mA
			Athetemperatureextremes	8
I_SC	Outputshortcircuit current V^+=15V	Sourcing, V_O=0V		28	30		mA
			Athetemperatureextremes20
		Sinking, V_O=12V^(4)		30	30		mA
			Athetemperatureextremes22
I_S	Supplycurrent	Allfouramplifiers V^+=+5V V_O=V^+/2		22.8			mA
			Athetemperatureextremes	3.8
		Allfouramplifiers V^+=+15V , V_O=V^+/2		2.6		3	mA
			Athetemperatureextremes	4

(4)WhenV ^+ isgreaterthan13V,donotshortcircuitoutputtoV ^+ orreliabilitywillbeadverselyaffected.

6.8DCElectricalCharacteristicsforLMC6484AI

unless otherwise specified, all limit specified for T J=25^,V^+=3V,V^-=0V,VCM=V_O=V^+/2,andR_L>1M

PARAMETERTESTCONDITIONS		NSMIN		(1)	TYP (2)	MAX (1)	UNIT
V_OS	Inputoffsetvoltage			0.92			mV
		Atthetemperatureextremes2.7
TCV_OS	Inputoffsetvoltageaveragedrift2μV/°C
I_B	Inputbiascurrent0.02	pA
I_OS	Inputoffsetcurrent			0.01			pA
CMRR	Common-moderejectionratio	0V≤ V_CM ≤ 3V		64	74		dB
PSRR	Powersupplyrejectionratio	3V≤ V^+ ≤ 15V, V^- =0V		68	80		dB
V_CM	Inputcommon-modevoltagerange	ForCMRR≥ 50dB		V^- - 0.25			0 V
				V^+	V^+ +0.25		V
V_O	Outputswing	R_L =2kΩ to V^+/2		2.8			V
				0.2			V
		R_L =600Ω to V^+/2		2.5	2.7		V
				0.37		0.6	V
I_S	Supplycurrent	Allfour amplifiers		1.65		2.5	mA
			Atthetemperature extremes	3

(1) Alllimitsarespecifiedbytestingorstatisticalanalysis.
(2) Typical values represent themost likely parametric normal.

6.9DCElectricalCharacteristicsforLMC6484I

unless otherwise specified, all limit specified for T J = 25^, V^+ = 3V, V^- = 0V, VCM = V_O = V^+/2, and R_L > 1M

PARAMETER		TESTCONDITIONS		MIN (1)	TYP(2)	MAX(1)	UNIT
V_OS	Inputoffsetvoltage			0.9		3	mV
		Atthetemperatureextremes		3.7
TCV_OS	Input offset voltage average drift			2			μV/°C
I_B	Inputbiascurrent			0.02			pA
I_OS	Inputoffsetcurrent			0.01			pA
CMRR	Common-moderejectionratio	0V≤ V_CM ≤ 3V		60	74		dB
PSRR	Powersupplyrejectionratio	3V≤ V^+ ≤ 15V, V^- =0V		60	80		dB
V_CM	Inputcommon-modevoltage range	ForCMRR≥ 50dB		V^- - 0.25			V
				V^+	V^+ +0.25		V
V_O	Outputswing	R_L =2kΩ to V^+/2		2.8			V
				0.2			V
		R_L =600Ω to V^+/2		2.5	2.7		V
				0.37		0.6	V
I_S	Supplycurrent	Allfouramplifiers		1.65		2.5	mA
			Atthetemperature extremes	3

(1) Alllimitsarespecifiedbytestingorstatisticalanalysis.
(2) Typical values represent themost likely parametric normal.

6.10DCElectricalCharacteristicsforLMC6484M

unless otherwise specified, all limit specified for T J=25^,V^+=3V,V^-=0V,VCM=V_O=V^+/2,andR_L>1M

PARAMETERTESTCONDITIONS				(1)	TYP(2)	MAX(1)	UNIT
V_OS	Inputoffsetvoltage			0.93			mV
		Atthetemperatureextremes3.8
TCV_OS	Inputoffsetvoltageaverage drift			2μV/°C
I_B	Inputbiascurrent0.02pA
I_OS	Inputoffsetcurrent0.01pA
CMRR	Common-moderejectionratio	0V≤ V_CM ≤ 3V		60	74dB
PSRR	Powersupplyrejectionratio	3V≤ V^+ ≤ 15V, V^- =0V		60	80dB
V_CM	Inputcommon-modevoltage range	ForCMRR≥ 50dB		V^- - 0.25			0 V
				V^+	V^+ +0.25		V
V_O	Outputswing	R_L =2kΩ to V^+ /2		2.8			V
				0.2			V
		R_L =600Ω to V^+ /2		2.5	2.7		V
				0.37		0.6	V
I_S	Supplycurrent	Allfouramplifiers		1.65		2.5	mA
			Atthetemperature extremes	3.2

(1) Alllimitsarespecifiedbytestingorstatisticalanalysis.
(2) Typical values represent themost likely parametric normal.

6.11 ACElectrical Characteristics for LMC6484A

unless otherwise specified, all limit specific for T J=25^,V^+=5V,V^-=0V,VCM=V_O=V^+/2,andR_L>1M

PARAMETERTESTCONDITIONSMIN			(1) TYP(2) MAX(1)	UNIT
SRSlewrate	(3)		11.3	V/μs
		Atthetemperatureextremes0.7
GBW	Gain-bandwidth product	V^+=15V1.5 MHz
_m	Phasemargin		50	Deg
G_m	Gainmargin		15	dB
	Amplifier-to-amplifier isolation^(4)		150	dB
e_n	Input-referredvoltage noise	f=1kHz,V CM=1V	37	nV
i_n	Input-referredcurrent noise	f=1kHz	0.03	pA
THD	Totalharmonic distortion	f=1kHz,AV=-2, R_L=10kΩ,V_O=4.1V_PP	0.01%
		f=10kHz,AV=-2, R_L=10kΩ,V_O=8.5V_PP,V^+=10V	0.01%

(1) Alllimitsarespecifiedbytestingorstatisticalanalysis.
(2) Typical values represent themost likely parametric normal.
(3) V^-1 = 15 V . Connected as voltage follower with 10-V step input. Number specified is the slower of either the positive or negative slew rates.
(4)Inputreferred,V ^+=15V_andR L=100k connectedto7.5V.Eachamplifierexcitedinturnwith1kHztoproduceV O=12V_PP

6.12ACElectricalCharacteristicsforLMC6484I

unless otherwise specified, all limit specific for T J=25^,V^+=5V,V^-=0V,VCM=V_O=V^+/2,andR_L>1M

PARAMETER		TESTCONDITIONS	MIN (1)	TYP(2)	MAX(1)	UNIT
SR	Slewrate (3)		0.9	1.3		V/μs
		Atthetemperatureextremes	0.63
GBW	Gain-bandwidthproduct	V^+=15V		1.5MHz
_m	Phasemargin			50		Deg
G_m	Gainmargin			15		dB
	Amplifier-to-amplifier isolation(4)			150		dB
e_n	Input-referredvoltagenoise	f=1kHz,V_CM=1V		37		nV√Hz
i_n	Input-referred current noise	f=1kHz		0.03		pA√Hz
THD	Totalharmonicdistortion	f=1kHz,A_V=-2,R_L=10k,V_O=4.1V_PP		0.01%
		f=10kHz,A_V=-2,R_L=10k,V_O=8.5V_PP,V^+=10V		0.01%

(1) Alllimitsarespecifiedbytestingorstatisticalanalysis.
(2) Typical values represent themost likely parametric normal.
(3) V^- = 15 V . Connected as Voltage Follower with 10-V step input. Number specified is the slower of either the positive or negative slew rates.
(4)Inputreferred,V ^+=15V_andR L=100k connectedto7.5V.Eachampexcitedinturnwith1kHztoproduceV O=12V_PP .

6.13ACElectricalCharacteristicsforLMC6484M

unless otherwise specified, all limit specified for T J=25^,V^+=5V,V^-=0V,VCM=V_O=V^+/2,andR_L>1M

PARAMETERTESTCONDITIONSMIN			(1) TYP(2) MAX(1)	UNIT
SRSlewrate	(3)		0.91.3	V/μs
		Atthetemperatureextremes0.54
GBWGain-bandwidthproductV		+ = 15V1.5 MHz
_m	Phasemargin		50	Deg
G_m	Gainmargin		15	dB
	Amplifier-to-amplifierisolation (4)		150	dB
e_n	Input-referredvoltagenoise	f=1kHz,V CM=1V	37nV√Hz	—
i_n	Input-referred current noise	f=1 kHz	0.03	pA√Hz
THD	Totalharmonicdistortion	f=1kHz,AV=-2, R_L=10kΩ,V_O=4.1V_PP	0.01%
		f=10kHz,AV=-2, R_L=10kΩ,V_O=8.5V_PP,V^+=10V	0.01%

(1) Alllimitsarespecifiedbytestingorstatisticalanalysis.
(2) Typicalvaluesrepresentthemostlikelyparametricnormal.
(3) V^+ = 15 V . Connected as Voltage Follower with 10-V step input. Number specified is the slower of either the positive or negative slew rates.
(4) Input referred, V + =15V and R _L =100kΩ connected to 7.5V. Each amplifier excited in turn with 1kHz to produce V O =12V PP.

6.14ACElectricalCharacteristics:V ^+=3V,V^-=0V

unless otherwise specified, V ^+ =3V, V ^- =0V, V CM =V O =V ^+ /2, and R _L >1M

PARAMETER		TESTCONDITIONS	LMC6484AI,LMC6484I,LMC6484M			UNIT
			MIN(1)	TYP(2)	MAX(1)
SR	Slewrate (3)		0.9			V/μs
GBW	Gain-bandwidthproduct		1			MHz
THD	Totalharmonicdistortion	f=10kHz,AV=-2,RL=10kΩ,VO=2V PP	0.01%

(1) Alllimitsarespecifiedbytestingorstatisticalanalysis.
(2) Typicalvaluesrepresentthemostlikelyparametricnormal.
(3) Connected as voltage follower with 2-V step input. Number specified is the slower of either the positive or negative slew rates.

6.15TypicalCharacteristics

at V_S=15V , singlesupply, and T _A=25^ (unless otherwise specified)

Figure1. SupplyCurrentvsSupplyVoltage

Figure2.InputCurrentvsTemperature

Figure3.SourcingCurrentvsOutputVoltageFigure4.SourcingCurrentvsOutputVoltage

Figure5.SourcingCurrentvsOutputVoltage

Figure6.SinkingCurrentvsOutputVoltage

TypicalCharacteristics(continued)

at V_S = 15V , singlesupply, and T _A = 25^ (unless otherwise specified)

Figure7.SinkingCurrentvsOutputVoltageFigure8.SinkingCurrentvsOutputVoltage

Figure9.OutputVoltageSwingvsSupplyVoltage

Figure10.InputVoltageNoisevsFrequency

Figure11.InputVoltageNoisevsInputVoltageFigure12.InputVoltageNoisevsInputVoltage

TypicalCharacteristics(continued)

at V_S = 15V , singlesupply, and T _A = 25^ (unless otherwise specified)

Figure13.InputVoltageNoisevsInputVoltage

Figure14.CrosstalkRejectionvsFrequency

Figure15.CrosstalkRejectionvsFrequencyFigure16.PositivePSRRvsFrequency

Figure17.NegativePSRRvsFrequencyFigure18.CMRRvsFrequency

TypicalCharacteristics(continued)

at V_S = 15V , singlesupply, and T _A = 25^ (unless otherwise specified)

Figure19.CMRRvsInputVoltageFigure20.CMRRvsInputVoltage

Figure21.CMRRvsInputVoltage

Figure22.ΔV os vsCMR

Figure23.ΔV os vsCMR
Figure24.InputVoltagevsOutputVoltage

TypicalCharacteristics(continued)

at V_S = 15V , singlesupply, and T _A = 25^ (unless otherwise specified)

Figure25.InputVoltagevsOutputVoltage

Figure26.OpenLoopFrequencyResponse

Figure27.NoninvertingLargeSignalPulseResponseFigure28.NoninvertingLargeSignalPulseResponse

Figure29.NoninvertingLargeSignalPulseResponseFigure30.NoninvertingSmallSignalPulseResponse

TypicalCharacteristics(continued)

at V_S = 15V , singlesupply, and T _A = 25^ (unless otherwise specified)

Figure31.NoninvertingSmallSignalPulseResponseFigure32.NoninvertingSmallSignalPulseResponse

Figure33.InvertingLargeSignalPulseResponseFigure34.InvertingLargeSignalPulseResponse

Figure35.InvertingLargeSignalPulseResponseFigure36.InvertingSmallSignalPulseResponse

TypicalCharacteristics(continued)

at V_S = 15V , singlesupply, and T _A = 25^ (unless otherwise specified)

Figure37.InvertingSmallSignalPulseResponseFigure38.InvertingSmallSignalPulseResponse

Figure39.StabilityvsCapacitiveLoadFigure40.StabilityvsCapacitiveLoad

Figure41.StabilityvsCapacitiveLoadFigure42.StabilityvsCapacitiveLoad

TypicalCharacteristics(continued)

at V_S = 15V , singlesupply, and T _A = 25^ (unless otherwise specified)

Figure43.StabilityvsCapacitiveLoadFigure44.StabilityvsCapacitiveLoad

7DetailedDescription

7.1 Overview

TheLMC6484isaquadoperationalamplifierthatoffersalow-cost,low-poweramplifierforapplicationsrequiring multipleoperationalamplifierstagesandrail-to-railoperation. Thisdevicesupportsawidesupplyrange(3Vto 15V)andexcellentamplifier-to-amplifierisolation(150dBtypical). Thisdeviceisanexcellentchoiceforbattery-poweredsignalacquisitionsystemsrequiringhighlyintegratedsolutionstoachieveefficientlayout.

7.2 FunctionalBlockDiagram

14 13 12 11 10 9 8 4 V- 3 + 1 + - 2 V+ 5 6 7 1 2 3 4 5 6 7

7.3FeatureDescription

7.3.1 Amplifier Topology

TheLMC6484incorporatesspeciallydesigned,wide-complianceangecurrentmirrors,andthebodyeffectto extendinputcommon-moderangetoeachsupplyrail.Complementary,paralleled,differentialinputstages,like thetypeusedinotherCMOSandbipolarrail-to-railinputamplifiers,arenotusedbecauseoftheirinherent accuracyproblemsduetoCMRR,crossoverdistortion,andopen-loopgainvariation.

The input staged design of the LMC6484 is complemented by an output stage capable of rail-to-rail output swing even when driving a largeload. Rail-to-rail output swing is obtained by taking the output directly from the internal integrator instead of an output buffer stage.

7.3.2 InputCommon-ModeVoltageRange

UnlikeBi-FETamplifierdesigns,theLMC6484doesnotexhibitphaseinversionwhenaninputvoltageexceeds the negative supply voltage. Figure 46 shows an input voltage exceeding both supplies with no resulting phase inversionontheoutput.

Figure45.AnInputVoltageSignalExceedstheLMC6484 PowerSupplyVoltagesWithNoOutputPhaseInversion

FeatureDescription(continued)

The absolutemaximuminputvoltageis300mVbeyondeithersupplyrailatroomtemperature.Voltagesgreatly exceeding this absolute maximum rating, as in Figure 46, can cause excessive current to flow in or out of the inputpinspossiblyaffectingreliability.

Figure46.A±7.5VInputSignalGreatlyExceedsthe3-V SupplyinFigure47CausingNoPhaseInversionduetoR

Applicationsthatexceedthisratingmustexternallylimitthemaximuminputcurrentto±5mAwithaninput resistor,asshowninFigure47.

3V - ½ LMC6484 + VIN R1= 10 kΩ VOUT

Figure47.R , InputCurrentProtectionforVoltagesExceedingtheSupplyVoltage

7.3.3 Rail-to-RailOutput

The approximated output resistance of the LMC6484 is 180- sourcing and 130- sinking at V_S=3V , and 110- sourcing and 83- sinking at V_S=5V . Using the calculated output resistance, the maximum output voltage swing can be estimated as a function of load.

7.4DeviceFunctionalModes

The LMC6482 may be used in applications where each amplifier channel is used independently, or in applications with cascaded channels. See the Typical Application section for more information.

8ApplicationandImplementation

NOTE

InformationinthefollowingapplicationssectionsisnotpartoftheTlcomponent specification,andTldoesnotwarrantitsaccuracyorcompleteness.TI'scustomersare responsiblefordeterminingsuitabilityofcomponentsfortheirpurposes.Customersshould validateandtesttheirdesignimplementationtoconfirmsystemfunctionality.

8.1 Application Information

8.1.1 Upgrading Applications

TheLMC6484quad-channeldevicesandLMC6482dual-channeldeviceshaveindustrystandardpinoutstorefitexistingapplications.SystemperformancecanbegreatlyincreasedbythefeaturesoftheLMC6484.ThekeybenefitofdesigningintheLMC6484isincreasedlinearsignalrange.Mostoperationalamplifiershavelimitedinputcommon-moderanges.Signalsthatexceedthisrangegenerateanonlinearoutputresponsethatpersistslongaftertheinputsignalreturnstothecommon-moderange.

Linearsignalrangeisvitalinapplicationssuchasfilters,wheresignalpeakingcanexceedinputcommon-mode ranges,andresultinoutputphaseinversionorseveredistortion.

8.1.2 Spice Macromodel

AspicemacromodelisavailablefortheLMC6484. Thismodelincludesaccuratesimulationofthefollowing:

• Inputcommon-modevoltagerange

• Frequency and transient response

• GBWdependenceonloadingconditions

• Quiescentanddynamicsupplycurrent

• Outputswingdependenceonloadingconditions

• Manymorecharacteristics,aslistedonthemacromodeldisk.

ContactyourlocalTexasInstrumentssalesofficetoobtainanoperationalamplifierspicemodellibrarydisk.

8.2 Typical Application

RF CF - + VIN RO VOUT CL

Figure48. UnityGainBufferforHigh-CapacitiveLoads

TypicalApplication(continued)

8.2.1 DesignRequirements

• Forbestperformance, makesurethattheinputvoltageswingisbetweenV+andV-.
• Makesurethattheinputdoesnotexceedthecommon-modeinputrange.
• Toreducetheriskofde-stabilizingtheoutput,useresistiveisolationontheoutputwhendrivingcapacitive loads(seetheCapacitiveLoadCompensationsection).
• When large feedback resistors are used, compensate for parasitic capacitance on the input as needed (see the Compensating for Input Capacitances section).

8.2.2 Detailed Design Procedure

8.2.2.1 Capacitive Load Compensation

TheLMC6484typicallydirectlydrivesa100-pFloatwithV _S =15Vatunitygainwithoutoscillating.Theunity gainfolloweristhemostsensitiveconfiguration.Directcapacitiveloadingreducesthephasemarginof operationalamplifiers.Thecombinationoftheoutputimpedanceoftheoperationalamplifierandthecapacitive loadinducesphaselagthatresultsineitheranunder-dampedpulseresponseoroscillation.

Capacitive load compensation can be accomplished using resistive isolation, as shown in Figure 49. This simple technique is useful for isolating the capacitive input of multiplexers and analog-to-digital converters (ADCs).

- 1/4 LMC6484 + R = 300 Ω C_L = 330 pF

Figure49.Resistivelsolationofa330-pFCapacitiveLoad

Figure50.PulseResponseoftheLMC6484CircuitinFigure49

TypicalApplication(continued)

Improved frequency response is achieved by indirectly driving capacitive loads as shown in Figure 51.

10 kΩ C₁ 100 pF - ½ LMC6484 + Vₐₙ R1 300Ω Vₒᵤₜ Cₗ = 330 pF

Figure51.LMC6484NoninvertingAmplifierCompensatedtoHandlea330-pFCapacitiveLoad

R1 and C1 servetocounteractthelossofphasemarginbyfeedingforwardthehigh-frequencycomponentofthe outputsignalbacktotheinvertinginputoftheamplifier;thereby,preservingphasemarginintheoverallfeedback loop. ThevaluesofR1 and C1 areexperimentallydeterminedforthedesiredpulseresponse. Theresultingpulse responseisseeninFigure52.

Figure52.PulseResponseofLMC6484CircuitinFigure51

Typical Application (continued)

8.2.2.2 Compensating for Input Capacitance

Large values of feedback resistance are often used with amplifiers that have ultra-low input current, such as the LMC6484. Large feedback resistors can react with small values of input capacitance due to transducers, photodiodes, and circuit-board parasitics to reduce phase margins.

Vin R1 CIN Cf R2 - ½ LMC6484 + VOUT

Figure 53. Canceling the Effect of Input Capacitance

To compensate for the effect of input capacitance, add a feedback capacitor. The feedback capacitor (as in Figure 53), Cf, is first estimated by Equation 1:

$$ \begin{array}{l} \frac {1}{2 \pi R C _ {1 N - 2} R ^ {\prime}} \geq \frac {1}{\pi} \ \text {or} \ R _ {1} C _ {1 N - 2} R ^ {\prime} G \end{array} \tag {1} $$

This equation typically provides significant overcompensation. Printed circuit board (PCB) stray capacitance may be larger or smaller than that of a breadboard, so the actual optimum value for C_f may be different. The values of Cf should be checked on the actual circuit. See the LMC660 Quad CMOS Amplifier data sheet for a more detailed discussion.

8.2.2.3 Offset Voltage Adjustment

Offset voltage adjustment circuits are illustrated in Figure 54 and Figure 55. Large-value resistances and potentiometers are used to reduce power consumption while providing typically ±2.5 mV of adjustment range, referred to the input, for both configurations with V_S=±5 V.

V+ 500 kΩ 1 kΩ 500 kΩ V- R3 VIN R4 5V ½ LMC6484 + -5V VOUT VOUT/VIN = - R4/R3

Figure 54. Inverting Configuration Offset Voltage Adjustment

V+ 500 kΩ R1 200 kΩ R3 R4 5V - ½ LMC6484 - VIN + -5V VOUT VIN = 1 + R4 / R3 ; R2 << R3

Figure 55. Noninverting Configuration Offset Voltage Adjustment

TypicalApplication(continued)

8.2.3 ApplicationCurves

Figure56.OpenLoopFrequencyResponse

Figure57.OpenLoopFrequencyResponsevs Temperature

Figure58.MaximumOutputSwingvsFrequency

Figure59.GainandPhasevsCapacitiveLoad

Figure60.GainandPhasevsCapacitiveLoadFigure61.OpenLoopOutputImpedancevsFrequency

TypicalApplication(continued)

Figure62.OpenLoopOutputImpedancevsFrequency

Figure63.SlewRatevsSupplyVoltage

8.3SystemExamples

The circuit in Figure 64 uses a single supply to half-wave rectify a sinusoid centered about ground. R_1 limits current into the amplifier caused by the input voltage exceeding the supply voltage. Figure 65 shows the half-waverectifier waveform. Full-waverectification is provided by the circuit in Figure 66.

V+ = 3V 10 kΩ - ½ LMC6484 + VIN R1 VOUT 10 kΩ

Figure64. Half-WaveRectifierWithInputCurrentProtection(R)

Figure65.Half-WaveRectifierWaveform

V+ 10 kΩ R₁ - ½ LMC6484 + 10 kΩ 1N914

Figure66.FullWaveRectifierWithInputCurrentProtection(R

SystemExamples(continued)

Figure67.FullWaveRectifierWaveform

V+ R - ½ LMC6484 VIN IOUT = (V+ - VIN)/R

Figure68. Large Compliance Range Current Source

0.1Ω R1 100Ω R2 - 1/4 LMC6484 + VOUT 1 kΩ VOUT = 1 kΩ (R1/R2) IL R1 << R2 IL RL

Figure69. PositiveSupplyCurrentSense

SystemExamples(continued)

In Figure 70, dielectric absorption and leakage is minimized by using a polystyrene or polyethylene hold capacitor. The droop rate is primarily determined by the value of CH and the diode leakage current. The ultra-low input current of the LMC6484 has a negligible effect on droop.

20 kΩ - 1/4 LMC6484 + - VIN C HOLD 100 pF 1 kΩ - 1/4 LMC6484 + VOUT

Figure 70. Low Voltage Peak Detector With Rail-to-Rail Peak Capture Range

20 kΩ - 1/4 LMC6484 + 1 kΩ - 1/4 LMC6484 + VOUT VIN ½ CD4066BM SAMPLE CHOLD

Figure 71. Rail-to-RailSample andHold

The high CMRR (85 dB) of the LMC6484 allows excellent accuracy throughout the rail-to-rail dynamic capture range of the circuit.

The low-pass filter circuit in Figure 72 can be used as an antialiasing filter with the same voltage supply as the ADC. Filter designs can also take advantage of the LMC6484 ultra-low input current. The ultra-low input current yields negligible offset error even when large value resistors are used, which allows the use of smaller-valued capacitors that take up less board space and cost less.

C1 VIN R1 + ¼ LMC6484 - R2 + ¼ LMC6484 - VOUT R1 R2 G1 C2; f ; DF 1/2 R1C1 2 CR 1√C2/3 √R2/3

Figure 72. Rail-to-Rail, Single-Supply, Low-Pass Filter

SystemExamples(continued)

8.3.1 DataAcquisitionSystems

Low-power, single-supply, data acquisition system solutions are provided by buffering the ADC12038 with the LMC6484, as shown in Figure 73. Capable of using the full supply range, the LMC6484 does not require input signalstobescaleddowntomeetlimitedcommon-modevoltageranges.TheLMC6484CMRRof82dB maintainsintegrallinearityofa12-bitdataacquisitionsystemto±0.325LSB. Otherail-to-railinputamplifiers withonly50dBofCMRRdegradetheaccuracyofthedataacquisitionsystemtoonly8bits.

5V 12.1 kΩ 1 kΩ LMC6484 - ½ + VA+ ADC12038 CHO 1000 pF 1 kΩ 500 kΩ COM 2.5V 2 kΩ ½ LMC6484 2.048V 500Ω LM185BX FB 200 kΩ 33Ω 0.47 μF 130 kΩ 10 μF VREF+ VREF- AGND

Figure73. Operating From the Same Supply Voltage, the LMC6484 Buffer the ADC12038 Maintaining Excellent Accuracy

SystemExamples(continued)

8.3.2 Instrumentation Circuits

TheLMC6484hasthehighinputimpedance,largecommon-moderange,andhighCMRRrequiredfordesigning instrumentationcircuits.InstrumentationcircuitsdesignedwiththeLMC6484canrejectalargerrangeof common-modesignalsthanmostinstrumentationamps.Thus,instrumentationcircuitsdesignedwiththe LMC6484areanexcellentchoicefornoisyorindustrialenvironments.Otherapplicationsthatbenefitfromthese featuresincludeanalyticmedicalinstruments,magneticfielddetectors,gasdetectors,andsilicon-based transducers.

Asmall-valuedpotentiometerisusedinserieswithRgtosetthedifferentialgainofthethree-op-amp instrumentation circuit in Figure 74. This combination is used instead of one large valued potentiometer to increasegaintrimaccuracyandreduceerrorduetovibration.

10 kΩ R1 A1 ½ LMC6484 - 50 kΩ, 0.1% 0.1% 50 kΩ C2 RG C3 VIN R1 50 kΩ, 0.1% - A2 ½ LMC6484 + 50 kΩ 0.1% 50 kΩ C1 10 pF C4 3-20 pF AC CMR ADJUST 50 kΩ, 0.1% -A3 ½ LMC6484 + VOUT 48.7 kΩ DC CMR ADJUST R2 500Ω VREFERENCE

Figure74.Low-Power,Three-Op-AmplInstrumentationAmplifier

A two-op-amp instrumentation amplifier designed for a gain of 100 is shown in Figure 75. Low sensitivity trimmingismadeforoffsetvoltage, CMRR, and gain. Low cost and low power consumption are the main advantages of this two-op-amp circuit.

Higher frequency and larger common-mode range applications are best facilitated by a three-op-amp instrumentationamplifier.

CMRR Trim 50Ω VCM + 1/2VD 9.95k 10k, 0.1% 191Ω 10Ω Gain Trim + A1 ½ LMC6484 - 10k, 0.1% 10k, 0.1% -VCM - 1/2VD - A2 ½ LMC6484 + VOUT = 100VD

Figure75.Low-PowerTwo-Op-AmplInstrumentationAmplifier

9PowerSupplyRecommendations

TheLMC6482canbeoperatedoverasupplyrangeof3Vto15V.Toachievenoiseimmunityasappropriateto theapplication,makesuretousegoodPCBlayoutpracticesforpowersupplyrailsandplanes,aswellasusing bypasscapacitorsconnectedbetweenthepowersupplypinsandground.

10Layout

10.1 LayoutGuidelines

10.1.1 Printed-Circuit-BoardLayoutforHigh-ImpedanceWork

Anycircuitthatmustoperatewithlessthan1000pAofleakagecurrentrequiresspeciallayoutofthePCB. To takeadvantageoftheultra-lowinputcurrentoftheLMC6484(typically,lessthan20fA),makesuretohavean excellentlayout. Fortunately,thetechniquesforobtaininglowleakagesarequitesimple.First,donotignorethe surfaceleakageofthePCB,eventhoughthisleakagemaysometimesappearacceptablylow,becauseunder conditionsofhighhumidityordustorcontamination,thesurfaceleakagewillbeappreciable.

Tominimizetheeffectofanysurfaceleakage,layoutaringoffoilcompletelysurroundingtheLMC6484inputs andtheterminalsofcapacitors,diodes,conductors,resistors,relayterminals,ansoon,connectedtothe operational amplifier inputs, as in Figure 78. To have a significant effect, place guard rings in both the top and bottomofthePCB.ThisPCfoilmustthenbeconnectedtoavoltagethatisatthesamevoltageastheamplifier inputs,becauseonoleakagecurrentcanflowbetweenwopointsatthesamepotential.Forexample,aPCB trace-to-padresistanceof10 ^12 ,whichisnormallyconsideredaverylargeresistance,couldleak5pAifthe tracewerea5-Vbusadjacenttotherpadoftheinput.Thisleakagewouldcausea250timesdegradationfrom theactualperformanceoftheLMC6484.However,ifaguardringisheldwithin5mVoftheinputs,thenevena resistanceof10 ^11 would cause only 0.05 pA of leakage current. Figure 76 shows the typical connections of guardringsforstandardoperationalamplifierconfigurations.

INPUT - ½ LMC6484 + OUTPUT

Figure76. TypicalConnectionsofGuardRings

BeawarethatwhenitisinappropriatetolayoutaPCBforthesakeofjustafewcircuits,anothertechniqueeven better than a guard ring on a PCB: do not insert the input pin of the amplifier into the PCB at all, but bend the inputpinupintheairanduseonlyairasaninsulator.Airisanexcellentinsulator.Inthiscase,youmayhaveto foregosomeoftheadadvantagesofPCBconstruction,buttheadvantagesaresometimeswellworththeeffortof usingpoint-to-point,up-in-the-airwiring,asshowninFigure77.

FEEDBACK CAPACITOR RESISTOR OP AMP PC Board SOLDER CONNECTION

NOTE: InputpinsareliftedoutofPCBandsoldereddirectlytocomponents. AllotherpinsconnectedtoPCB.

Figure77.AirWiring

10.2LayoutExample

OUT4 -IN4 +IN4 V- OUT1 -IN1 +IN1 V+ Guard Ring

Figure78.ExampleofGuardRinginaPCBLayout

11DeviceandDocumentationSupport

11.1 DeviceSupport

FortheLMC6584PSpicemodel,seeSNOM165.

11.2 DocumentationSupport

11.2.1 Related Documentation

Forrelateddocumentation,seethefollowing:

• LMC6482 CMOS Dual Rail-To-Rail Input and Output Operational Amplifier data sheet

•LMC660CMOSQuadOperationalAmplifierdatasheet)

11.3SupportResources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight fromtheexperts.Searchexistinganswersoraskyourownquestiontogetthequickdesignhelpyouneed.

Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's TermsofUse.

11.4 Trademarks

E2EisatrademarkofTexasInstruments.

Allothertrademarksarethepropertyoftheirrespectiveowners.

11.5ElectrostaticDischargeCaution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOSgates.

11.6 Glossary

SLYZ022—TIGlossary.

This glossarylistsandexplainsterms,acronyms,anddefinitions.

12Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most currentdataavailableforthedesignateddevices.Thisdataissubjecttochangewithoutnoticeandrevisionof thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation.

PACKAGING INFORMATION

Orderable Device Status(1)

Package Type

Package Drawing

Pins

Package Qty

Eco Plan(2)

Lead finish/ Ball material(6)

MSL Peak Temp(3)

Op Temp (°C)

Device Marking(4-5)

Samples

LMC6484AIM NRND SOIC D 14 55 Non-RoHS

Call TI Level-1-235C-UNLIM -40 to 85 LMC6484

& Green

AIM

LMC6484AIM/NOPB ACTIVE SOIC D 14 55 RoHS & Green SN

Level-1-260C- UNLIM -40 to 85 LMC6484

Samples

AIM

LMC6484AIMX

NRND

SOIC

D

14

2500

Non-RoHS & Green

Call TI Level-1-235C-UNLIM -40 to 85 LMC6484

AIM

LMC6484AIMX/NOPB

ACTIVE

SOIC

D

14

2500

RoHS & Green

SN

Level-1-260C-UNLIM

-40 to 85

LMC6484 AIM

Samples

LMC6484AIN/NOPB

ACTIVE

PDIP

N

14

25

RoHS & Green

Call TI | SN

Level-1-NA-UNLIM

-40 to 85

LMC6484AIN

Samples

LMC6484IM

NRND SOIC D 14 55 Non-RoHS

Call TI Level-1-235C-UNLIM -40 to 85 LMC6484IM

& Green

LMC6484IM/NOPB ACTIVE SOIC D 14 55 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 LMC6484IM

Samples

LMC6484IMX NRND SOIC D 14 2500 Non-RoHS

Call TI Level-1-235C-UNLIM -40 to 85 LMC6484IM

& Green

LMC6484IMX/NOPB

ACTIVE

SOIC

D

14

2500

RoHS & Green

SN

Level-1-260C-UNLIM

-40 to 85

LMC6484IM

Samples

LMC6484IN/NOPB

ACTIVE

PDIP

N

14

25

RoHS & Green

Call TI | SN

Level-1-NA-UNLIM

-40 to 85

LMC6484IN

Samples

(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, Including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "\~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width.

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TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type

Package Drawing

Pins

SPQ Reel

Diameter (mm)

Reel Width W1 (mm)

A0 (mm)

B0 (mm)

K0 (mm)

P1 (mm)

W (mm)

Pin1 Quadrant

LMC6484AIMX SOIC

D 14 2500

330.0 16

4 6.5

9.35 2.3 8.0

16.0 Q1

LMC6484AIMX/NOPB SOIC

D 14 2500

330.0 16

16.4

6.5 9.35 2.3

8.0 16.0

Q1

LMC6484IMX SOIC

D 14 2500

330.0 16

4 6.5

9.35 2.3 8.0

16.0

Q1

LMC6484IMX/NOPB SOIC

D 14 2500

330.0 16

16.4

6.5 9.35 2.3

8.0 16.0

Q1

TAPE AND REEL BOX DIMENSIONS W L

*All dimensions are nominal

Device	Package Type	Package Drawing	Pins	SPQ	Length (mm)	Width (mm)	Height (mm)
LMC6484AIMX SOIC	D 14 2500 367.0 367.0 35.0
LMC6484AIMX/NOPB SOIC	D 14 2500 367.0 367.0 35.0
LMC6484IMX SOIC	D 14 2500 367.0 367.0 35.0
LMC6484IMX/NOPB SOIC	D 14 2500 367.0 367.0 35.0

TUBE

T - Tube height L - Tube length W-Tube width B - Alignment groove width

*All dimensions are nominal

Device	Package Name	Package Type	Pins	SPQ	L (mm)	W (mm)	T (μm)	B (mm)
LMC6484AIM D SOIC	14 55 495 8 4064	3.05
LMC6484AIM D SOIC	14 55 495 8 4064	3.05
LMC6484AIM/NOPB D	SOIC 14 55 495 8 4064	3.05
LMC6484AIN/NOPB N	PDIP 14 25 502 14	11938	4.32
LMC6484IM	D SOIC 14	55 495 8 4064	3.05
LMC6484IM	D SOIC 14	55 495 8 4064	3.05
LMC6484IM/NOPB	D SOIC 14	55 495 8 4064	3.05
LMC6484IN/NOPB	N	PDIP	14	25	502	14	11938	4.32

D (R-PDSO-G14)
PLASTIC SMALL OUTLINE

0.344 (8,75) 0.337 (8,55) 14 8 Pin 1 Index Area 1 0.050 (1,27) 7 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,80) 0.020 (0,51) 0.012 (0,31) ⊕ 0.010 (0,25) M 0.069 (1,75) Max 0.010 (0,25) 0.004 (0,10) Gcuge Plane 0.010 (0,25) 0.005 (0,13) 0°-8° Seating Plane 0.010 (0,25) 0.050 (1,27) 0.016 (0,40) 4040047-5/M 06/11

NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
Body length does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.006 (0,15) each side.
Body width does not include interlead flash. Interlead flash shall not exceed 0.017 (0,43) each side.
E. Reference JEDEC MS-012 variation AB.

D (R-PDSO-G14)

4211283-3/E 08/12
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Publication IPC-7351 is recommended for alternate designs.
D. Laser cutting apertures with trapezoidal walls and also rounding corners will offer better paste release. Customers should contact their board assembly site for stencil design recommendations. Refer to IPC-7525 for other stencil recommendations.
E. Customers should contact their board fabrication site for solder mask tolerances between and around signal pads.

N (R-PDIP-T\*\*)

16 PINS SHOWN

PLASTIC DUAL-IN-LINE PACKAGE

A 16 9 0.260 (6,60) 0.240 (6,10) 1 8 0.070 (1,78) 0.045 (1,14)

C

DIM\PINS **	14	16	18	20
A MAX	0.775(19,69)	0.775(19,69)	0.920(23,37)	1.060(26,92)
A MIN	0.745(18,92)	0.745(18,92)	0.850(21,59)	0.940(23,88)
MS-001VARIATION	AA	BB	AC	AD

0.045 (1,14) 0.030 (0,76) D 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) ⊕ 0.010 (0,25) M 14/18 Pin Only 20 Pin vendor opt

0.325 (8,26) 0.300 (7,62) 0.015 (0,38) Gauge Plane 0.010 (0,25) NOM 0.430 (10,92) MAX

4040049/E 12/2002

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C Falls within JEDEC MS-001, except 18 and 20 pin minimum body length (Dim A).

The 20 pin end lead shoulder width is a vendor option, either half or full width.

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