SQF-SMS 640 - SSD Drive Advantech - Free user manual and instructions

Product Type	Solid State Drive (SSD)
Brand	Advantech
Model	SQF-SMS 640
Form Factor	2.5 inch
Interface	SATA III 6 Gb/s
Capacity	Up to 512 GB
Dimensions (W x D x H)	100 mm x 69.85 mm x 7 mm
Weight	Approximately 50 g
Power Consumption (Idle)	1.5 W typical
Power Consumption (Active)	3.0 W typical
Operating Temperature	0°C to 70°C (commercial grade)
Storage Temperature	-40°C to 85°C
Shock Resistance	1500 G, 0.5 ms half-sine
Vibration Resistance	20 G, 10-2000 Hz
MTBF	2,000,000 hours
Maintenance	No user-serviceable parts; firmware updates via manufacturer tools
Cleaning	Use a dry, lint-free cloth; avoid liquids
Safety	Electrostatic discharge (ESD) sensitive; handle with care
Spare Parts / Repairability	Not user-serviceable; contact Advantech support for RMA
Warranty	3 years limited

Frequently Asked Questions - SQF-SMS 640 Advantech

How do I install the Advantech SQF-SMS 640 SSD?

The SQF-SMS 640 is a 2.5-inch SATA SSD. Install it in any available SATA drive bay, connect the SATA data and power cables, then secure it with screws. Ensure the system is powered off and grounded.

Is the SQF-SMS 640 compatible with my laptop?

It fits standard 2.5-inch SATA slots. Check your laptop's specifications to confirm it supports a 7mm-height drive and SATA III interface. Most modern laptops are compatible.

What is the lifespan of this SSD?

The lifespan depends on usage. With an MTBF of 2,000,000 hours and typical endurance of 300 TBW (for 512GB model), it is suitable for industrial applications. Actual life varies with write intensity.

Can I use this SSD for operating system installation?

Yes, it is ideal as a boot drive. Its fast SATA III speed (up to 550 MB/s read) improves system responsiveness significantly over HDDs.

What is the maximum capacity available for SQF-SMS 640?

The SQF-SMS 640 series offers capacities up to 512 GB. Check the specific model number for exact capacity.

Does it support TRIM or garbage collection?

Yes, it fully supports TRIM command via SATA interface, and has built-in garbage collection to maintain optimal performance over time.

How do I update the firmware?

Firmware updates are available from Advantech's support website. Download the appropriate tool and follow the instructions. Ensure data backup before updating.

What is the power consumption of this SSD?

Typical power consumption is 1.5W idle and 3.0W during active read/write. This makes it energy-efficient for always-on systems.

Is this SSD suitable for industrial environments?

Yes, it features shock and vibration resistance and a wide temperature range, making it reliable for industrial PCs, embedded systems, and edge computing.

What should I do if the SSD is not detected?

First, check all connections (SATA cable and power). Try a different port or cable. Ensure the BIOS settings are correct (SATA mode, AHCI recommended). If still not detected, test on another system. If faulty, contact Advantech support for RMA.

USER MANUAL SQF-SMS 640 Advantech

1. Overview .... 4
2. Features .... 5
3. Specification Table....6
4. General Description 8
5. Pin Assignment and Description ...... 11

5.1 mSATA Interface Pin Assignments 11

6.Identify Device Data 13

1. ATA Command Set .... 16

2. System Power Consumption 22

8.1 Supply Voltage 22

8.2 Power Consumption 22

1. Physical Dimension ...... 23

Appendix: Part Number Table 24

Revision History

Rev.	Date	History
0.1	2016/3/22	1. Preliminary
0.2	2016/7/22	1. Update performance and TBW
0.3	2016/9/9	1. Update GPIO information
0.4	2016/10/13	1. Update 1TB information
0.5	2016/10/18	1. Part number table update
0.6	2017/2/26	1. Update performance
0.7	2017/5/5	1. Part number table update
0.8	2017/5/11	1. Update power consumption & performance
0.9	2017/5/17	1. Update power consumption & endurance
1.0	2017/8/5	1. Update write protect pin information
1.1	2017/10/26	1. Add 16GB/32GB performance
1.2	2017/12/22	1. Add 3D NAND configuration solution
1.3	2018/3/15	1. Update TBW test result
1.4	2018/6/1	1. Update 3D NAND performance test result
1.5	2018/8/10	1. Update General Description information
1.6	2018/8/31	1. Update TBW information
1.7	2018/12/10	1. Update UMLC TBW information
1.8	2018/12/21	1. Update OP temp description2. Update write protect information
1.9	2019/1/7	1. Update power consumption data
2.0	2019/1/23	1. Update performance data
2.1	2019/7/1	1. Update description

Advantech reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. Information furnished by Advantech is believed to be accurate and reliable. However, Advantech does not assure any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others.

Copyright © 1983-2019 Advantech Co., Ltd. All rights reserved.

1. Overview

Advantech SQFlash 640 series mSATA (SQF-SMS 640) delivers all the advantages of flash disk technology with the Serial ATA I/II/III interface and is fully compliant with MO-300 mSATA specification. The SQF-SMS 640 is designed to operate at a maximum operating frequency of 200MHz with 30MHz external crystal. Its capacity could provide a wide range up to 1TB. Moreover, it can reach up to 550MB/s read as well as 500MB/s write high performance based on Toggle 2.0 MLC flash (with 32MB SDR enabled and measured by CrystalDiskMark v5.0). The power consumption of SQF-SMS 640 is much lower than traditional hard drives, making it the best embedded solution for new platforms.

2. Features

■ Standard SATA interface

– Support SATA 1.5/3.0/6.0 Gbps interface

– SATA Revision 3.2 compliant

■ Operating Voltage : 3.3V

■ TRIM、AHCI supported

■ Hardware write protect supported

- Pin header type: default on short position for write protect disable

■ Temperature Ranges

- Commercial Temperature

• 0^ to 70^ for operating
• -40°C to 85°C for storage

- Industrial Temperature

• -40°C to 85°C for operating ^1
• -40°C to 85°C for storage

*Note: 1. Based on SMART Attribute C2h, which measured by thermal sensor

■ Mechanical Specification

• Shock : 1,500G / 0.5ms
• Vibration : 20G / 80\~2,000Hz

■ Humidity

- Humidity: 5% 95% under 55^

■ Endurance : > 2,000,000 program/erase cycles

This is a test result of the whole SQFlash drive. The test is to keep writing a fixed logical block address (LBA) and see if any bad blocks occur after 2M cycles. With wear-levelling mechanism, although the disk was kept writing the same LBA but the physical block changes per block writing. So this test also proves that wear-leveling is really working, or the block would be wearout after its designated life cycles.

■ Data Retention

- 10 years

■ Acquired RoHS、WHQL、CE、FCC Certificate

■ Acoustic : 0 dB

■ Dimension : 50.8 mm x 30.0 mm x 4.2 mm

3. Specification Table

■ Performance

		Sequential Performance (MB/sec)		Random Performance (IOPS @4K)
		Read	Write	Read	Write
Ultra MLC	8 GB	307.23	86.56	20,796	19,850
	16 GB	355.83	165.92	36,957	40,056
	32 GB	561.72	313.61	74,856	75,655
	64 GB	561.67	475.19	88.797	80.139
	128 GB	561.36	497.16	87.943	86.088
	256 GB	560.66	498.99	87.440	85.619
	512 GB	TBD	TBD	TBD	TBD
MLC	16 GB	326.56	82.56	20,247	19,774
	32 GB (1-ch)	355.83	165.92	36,957	40,056
	32 GB (2-ch)	560.75	163.77	31,792	40,214
	64 GB	561.47	327.99	76,068	81,132
	128 GB	561.74	472.90	95,898	87,724
	256 GB	561.73	497.89	90,596	90,865
	512 GB	561.70	498.93	86,579	91,195
	1 TB	534.47	464.68	97,226	90,946
3D NAND (BiCS3)	32 GB	229.78	129.61	18,862	29,873
	64 GB	554.55	260.29	35,010	61,265
	128 GB	560.93	457.84	65,272	82,456
	256 GB	561.39	504.12	79,278	84,558
	512 GB	561.75	543.13	77,126	85,351
	1 TB	543.25	504.63	77,208	88,416

* All performance above are tested with AHCI mode.
* Tested by CrystalDiskMark 1GB workload.

■ Endurance

JEDEC defined an endurance rating TBW (TeraByte Written), following by the equation below, for indicating the number of terabytes a SSD can be written which is a measurement of SSDs' expected lifespan, represents the amount of data written to the device.

TBW = [(NAND Endurance) x (SSD Capacity)] / WAF

• NAND Endurance: Program / Erase cycle of a NAND flash.

- SLC: 100,000 cycles

- Ultra MLC: 30,000 cycles

- MLC: 3,000 cycles

- 3D NAND (BiCS3): 3,000 cycles

- SSD Capacity: SSD physical capacity in total of a SSD.

- WAF: Write Amplification Factor (WAF), as the equation shown below, is a numerical value representing the ratio between the amount of data that a SSD controller needs to write and the amount of data that the host's flash controller writes. A better WAF, which is near to 1, guarantees better endurance and lower frequency of data written to flash memory.

WAF = (Lifetime write to flash) / (Lifetime write to host)

Endurance measurement is based on New JEDEC 219 Client Workload and verified with following workload conditions,

• Test duration: over 168hrs (=7 days)

- File Size: Follow by JEDEC 219

• SQFlash 640 mSATA (SLC/ Ultra MLC/ MLC) TBW

	WAF	TBW
		Ultra MLC	MLC
8 GB	TBD	TBD	TBD
16 GB*	5.97	80	8
32 GB*	3.84	250	25
64 GB	2.74	701	70
128 GB	2.89	1329	133
256 GB	2.40	3200	320
512 GB	2.17	7078	709
1 TB	2.09	--	1470

• SQFlash 640 mSATA (3D NAND (BiCS3)) TBW

	WAF	TBW
		3D NAND (BiCS3)
32 GB	3.56	27
64 GB	2.61	74
128 GB	2.93	131
256 GB	2.49	315
512 GB	2.07	744
1 TB	2.10	1461

- The endurance of SSD could be estimated based on users' behaviors, NAND endurance cycles, and write amplification factor. It is not guaranteed by the flash vendor.

• TBW may vary from flash configuration and platform

• “*” By simulation

Specifications subject to change without notice, contact your sales representatives for the most update information.

4. General Description

■ Error Correction Code (ECC)

Flash memory cells will deteriorate with use, which might generate random bit errors in the stored data. Thus, SQFlash 640 series mSATA applies the LDPC (Low Density Parity Check) of ECC algorithm, which can detect and correct errors occur during read process, ensure data been read correctly, as well as protect data from corruption.

■ Wear Leveling

NAND flash devices can only undergo a limited number of program/erase cycles, and in most cases, the flash media are not used evenly. If some areas get updated more frequently than others, the lifetime of the device would be reduced significantly. Thus, Wear Leveling is applied to extend the lifespan of NAND Flash by evenly distributing write and erase cycles across the media.

SQFlash provides advanced Wear Leveling algorithm, which can efficiently spread out the flash usage through the whole flash media area. Moreover, by implementing both dynamic and static Wear Leveling algorithms, the life expectancy of the NAND flash is greatly improved.

■ Bad Block Management

Bad blocks are blocks that include one or more invalid bits, and their reliability is not guaranteed. Blocks that are identified and marked as bad by the manufacturer are referred to as "Initial Bad Blocks". Bad blocks that are developed during the lifespan of the flash are named "Later Bad Blocks". SQFlash implements an efficient bad block management algorithm to detect the factory-produced bad blocks and manages any bad blocks that appear with use. This practice further prevents data being stored into bad blocks and improves the data reliability.

■ Power Loss Protection: Flush Manager

Power Loss Protection is a mechanism to prevent data loss during unexpected power failure. DRAM is a volatile memory and frequently used as temporary cache or buffer between the controller and the NAND flash to improve the SSD performance. However, one major concern of the DRAM is that it is not able to keep data during power failure. Accordingly, SQFlash SSD applies the Flush Manager technology, only when the data is fully committed to the NAND flash will the controller send acknowledgement (ACK) to the host. Such implementation can prevent false-positive performance and the risk of power cycling issues. In addition, it is critical for a controller to shorten the time the in-flight data stays in the controller internal cache. Thus, SQFlash applies an algorithm to reduce the amount of data resides in the cache to provide a better performance. With Flush Manager, incoming data would only have a “pit stop” in the cache and then move to NAND flash directly. Also, the onboard DDR will be treated as an “organizer” to consolidate incoming data into groups before written into the flash to improve write amplification.

TRIM

TRIM is a feature which helps improve the read/write performance and speed of solid-state drives (SSD). Unlike hard disk drives (HDD), SSDs are not able to overwrite existing data, so the available space gradually becomes smaller with each use. With the TRIM command, the operating system can inform the SSD which blocks of data are no longer in use and can be removed permanently. Thus, the SSD will perform the erase action, which prevents unused data from occupying blocks all the time.

■ SMART

SMART, an acronym for Self-Monitoring, Analysis and Reporting Technology, is an open standard that allows a hard disk drive to automatically detect its health and report potential failures. When a failure is recorded by SMART, users can choose to replace the drive to prevent unexpected outage or data loss. Moreover, SMART can inform users of impending failures while there is still time to perform proactive actions, such as copy data to another device.

■ Over-Provision

Over Provisioning refers to the inclusion of extra NAND capacity in a SSD, which is not visible and cannot be used by users. With Over Provisioning, the performance and IOPS (Input/Output Operations per Second) are improved by providing the controller additional space to manage P/E cycles, which enhances the reliability and endurance as well. Moreover, the write amplification of the SSD becomes lower when the controller writes data to the flash.

■ Hardware Write Protect Pin (Optional)

A 2-pin header is mounted and connected to controller reserved GPIO for the drive write protection. When the pins are opened, all of the write command will be carried to a buffer area without real programming to the Flash IC. So the data won't be saved in this mode and will be totally discarded upon power shutting down. GPIO pin is reserved on the PCB without any default function. Optionally the pin can be set to Write Protect by loading the specific version firmware. Please contact Advantech sales representative if you would like to enable the function.

Close-up of a blue circuit board with visible components and connectors, no readable text or symbols present.

On-board GPIO for Write Protection

■ Sophisticate Product Management Systems

Since industrial application require much more reliable devices compare with consumer product, a more sophisticated product management system become necessary for industrial customer requirement. The key to providing reliable devices is product traceability and failure analysis system. By implement such systems end customer can expect much more reliable product.

■ Thermal Throttling

Thermal Throttling function is for protecting the drive and reducing the possibility of read / write error due to overheat. The temperature is monitored by the thermal sensor. As the operating temperature continues to increase to threshold temperature, the Thermal Throttling mechanism is activated. At this time, the performance of the drive will be significantly decreased to avoid continuous heating. When the operating temperature falls below threshold temperature, the drive can resume to normal operation.

■ Block Diagram

graph TD
    A["UART"] --> B["I2C Master"]
    B --> C["DMA Bus"]
    D["SATA III PHY"] --> E["SATA"]
    D --> F["SATA III Controller"]
    G["CPU"] --> H["Mask ROM"]
    G --> I["DATA SRAM"]
    G --> J["Programmable SRAM"]
    K["Buffer"] --> L["Compression"]
    K --> M["Flash Controller"]
    N["SDR Controller"] --> O["GPIO"]
    P["JTAG"] --> Q["SDR I/F"]
    R["GPIO"] --> S["GPIO"]
    T["2 Channel Flash I/F"] --> U["External Space"]

■ LBA value

Density	LBA
16 GB	30,752,064
32 GB	62,008,128
64 GB	125,045,424
128 GB	250,069,680
256 GB	500,118,192
512 GB	1,000,215,216
1 TB	2,000,409,264

5. Pin Assignment and Description

5.1 mSATA Interface Pin Assignments

Pin #	Function	Description
1	GPIO_WP	Write Protection GPIO
2	+3.3V	3.3V Source
3	NC	No Connect
4	DGND	Digital GND
5	NC	No Connect
6	NC	No Connect
7	NC	No Connect
8	NC	No Connect
9	DGND	Digital GND
10	NC	No Connect
11	NC	No Connect
12	NC	No Connect
13	NC	No Connect
14	NC	No Connect
15	DGND	Digital GND
16	NC	No Connect
17	GPIO_QE	Quick Erase GPIO
18	DGND	Digital GND
19	NC	No Connect
20	NC	No Connect
21	SATA GND	SATA Ground Return Pin
22	NC	No Connect
23	B+	Host Receiver Differential Signal Pair
24	+3.3V	3.3V Source
25	B-	Host Receiver Differential Signal Pair
26	SATA GND	SATA Ground Return Pin
27	SATA GND	SATA Ground Return Pin
28	NC	No Connect
29	SATA GND	SATA Ground Return Pin
30	NC	No Connect
31	A-	Host Transmitter Differential Signal Pair
32	NC	No Connect
33	A+	Host Transmitter Differential Signal Pair
34	DGND	Digital GND
35	SATA GND	SATA Ground Return Pin
36	NC	No Connect
37	SATA GND	SATA Ground Return Pin
38	NC	No Connect
39	+3.3V	3.3V Source
40	DGND	Digital GND
41	+3.3V	3.3V Source
42	NC	No Connect
43	NC	No Connect
44	DEVSLP	Enter/Exit DevSleep
45	NC	Reserved pin
46	NC	No Connect
47	NC	Reserved pin
48	NC	No Connect
49	DA/DSS	Device Activity Signal
50	DGND	Digital GND
51	GND	Default connect to GND
52	+3.3V	3.3V Source

6. Identify Device Data

The Identity Device Data enables Host to receive parameter information from the device. The parameter words in the buffer have the arrangement and meanings defined in below table. All reserve bits or words are zero

Word	ATA Identify Parameter	Value
0	General configuration bit-significant information	0040h
1	Obsolete	*1
2	Specific configuration	C837h
3	Obsolete	0010h
4-5	Retired	00000000h
6	Obsolete	003Fh
7-8	Reserved for assignment by the Compact Flash Association	00000000h
9	Retired	0000h
10-19	Serial number (20 ASCII characters)	Varies
20-21	Retired	00000000h
22	Obsolete	0000h
23-26	Firmware revision (8 ASCII characters)	Varies
27-46	Model number (xxxxxxx)	Varies
47	7:0- Maximum number of sectors transferred per interrupt on MULTIPLE commands	8010h
48	Trusted Computing feature set options(not support)	4000h
49	Capabilities	2F00h
50	Capabilities	4000h
51-52	Obsolete	000000000h
53	Words 88 and 70:64 valid	0007h
54	Obsolete	*1
55	Obsolete	0010h
56	Obsolete	003Fh
57-58	Obsolete	*2
59	Sanitize and Number of sectors transferred per interrupt on MULTIPLE commands	5D10h
60-61	Maximum number of sector ( 28bit LBA mode)	*3
62	Obsolete	0000h
63	Multi-word DMA modes supported/selected	0407h
64	PIO modes supported	0003h
65	Minimum Multiword DMA transfer cycle time per word	0078h
66	Manufacturer's recommended Multiword DMA transfer cycle time	0078h
67	Minimum PIO transfer cycle time without flow control	0078h
68	Minimum PIO transfer cycle time with IORDY flow control	0078h
69	Additional Supported (support download microcode DMA)	0D00h
70	Reserved	0000h
71-74	Reserved for the IDENTIFY PACKET DEVICE command	0000000000000000h
75	Queue depth	001Fh
76	Serial SATA capabilities	E70Eh
77	Serial ATA Additional Capabilities	0086h
78	Serial ATA features supported	014Ch
79	Serial ATA features enabled	0040h
80	Major Version Number	0FF8h
81	Minor Version Number	0000h
82	Command set supported	706Bh
83	Command set supported	7409h
84	Command set/feature supported extension	6163h
85	Command set/feature enabled	7069h
86	Command set/feature enabled	B401h
87	Command set/feature default	6163h
88	Ultra DMA Modes	007Fh
89	Time required for security erase unit completion	0001h
90	Time required for Enhanced security erase completion	001Eh
91	Current advanced power management value	0000h
92	Master Password Revision Code	FFFEh
93	Hardware reset result. For SATA devices, word 93 shall be set to the value 0000h.	0000h
94	Obsolete	0000h
95	Stream Minimum Request Size	0000h
96	Streaming Transfer Time – DMA	0000h
97	Streaming Access Latency – DMA and PIO	0000h
98-99	Streaming Performance Granularity	0000h
100-103	Maximum user LBA for 48 bit Address feature set	*4
104	Streaming Transfer Time – PIO	0000h
105	Maximum number of 512-byte blocks per DATA SET MANAGEMENT command	0008h
106	Physical sector size/Logical sector size	4000h
107	Inter-seek delay for ISO-7779 acoustic testing in microseconds	0000h
108-111	World Wide Name	Varies
112-115	Reserved	0000000000000000h
116	Reserved	0000h
117-118	Words per logical Sector	00000000h
119	Supported settings	411Ch
120	Command set/Feature Enabled/Supported	401Ch
121-126	Reserved	0h
127	Obsolete	0h
128	Security status	0021h
129-140	Vendor specific	Varies
141	Vendor specific	Varies
142-159	Vendor specific	Varies
160	Reserved for CFA	0h
161-167	Reserved for CFA	0h
168	Device Nominal Form Factor	Varies
169	DATA SET MANAGEMENT command is supported	0001h
170-173	Additional Product Identifier	0h
174-175	Reserved	0h
176-205	Current media serial number	0h
206	SCT Command Transport	0h

Specifications subject to change without notice, contact your sales representatives for the most update information.

207-208	Reserved	0h
209	Alignment of logical blocks within a physical block	4000h
210-211	Write-Read-Verify Sector Count Mode 3 (not support)	0000h
212-213	Write-Read-Verify Sector Count Mode 2 (not support)	0000h
214-216	Obsolete	0000h
217	Non-rotating media device	0001h
218	Reserved	0h
219	NV Cache relate (not support)	0h
220	Write read verify feature set current mode	0h
221	Reserved	0h
222	Transport major version number	10FFh
223	Transport minor version number	0000h
224-229	Reserved	0h
230-233	Extend number of user addressable sectors	0h
234	Minimum number of 512-byte data blocks per DOWNLOAD MICROCODE command for mode 03h	0001h
235	Maximum number of 512-byte data blocks per DOWNLOADMICROCODE command for mode 03h	FFFEh
236-254	Reserved	0h
255	Integrity word (Checksum and Signature)	XXA5h

Capacity(GB)	*1(Word 1/Word 54)	*2(Word 57 – 58)	*3(Word 60 – 61)	*4(Word 100 – 103)
8	3CA5h	EEC9B0h	EEC9B0h	EEC9B0h
16	3FFFh	FBFC10h	1DD40B0h	1DD40B0h
32	3FFFh	FBFC10h	3BA2EB0h	3BA2EB0h
64	3FFFh	FBFC10h	7740AB0h	7740AB0h
128	3FFFh	FBFC10h	EE7C2B0h	EE7C2B0h
256	3FFFh	FBFC10h	FFFFFFh	1DCF32B0h
512	3FFFh	FBFC10h	FFFFFFh	3B9E12B0
1024	3FFFh	FBFC10h	FFFFFFh	TBD

7. ATA Command Set

[Command Set List]

Op-Code	Command Description	Op-Code	Command Description
00h	NOP	91h	Initialize Device Parameters
06h	Data Set Management	92h	Download Microcode
10h-1Fh	Recalibrate	93h	Download Microcode DMA
20h	Read Sectors	B0h	SMART
21h	Read Sectors without Retry	B4h	Sanitize
24h	Read Sectors EXT	C4h	Read Multiple
25h	Read DMA EXT	C5h	Write Multiple
29h	Read Multiple EXT	C6h	Set Multiple Mode
2Fh	Read Log EXT	C8h	Read DMA
30h	Write Sectors	C9h	Read DMA without Retry
31h	Write Sectors without Retry	CAh	Write DMA
34h	Write Sectors EXT	CBh	Write DMA without Retry
35h	Write DMA EXT	CEh	Write Multiple FUA EXT
38h	CFA Write Sectors Without Erase	E0h	Standby Immediate
39h	Write Multiple EXT	E1h	Idle Immediate
3Dh	Write DMA FUA EXT	E2h	Standby
3Fh	Write Long EXT	E3h	Idle
40h	Read Verify Sectors	E4h	Read Buffer
41h	Read Verify Sectors without Retry	E5h	Check Power Mode
42h	Read Verify Sectors EXT	E6h	Sleep
44h	Zero EXT	E7h	Flush Cache
45h	Write Uncorrectable EXT	E8h	Write Buffer
47h	Read Log DMA EXT	EAh	Flush Cache EXT
57h	Write Log DMA EXT	ECH	Identify Device
60h	Read FPDMA Queued	EFh	Set Features
61h	Write FPDMA Queued	F1h	Security Set Password
70h-76h	Seek	F2h	Security Unlock
77h	Set Date & Time EXT	F3h	Security Erase Prepare
78h	Accessible Max Address configuration	F4h	Security Erase Unit
79h-7Fh	Seek	F5h	Security Freeze Lock
90h	Execute Device Diagnostic	F6h	Security Disable Password

Note: ND = Non-Data Command
PI = PIO Data-In Command
PO = PIO Data-Out Command
DM = DMA Command
DD = Execute Diagnostic Command

[Command Set Descriptions]

1. CHECK POWER MODE (code: E5h);

This command allow host to determine the current power mode of the device.

2. DOWNLOAD MICROCODE (code: 92h);

This command enables the host to alter the device's microcode. The data transferred using the DOWNLOAD MICROCODE command is vendor specific.

All transfers shall be an integer multiple of the sector size. The size of the data transfer is determined by the content of the LBA Low register and the Sector Count register.

This allows transfer sizes from 0 bytes to 33,553,920 bytes, in 512bytes increments.

3. EXECUTE DEVICE DIAGNOSTIC (code: 90h);

This command performs the internal diagnostic tests implemented by the module.

4. FLUSH CACHE (code: E7h);

This command used by the host to request the device to flush the write cache.

5. FLUSH CACHE EXT (code: EAh);

This command is used by the host to request the device to flush the write cache. If there is data in the write cache, that data shall be written to the media.

6. IDENTIFY DEVICE (code: ECh);

The IDENTIFY DEVICE command enables the host to receive parameter information from the module.

7. IDLE (code: 97h or E3h);

This command allows the host to place the module in the IDLE mode and also set the Standby timer. INTRQ may be asserted even through the module may not have fully transitioned to IDLE mode. If the Sector Count register is non-"0", then the Standby timer shall be enabled. The value in the Sector Count register shall be used to determine the time programmed into the Standby timer. If the Sector Count register is "0" then the Standby timer is disabled.

8. IDLE IMMEDIATE (code: E1h);

This command causes the module to set BSY, enter the Idle (Read) mode, clear BSY and generate an interrupt.

9. INITIALIZE DEVICE PARAMETERS (code: 91h);

This command enables the host to set the number of sectors per track and the number of heads per cylinder.

10. NOP (code: 00h);

If this command is issued, the module respond with command aborted.

11. READ BUFFER (code: E4h);

This command enables the host to read the current contents of the module's sector buffer.

12. READ DMA (code: C8h or C9h);

This command reads from "1" to "256" sectors as specified in the Sector Count register using the DMA data transfer protocol. A sector count of "0" requests "256" sectors transfer. The transfer begins at the sector specified in the Sector Number register.

13. READ DMA Ext (code: 25h);

This command allows the host to read data using the DMA data transfer protocol.

14. READ MULTIPLE (code: C4h);

Specifications subject to change without notice, contact your sales representatives for the most update information.

This command performs similarly to the READ SECTORS command. Interrupts are not generated on each sector, but on the transfer of a block which contains the number of sector per block is defined by the content of word 59 in the IDENTIFY DEVICE response.

15. READ MULTIPLE EXT (code: 29h);

This command performs similarly to the READ SECTORS command. The number of sectors per block is defined by a successful SET MULTIPLE command. If no successful SET MULTIPLE command has been issued, the block is defined by the device's default value for number of sectors per block as defined in bits (7:0) in word 47 in the IDENTIFY DEVICE information.

16. READ NATIVE MAX ADDRESS (code: F8h);

This command returns the native maximum address. The native maximum address is the highest address accepted by the device in the factory default condition.

17. READ NATIVE MAX ADDRESS EXT (code: 27h);

This command returns the native maximum address.

18. READ SECTOR(S) (code: 20h or 21h);

This command reads from “1” to “256” sectors as specified in the Sector Count register. A sector count of “0” requests “256” sectors transfer. The transfer begins at the sector specified in the Sector Number register.

19. READ SECTOR(S) EXT (code: 24h);

This command reads from "1" to "65536" sectors as specified in the Sector Count register. A sector count of "0" requests "65536" sectors transfer. The transfer begins at the sector specified in the Sector Number register.

20. READ VERIFY SECTOR(S) (code: 40h or 41h);

This command is identical to the READ SECTORS command, except that DRQ is never set and no data is transferred to the host.

21. READ VERIFY SECTOR(S) EXT (code: 42h);

This command is identical to the READ SECTORS command, except that DRQ is never set and no data is transferred to the host.

22. RECALIBRATE (code: 1Xh);

This command return value is select address mode by the host request.

23. SECURITY DISABLE PASSWORD (code: F6h);

This command transfers 512 bytes of data from the host. Table defines the content of this information. If the password selected by word 0 match the password previously saved by the device, the device shall disable the Lock mode. This command shall not change the Master password. The Master password shall be reactivated when a User password is set.

24. SECURITY ERASE PREPARE (code: F3h);

This command shall be issued immediately before the SECURITY ERASE UNIT command to enable device erasing and unlocking.

25. SECURITY ERASE UNIT (code: F4h);

This command transfer 512 bytes of data from the host. Table## defines the content of this information. If the password does not match the password previously saved by the device, the device shall reject the command with command aborted.

The SECURITY ERASE PREPARE command shall be completed immediately prior to the SECURITY ERASE UNIT command.

Specifications subject to change without notice, contact your sales representatives for the most update information.

26. SECURITY FREEZE LOCK (code: F5h);

This command shall set the device to frozen mode. After command completion any other commands that update the device Lock mode shall be command aborted. Frozen shall be disabled by power-off or hardware reset.

If SECURITY FREEZE LOCK is issued when the drive is in frozen mode, the drive executes the command and remains in frozen mode.

27. SECURITY SET PASSWORD (code: F1h);

This command transfer 512 bytes of data from the host. Table defines the content of this information. The data transferred controls the function of this command. Table defines the interaction of the identifier and security level bits.

28. SECURITY UNLOCK (code: F2h);

This command transfer 512 bytes of data from the host. Table (as Disable Password) defines the content of this information.

If the Identifier bit is set to Master and the device is in high security level, then the password supplied shall be compared with the stored Master password. If the device is in maximum security level then the unlock shall be rejected.

If the identifier bit is set to user then the device shall compare the supplied password with the stored User password.

If the password compare fails then the device shall return command aborted to the host and decrements the unlock counter. This counter shall be initially set to five and shall be decremented for each password mismatch when SECURITY UNLOCK is issued and the device is locked. When this counter reaches zero then SECURITY UNLOCK and SECURITY ERASE UNIT command shall be aborted until a power-on or a hardware reset.

29. SEEK (code: 7Xh);

This command performs address range check.

30. SET MAX ADDRESS (code: F9h);

After successful command completion, all read and write access attempts to address greater than specified by the successful SET MAX ADDRESS command shall be rejected with an IDNF error. IDENTIFY DEVICE response words (61:60) shall reflect the maximum address set with this command.

31. SET MAX ADDRESS EXT (code: 37h);

After successful command completion, all read and write access attempts to address greater than specified by the successful SET MAX ADDRESS command shall be rejected with an IDNF error. IDENTIFY DEVICE response words (61:60) shall reflect the maximum address set with this command.

32. SET FEATURE (code: EFh);

This command is used by the host to establish parameters that affect the execution of certain device features.

33. SET MULTIPLE MODE (code: C6h);

This command enables the device to perform READ and Write Multiple operations and establishes the block count for these commands.

34. SLEEP (code: 99h or E6h);

This command causes the module to set BSY, enter the Sleep mode, clear BSY and generate an interrupt.

35. SMART READ DATA (code: B0h with Feature register value of D0h);

This command returns the Device SMART data structure to the host.

1. SMART ENABLE/DISABLE AUTO SAVE (code: B0h with Feature register value of D2h);

This command enables and disables the optional attribute autosave feature of the device.

1. SMART EXECUTE OFF_LINE (code: B0h with Feature register value of D4h);

This command causes the device to immediately initiate the optional set of activities that collect SMART data in an off-line mode and then save this data to the device's non-volatile memory, or execute a self-diagnostic test routine in either captive or off-line mode.

1. SMART READ LOG (code: B0h with Feature register value of D5h);

This command returns the specified log data to the host.

1. SMART ENABLE OPERATION (code: B0h with Feature register value of D8h);

This command enables access to all SMART capabilities within the device. Prior to receipt of this command SMART data are neither monitored nor saved by the device.

1. SMART DISABLE OPERATION (code: B0h with Feature register value of D9h);

This command disables all SMART capabilities within the device including any and all timer and event count functions related exclusively to this feature. After command acceptance the device shall disable all SMART operations.

After receipt of this command by the device, all other SMART commands including SMART DISABLE OPERATION commands, with exception of SMART ENABLE OPERATIONS, are disabled and invalid and shall be command aborted by the device.

1. SMART RETURN STATUS (code: B0h with Feature register value of DAh);

This command causes the device to communicate the reliability status of the device to the host.

1. STANDBY (code: E2h);

This command causes the module to set BSY, enter the Standby mode, clear BSY and return the interrupt immediately.

1. STANDBY IMMEDIATE (code: E0h);

This command causes the module to set BSY, enter the Standby mode, clear BSY and return the interrupt immediately.

1. WRITE BUFFER (code: E8h);

This command enables the host to overwrite contents of the module's sector buffer with any data pattern desired.

1. WRITR DMA (code: CAh or CBh);

This command writes from "1" to "256" sectors as specified in the Sector Count register using the DMA data transfer protocol. A sector count of "0" requests "256" sectors transfer. The transfer begins at the sector specified in the Sector Number register.

1. WRITR DMA EXT (code: 35h);

This command writes from "1" to "65536" sectors as specified in the Sector Count register using the DMA data transfer protocol. A sector count of "0" requests "65536" sectors transfer. The transfer begins at the sector specified in the Sector Number register.

1. WRITE MULTIPLE (code: C5h);

This command is similar to the WRITE SECTORS command. Interrupts are not presented on each sector, but on the transfer of a block which contains the number of sectors defined by Set Multiple command.

1. WRITE MULTIPLE EXT (code: 39h);

This command is similar to the WRITE SECTORS command. Interrupts are not presented on each sector, but on the transfer of a block which contains the number of sectors defined by Set Multiple command.

49. WRITE SECTOR(S) (code: 30h);

This command writes from “1” to “256” sectors as specified in the Sector Count register. A sector count of “0” requests “256” sectors transfer. The transfer begins at the sector specified in the Sector Number register.

50. WRITE SECTOR(S) EXT (code: 34h);

This command writes from "1" to "65536" sectors as specified in the Sector Count register. A sector count of "0" requests "65536" sectors transfer. The transfer begins at the sector specified in the Sector Number register.

51. WRITE SECTOR(S) W/O ERASE (code: 38h);

This command writes from “1” to “256” sectors as specified in the Sector Count register. A sector count of “0” requests “256” sectors transfer. The transfer begins at the sector specified in the Sector Number register.

52. WRITE VERIFY (code: 3Ch);

This command is similar to the WRITE SECTOR(S) command, except that each sector is verified before the command is completed.

8. System Power Consumption

8.1 Supply Voltage

Parameter	Rating
Operating Voltage	3.3V

8.2 Power Consumption

mA		Read	Write	Idle	Slumber
Ultra MLC	8 GB	357.58	363.64	80.30	2.73
	16 GB	359.09	393.94	80.30	3.03
	32 GB	409.55	562.12	73.12	3.09
	64 GB	430.76	533.33	76.30	3.10
	128 GB	433.79	571.21	76.59	3.10
	256 GB	437.80	753.00	78.10	3.10
	512 GB	515.15	818.18	87.88	7.58
MLC	16 GB	250.00	253.13	57.51	3.09
	32 GB (1-ch)	350.12	401.67	67.51	3.09
	32 GB (2-ch)	307.31	325.15	60.51	3.09
	64 GB	409.55	562.12	73.12	3.09
	128 GB	430.76	533.33	76.30	3.10
	256 GB	433.79	571.21	76.59	3.10
	512 GB	437.80	753.00	78.10	3.10
	1 TB	518.80	795.40	80.30	3.15
3D NAND (BiCS3)	32 GB	333.33	303.30	90.91	3.03
	64 GB	363.36	390.90	98.48	4.54
	128 GB	384.84	412.12	98.48	4.54
	256 GB	422.72	448.48	98.48	4.54
	512 GB	412.12	439.39	98.48	4.54
	1 TB	500.00	569.69	90.90	3.33

9. Physical Dimension

mSATA (Unit: mm)

Appendix: Part Number Table

Product	Advantech PN
SQF mSATA 640 8G UMLC (0~70°C)	SQF-SMSU1-8G-SBC
SQF mSATA 640 16G UMLC (0~70°C)	SQF-SMSU1-16G-SBC
SQF mSATA 640 16G UMLC (0~70°C)	SQF-SMSU2-16G-SBC
SQF mSATA 640 32G UMLC (0~70°C)	SQF-SMSU2-32G-SBC
SQF mSATA 640 64G UMLC (0~70°C)	SQF-SMSU4-64G-SBC
SQF mSATA 640 128G UMLC (0~70°C)	SQF-SMSU4-128G-SBC
SQF mSATA 640 256G UMLC (0~70°C)	SQF-SMSU4-256G-SBC
SQF mSATA 640 512G UMLC (0~70°C)	SQF-SMSU4-512G-SBC
SQF mSATA 640 8G UMLC (-40~85°C)	SQF-SMSU1-8G-SBE
SQF mSATA 640 16G UMLC (-40~85°C)	SQF-SMSU1-16G-SBE
SQF mSATA 640 16G UMLC (-40~85°C)	SQF-SMSU2-16G-SBE
SQF mSATA 640 32G UMLC (-40~85°C)	SQF-SMSU2-32G-SBE
SQF mSATA 640 64G UMLC (-40~85°C)	SQF-SMSU4-64G-SBE
SQF mSATA 640 128G UMLC (-40~85°C)	SQF-SMSU4-128G-SBE
SQF mSATA 640 256G UMLC (-40~85°C)	SQF-SMSU4-256G-SBE
SQF mSATA 640 16G MLC (0~70°C)	SQF-SMSM1-16G-SBC
SQF mSATA 640 32G MLC (0~70°C)	SQF-SMSM1-32G-SBC
SQF mSATA 640 32G MLC (0~70°C)	SQF-SMSM2-32G-SBC
SQF mSATA 640 64G MLC (0~70°C)	SQF-SMSM2-64G-SBC
SQF mSATA 640 128G MLC (0~70°C)	SQF-SMSM4-128G-SBC
SQF mSATA 640 256G MLC (0~70°C)	SQF-SMSM4-256G-SBC
SQF mSATA 640 512G MLC (0~70°C)	SQF-SMSM4-512G-SBC
SQF mSATA 640 1T MLC (0~70°C)	SQF-SMSM4-1T-SBC
SQF mSATA 640 16G MLC (-40~85°C)	SQF-SMSM1-16G-SBE
SQF mSATA 640 32G MLC (-40~85°C)	SQF-SMSM1-32G-SBE
SQF mSATA 640 32G MLC (-40~85°C)	SQF-SMSM2-32G-SBE
SQF mSATA 640 64G MLC (-40~85°C)	SQF-SMSM2-64G-SBE
SQF mSATA 640 128G MLC (-40~85°C)	SQF-SMSM4-128G-SBE
SQF mSATA 640 256G MLC (-40~85°C)	SQF-SMSM4-256G-SBE
SQF mSATA 640 512G MLC (-40~85°C)	SQF-SMSM4-512G-SBE
SQF mSATA 640 1T MLC (-40~85°C)	SQF-SMSM4-1T-SBE
SQF mSATA 640 32G 3D NAND (BiCS3) (0~70°C)	SQF-SMSV1-32G-SBC
SQF mSATA 640 64G 3D NAND (BiCS3) (0~70°C)	SQF-SMSV2-64G-SBC
SQF mSATA 640 128G 3D NAND (BiCS3) (0~70°C)	SQF-SMSV2-128G-SBC
SQF mSATA 640 256G 3D NAND (BiCS3) (0~70°C)	SQF-SMSV4-256G-SBC
SQF mSATA 640 512G 3D NAND (BiCS3) (0~70°C)	SQF-SMSV4-512G-SBC
SQF mSATA 640 1T 3D NAND (BiCS3) (0~70°C)	SQF-SMSV4-1T-SBC
SQF mSATA 640 32G 3D NAND (BiCS3) (-40~85°C)	SQF-SMSV1-32G-SBE
SQF mSATA 640 64G 3D NAND (BiCS3) (-40~85°C)	SQF-SMSV2-64G-SBE
SQF mSATA 640 128G 3D NAND (BiCS3) (-40~85°C)	SQF-SMSV2-128G-SBE
SQF mSATA 640 256G 3D NAND (BiCS3) (-40~85°C)	SQF-SMSV4-256G-SBE
SQF mSATA 640 512G 3D NAND (BiCS3) (-40~85°C)	SQF-SMSV4-512G-SBE
SQF mSATA 640 1T 3D NAND (BiCS3) (-40~85°C)	SQF-SMSV4-1T-SBE